1e2fc49e1SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 2e2fc49e1SMichal Simek/* 3e2fc49e1SMichal Simek * dts file for Xilinx ZynqMP zc1751-xm017-dc3 4e2fc49e1SMichal Simek * 5f4df4f58SMichal Simek * (C) Copyright 2016 - 2021, Xilinx, Inc. 6e2fc49e1SMichal Simek * 7e2fc49e1SMichal Simek * Michal Simek <michal.simek@xilinx.com> 8e2fc49e1SMichal Simek */ 9e2fc49e1SMichal Simek 10e2fc49e1SMichal Simek/dts-v1/; 11e2fc49e1SMichal Simek 12e2fc49e1SMichal Simek#include "zynqmp.dtsi" 139c8a47b4SRajan Vaja#include "zynqmp-clk-ccf.dtsi" 14e2fc49e1SMichal Simek 15e2fc49e1SMichal Simek/ { 16e2fc49e1SMichal Simek model = "ZynqMP zc1751-xm017-dc3 RevA"; 17e2fc49e1SMichal Simek compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 18e2fc49e1SMichal Simek 19e2fc49e1SMichal Simek aliases { 20e2fc49e1SMichal Simek ethernet0 = &gem0; 21e2fc49e1SMichal Simek i2c0 = &i2c0; 22e2fc49e1SMichal Simek i2c1 = &i2c1; 23e2fc49e1SMichal Simek mmc0 = &sdhci1; 24e2fc49e1SMichal Simek rtc0 = &rtc; 25e2fc49e1SMichal Simek serial0 = &uart0; 26e2fc49e1SMichal Simek serial1 = &uart1; 27*b61c4ff9SMichal Simek usb0 = &usb0; 28*b61c4ff9SMichal Simek usb1 = &usb1; 29e2fc49e1SMichal Simek }; 30e2fc49e1SMichal Simek 31e2fc49e1SMichal Simek chosen { 32e2fc49e1SMichal Simek bootargs = "earlycon"; 33e2fc49e1SMichal Simek stdout-path = "serial0:115200n8"; 34e2fc49e1SMichal Simek }; 35e2fc49e1SMichal Simek 36e2fc49e1SMichal Simek memory@0 { 37e2fc49e1SMichal Simek device_type = "memory"; 38e2fc49e1SMichal Simek reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 39e2fc49e1SMichal Simek }; 40e2fc49e1SMichal Simek}; 41e2fc49e1SMichal Simek 42e2fc49e1SMichal Simek&fpd_dma_chan1 { 43e2fc49e1SMichal Simek status = "okay"; 44e2fc49e1SMichal Simek}; 45e2fc49e1SMichal Simek 46e2fc49e1SMichal Simek&fpd_dma_chan2 { 47e2fc49e1SMichal Simek status = "okay"; 48e2fc49e1SMichal Simek}; 49e2fc49e1SMichal Simek 50e2fc49e1SMichal Simek&fpd_dma_chan3 { 51e2fc49e1SMichal Simek status = "okay"; 52e2fc49e1SMichal Simek}; 53e2fc49e1SMichal Simek 54e2fc49e1SMichal Simek&fpd_dma_chan4 { 55e2fc49e1SMichal Simek status = "okay"; 56e2fc49e1SMichal Simek}; 57e2fc49e1SMichal Simek 58e2fc49e1SMichal Simek&fpd_dma_chan5 { 59e2fc49e1SMichal Simek status = "okay"; 60e2fc49e1SMichal Simek}; 61e2fc49e1SMichal Simek 62e2fc49e1SMichal Simek&fpd_dma_chan6 { 63e2fc49e1SMichal Simek status = "okay"; 64e2fc49e1SMichal Simek}; 65e2fc49e1SMichal Simek 66e2fc49e1SMichal Simek&fpd_dma_chan7 { 67e2fc49e1SMichal Simek status = "okay"; 68e2fc49e1SMichal Simek}; 69e2fc49e1SMichal Simek 70e2fc49e1SMichal Simek&fpd_dma_chan8 { 71e2fc49e1SMichal Simek status = "okay"; 72e2fc49e1SMichal Simek}; 73e2fc49e1SMichal Simek 74e2fc49e1SMichal Simek&gem0 { 75e2fc49e1SMichal Simek status = "okay"; 76e2fc49e1SMichal Simek phy-handle = <&phy0>; 77e2fc49e1SMichal Simek phy-mode = "rgmii-id"; 7813d21ebaSMichal Simek phy0: ethernet-phy@0 { /* VSC8211 */ 79e2fc49e1SMichal Simek reg = <0>; 80e2fc49e1SMichal Simek }; 81e2fc49e1SMichal Simek}; 82e2fc49e1SMichal Simek 83e2fc49e1SMichal Simek&gpio { 84e2fc49e1SMichal Simek status = "okay"; 85e2fc49e1SMichal Simek}; 86e2fc49e1SMichal Simek 87e2fc49e1SMichal Simek/* just eeprom here */ 88e2fc49e1SMichal Simek&i2c0 { 89e2fc49e1SMichal Simek status = "okay"; 90e2fc49e1SMichal Simek clock-frequency = <400000>; 91e2fc49e1SMichal Simek 92e2fc49e1SMichal Simek tca6416_u26: gpio@20 { 93e2fc49e1SMichal Simek compatible = "ti,tca6416"; 94e2fc49e1SMichal Simek reg = <0x20>; 95e2fc49e1SMichal Simek gpio-controller; 96e2fc49e1SMichal Simek #gpio-cells = <2>; 97e2fc49e1SMichal Simek /* IRQ not connected */ 98e2fc49e1SMichal Simek }; 99e2fc49e1SMichal Simek 100e2fc49e1SMichal Simek rtc@68 { 101e2fc49e1SMichal Simek compatible = "dallas,ds1339"; 102e2fc49e1SMichal Simek reg = <0x68>; 103e2fc49e1SMichal Simek }; 104e2fc49e1SMichal Simek}; 105e2fc49e1SMichal Simek 106e2fc49e1SMichal Simek/* eeprom24c02 and SE98A temp chip pca9306 */ 107e2fc49e1SMichal Simek&i2c1 { 108e2fc49e1SMichal Simek status = "okay"; 109e2fc49e1SMichal Simek clock-frequency = <400000>; 110e2fc49e1SMichal Simek}; 111e2fc49e1SMichal Simek 112f4df4f58SMichal Simek/* MT29F64G08AECDBJ4-6 */ 113f4df4f58SMichal Simek&nand0 { 114f4df4f58SMichal Simek status = "okay"; 115f4df4f58SMichal Simek arasan,has-mdma; 116f4df4f58SMichal Simek num-cs = <2>; 117f4df4f58SMichal Simek}; 118f4df4f58SMichal Simek 119e2fc49e1SMichal Simek&rtc { 120e2fc49e1SMichal Simek status = "okay"; 121e2fc49e1SMichal Simek}; 122e2fc49e1SMichal Simek 123e2fc49e1SMichal Simek&sata { 124e2fc49e1SMichal Simek status = "okay"; 125e2fc49e1SMichal Simek /* SATA phy OOB timing settings */ 126e2fc49e1SMichal Simek ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 127e2fc49e1SMichal Simek ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 128e2fc49e1SMichal Simek ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 129e2fc49e1SMichal Simek ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 130e2fc49e1SMichal Simek ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 131e2fc49e1SMichal Simek ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 132e2fc49e1SMichal Simek ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 133e2fc49e1SMichal Simek ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 134e2fc49e1SMichal Simek}; 135e2fc49e1SMichal Simek 136e2fc49e1SMichal Simek&sdhci1 { /* emmc with some settings */ 137e2fc49e1SMichal Simek status = "okay"; 138e2fc49e1SMichal Simek}; 139e2fc49e1SMichal Simek 140e2fc49e1SMichal Simek/* main */ 141e2fc49e1SMichal Simek&uart0 { 142e2fc49e1SMichal Simek status = "okay"; 143e2fc49e1SMichal Simek}; 144e2fc49e1SMichal Simek 145e2fc49e1SMichal Simek/* DB9 */ 146e2fc49e1SMichal Simek&uart1 { 147e2fc49e1SMichal Simek status = "okay"; 148e2fc49e1SMichal Simek}; 149e2fc49e1SMichal Simek 150e2fc49e1SMichal Simek&usb0 { 151e2fc49e1SMichal Simek status = "okay"; 152*b61c4ff9SMichal Simek}; 153*b61c4ff9SMichal Simek 154*b61c4ff9SMichal Simek&dwc3_0 { 155*b61c4ff9SMichal Simek status = "okay"; 156e2fc49e1SMichal Simek dr_mode = "host"; 157*b61c4ff9SMichal Simek snps,usb3_lpm_capable; 158*b61c4ff9SMichal Simek maximum-speed = "super-speed"; 159e2fc49e1SMichal Simek}; 160e2fc49e1SMichal Simek 161e2fc49e1SMichal Simek/* ULPI SMSC USB3320 */ 162e2fc49e1SMichal Simek&usb1 { 163e2fc49e1SMichal Simek status = "okay"; 164*b61c4ff9SMichal Simek}; 165*b61c4ff9SMichal Simek 166*b61c4ff9SMichal Simek&dwc3_1 { 167*b61c4ff9SMichal Simek status = "okay"; 168e2fc49e1SMichal Simek dr_mode = "host"; 169*b61c4ff9SMichal Simek snps,usb3_lpm_capable; 170*b61c4ff9SMichal Simek maximum-speed = "super-speed"; 171e2fc49e1SMichal Simek}; 172