1e2fc49e1SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 2e2fc49e1SMichal Simek/* 3e2fc49e1SMichal Simek * dts file for Xilinx ZynqMP zc1751-xm017-dc3 4e2fc49e1SMichal Simek * 5*9c8a47b4SRajan Vaja * (C) Copyright 2016 - 2019, Xilinx, Inc. 6e2fc49e1SMichal Simek * 7e2fc49e1SMichal Simek * Michal Simek <michal.simek@xilinx.com> 8e2fc49e1SMichal Simek */ 9e2fc49e1SMichal Simek 10e2fc49e1SMichal Simek/dts-v1/; 11e2fc49e1SMichal Simek 12e2fc49e1SMichal Simek#include "zynqmp.dtsi" 13*9c8a47b4SRajan Vaja#include "zynqmp-clk-ccf.dtsi" 14e2fc49e1SMichal Simek 15e2fc49e1SMichal Simek/ { 16e2fc49e1SMichal Simek model = "ZynqMP zc1751-xm017-dc3 RevA"; 17e2fc49e1SMichal Simek compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 18e2fc49e1SMichal Simek 19e2fc49e1SMichal Simek aliases { 20e2fc49e1SMichal Simek ethernet0 = &gem0; 21e2fc49e1SMichal Simek i2c0 = &i2c0; 22e2fc49e1SMichal Simek i2c1 = &i2c1; 23e2fc49e1SMichal Simek mmc0 = &sdhci1; 24e2fc49e1SMichal Simek rtc0 = &rtc; 25e2fc49e1SMichal Simek serial0 = &uart0; 26e2fc49e1SMichal Simek serial1 = &uart1; 27e2fc49e1SMichal Simek }; 28e2fc49e1SMichal Simek 29e2fc49e1SMichal Simek chosen { 30e2fc49e1SMichal Simek bootargs = "earlycon"; 31e2fc49e1SMichal Simek stdout-path = "serial0:115200n8"; 32e2fc49e1SMichal Simek }; 33e2fc49e1SMichal Simek 34e2fc49e1SMichal Simek memory@0 { 35e2fc49e1SMichal Simek device_type = "memory"; 36e2fc49e1SMichal Simek reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 37e2fc49e1SMichal Simek }; 38e2fc49e1SMichal Simek}; 39e2fc49e1SMichal Simek 40e2fc49e1SMichal Simek&fpd_dma_chan1 { 41e2fc49e1SMichal Simek status = "okay"; 42e2fc49e1SMichal Simek}; 43e2fc49e1SMichal Simek 44e2fc49e1SMichal Simek&fpd_dma_chan2 { 45e2fc49e1SMichal Simek status = "okay"; 46e2fc49e1SMichal Simek}; 47e2fc49e1SMichal Simek 48e2fc49e1SMichal Simek&fpd_dma_chan3 { 49e2fc49e1SMichal Simek status = "okay"; 50e2fc49e1SMichal Simek}; 51e2fc49e1SMichal Simek 52e2fc49e1SMichal Simek&fpd_dma_chan4 { 53e2fc49e1SMichal Simek status = "okay"; 54e2fc49e1SMichal Simek}; 55e2fc49e1SMichal Simek 56e2fc49e1SMichal Simek&fpd_dma_chan5 { 57e2fc49e1SMichal Simek status = "okay"; 58e2fc49e1SMichal Simek}; 59e2fc49e1SMichal Simek 60e2fc49e1SMichal Simek&fpd_dma_chan6 { 61e2fc49e1SMichal Simek status = "okay"; 62e2fc49e1SMichal Simek}; 63e2fc49e1SMichal Simek 64e2fc49e1SMichal Simek&fpd_dma_chan7 { 65e2fc49e1SMichal Simek status = "okay"; 66e2fc49e1SMichal Simek}; 67e2fc49e1SMichal Simek 68e2fc49e1SMichal Simek&fpd_dma_chan8 { 69e2fc49e1SMichal Simek status = "okay"; 70e2fc49e1SMichal Simek}; 71e2fc49e1SMichal Simek 72e2fc49e1SMichal Simek&gem0 { 73e2fc49e1SMichal Simek status = "okay"; 74e2fc49e1SMichal Simek phy-handle = <&phy0>; 75e2fc49e1SMichal Simek phy-mode = "rgmii-id"; 76e2fc49e1SMichal Simek phy0: phy@0 { /* VSC8211 */ 77e2fc49e1SMichal Simek reg = <0>; 78e2fc49e1SMichal Simek }; 79e2fc49e1SMichal Simek}; 80e2fc49e1SMichal Simek 81e2fc49e1SMichal Simek&gpio { 82e2fc49e1SMichal Simek status = "okay"; 83e2fc49e1SMichal Simek}; 84e2fc49e1SMichal Simek 85e2fc49e1SMichal Simek/* just eeprom here */ 86e2fc49e1SMichal Simek&i2c0 { 87e2fc49e1SMichal Simek status = "okay"; 88e2fc49e1SMichal Simek clock-frequency = <400000>; 89e2fc49e1SMichal Simek 90e2fc49e1SMichal Simek tca6416_u26: gpio@20 { 91e2fc49e1SMichal Simek compatible = "ti,tca6416"; 92e2fc49e1SMichal Simek reg = <0x20>; 93e2fc49e1SMichal Simek gpio-controller; 94e2fc49e1SMichal Simek #gpio-cells = <2>; 95e2fc49e1SMichal Simek /* IRQ not connected */ 96e2fc49e1SMichal Simek }; 97e2fc49e1SMichal Simek 98e2fc49e1SMichal Simek rtc@68 { 99e2fc49e1SMichal Simek compatible = "dallas,ds1339"; 100e2fc49e1SMichal Simek reg = <0x68>; 101e2fc49e1SMichal Simek }; 102e2fc49e1SMichal Simek}; 103e2fc49e1SMichal Simek 104e2fc49e1SMichal Simek/* eeprom24c02 and SE98A temp chip pca9306 */ 105e2fc49e1SMichal Simek&i2c1 { 106e2fc49e1SMichal Simek status = "okay"; 107e2fc49e1SMichal Simek clock-frequency = <400000>; 108e2fc49e1SMichal Simek}; 109e2fc49e1SMichal Simek 110e2fc49e1SMichal Simek&rtc { 111e2fc49e1SMichal Simek status = "okay"; 112e2fc49e1SMichal Simek}; 113e2fc49e1SMichal Simek 114e2fc49e1SMichal Simek&sata { 115e2fc49e1SMichal Simek status = "okay"; 116e2fc49e1SMichal Simek /* SATA phy OOB timing settings */ 117e2fc49e1SMichal Simek ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 118e2fc49e1SMichal Simek ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 119e2fc49e1SMichal Simek ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 120e2fc49e1SMichal Simek ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 121e2fc49e1SMichal Simek ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 122e2fc49e1SMichal Simek ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 123e2fc49e1SMichal Simek ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 124e2fc49e1SMichal Simek ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 125e2fc49e1SMichal Simek}; 126e2fc49e1SMichal Simek 127e2fc49e1SMichal Simek&sdhci1 { /* emmc with some settings */ 128e2fc49e1SMichal Simek status = "okay"; 129e2fc49e1SMichal Simek}; 130e2fc49e1SMichal Simek 131e2fc49e1SMichal Simek/* main */ 132e2fc49e1SMichal Simek&uart0 { 133e2fc49e1SMichal Simek status = "okay"; 134e2fc49e1SMichal Simek}; 135e2fc49e1SMichal Simek 136e2fc49e1SMichal Simek/* DB9 */ 137e2fc49e1SMichal Simek&uart1 { 138e2fc49e1SMichal Simek status = "okay"; 139e2fc49e1SMichal Simek}; 140e2fc49e1SMichal Simek 141e2fc49e1SMichal Simek&usb0 { 142e2fc49e1SMichal Simek status = "okay"; 143e2fc49e1SMichal Simek dr_mode = "host"; 144e2fc49e1SMichal Simek}; 145e2fc49e1SMichal Simek 146e2fc49e1SMichal Simek/* ULPI SMSC USB3320 */ 147e2fc49e1SMichal Simek&usb1 { 148e2fc49e1SMichal Simek status = "okay"; 149e2fc49e1SMichal Simek dr_mode = "host"; 150e2fc49e1SMichal Simek}; 151