1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 4 * 5 * EVM Board Schematics: https://www.ti.com/lit/zip/sprr458 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/net/ti-dp83867.h> 11#include <dt-bindings/gpio/gpio.h> 12#include "k3-j784s4.dtsi" 13#include "k3-j784s4-j742s2-evm-common.dtsi" 14 15/ { 16 compatible = "ti,j784s4-evm", "ti,j784s4"; 17 model = "Texas Instruments J784S4 EVM"; 18 19 memory@80000000 { 20 /* 32G RAM */ 21 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 22 <0x00000008 0x80000000 0x00000007 0x80000000>; 23 device_type = "memory"; 24 bootph-all; 25 }; 26 27 reserved_memory: reserved-memory { 28 #address-cells = <2>; 29 #size-cells = <2>; 30 31 c71_3_dma_memory_region: c71-dma-memory@ab000000 { 32 compatible = "shared-dma-pool"; 33 reg = <0x00 0xab000000 0x00 0x100000>; 34 no-map; 35 }; 36 37 c71_3_memory_region: c71-memory@ab100000 { 38 compatible = "shared-dma-pool"; 39 reg = <0x00 0xab100000 0x00 0xf00000>; 40 no-map; 41 }; 42 }; 43}; 44 45&mailbox0_cluster5 { 46 mbox_c71_3: mbox-c71-3 { 47 ti,mbox-rx = <2 0 0>; 48 ti,mbox-tx = <3 0 0>; 49 }; 50}; 51 52&c71_3 { 53 mboxes = <&mailbox0_cluster5 &mbox_c71_3>; 54 memory-region = <&c71_3_dma_memory_region>, 55 <&c71_3_memory_region>; 56 status = "okay"; 57}; 58