xref: /linux/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
6 */
7
8/dts-v1/;
9
10#include "k3-j721s2-som-p0.dtsi"
11#include <dt-bindings/net/ti-dp83867.h>
12
13/ {
14	compatible = "ti,j721s2-evm", "ti,j721s2";
15	model = "Texas Instruments J721S2 EVM";
16
17	chosen {
18		stdout-path = "serial2:115200n8";
19		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,2880000";
20	};
21
22	aliases {
23		serial1 = &mcu_uart0;
24		serial2 = &main_uart8;
25		mmc0 = &main_sdhci0;
26		mmc1 = &main_sdhci1;
27		can0 = &main_mcan16;
28		can1 = &mcu_mcan0;
29		can2 = &mcu_mcan1;
30	};
31
32	evm_12v0: fixedregulator-evm12v0 {
33		/* main supply */
34		compatible = "regulator-fixed";
35		regulator-name = "evm_12v0";
36		regulator-min-microvolt = <12000000>;
37		regulator-max-microvolt = <12000000>;
38		regulator-always-on;
39		regulator-boot-on;
40	};
41
42	vsys_3v3: fixedregulator-vsys3v3 {
43		/* Output of LM5140 */
44		compatible = "regulator-fixed";
45		regulator-name = "vsys_3v3";
46		regulator-min-microvolt = <3300000>;
47		regulator-max-microvolt = <3300000>;
48		vin-supply = <&evm_12v0>;
49		regulator-always-on;
50		regulator-boot-on;
51	};
52
53	vsys_5v0: fixedregulator-vsys5v0 {
54		/* Output of LM5140 */
55		compatible = "regulator-fixed";
56		regulator-name = "vsys_5v0";
57		regulator-min-microvolt = <5000000>;
58		regulator-max-microvolt = <5000000>;
59		vin-supply = <&evm_12v0>;
60		regulator-always-on;
61		regulator-boot-on;
62	};
63
64	vdd_mmc1: fixedregulator-sd {
65		/* Output of TPS22918 */
66		compatible = "regulator-fixed";
67		regulator-name = "vdd_mmc1";
68		regulator-min-microvolt = <3300000>;
69		regulator-max-microvolt = <3300000>;
70		regulator-boot-on;
71		enable-active-high;
72		vin-supply = <&vsys_3v3>;
73		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
74	};
75
76	vdd_sd_dv: gpio-regulator-TLV71033 {
77		/* Output of TLV71033 */
78		compatible = "regulator-gpio";
79		regulator-name = "tlv71033";
80		pinctrl-names = "default";
81		pinctrl-0 = <&vdd_sd_dv_pins_default>;
82		regulator-min-microvolt = <1800000>;
83		regulator-max-microvolt = <3300000>;
84		regulator-boot-on;
85		vin-supply = <&vsys_5v0>;
86		gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
87		states = <1800000 0x0>,
88			 <3300000 0x1>;
89	};
90
91	transceiver1: can-phy1 {
92		compatible = "ti,tcan1043";
93		#phy-cells = <0>;
94		max-bitrate = <5000000>;
95		pinctrl-names = "default";
96		pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
97		standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
98		enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
99	};
100
101	transceiver2: can-phy2 {
102		compatible = "ti,tcan1042";
103		#phy-cells = <0>;
104		max-bitrate = <5000000>;
105		pinctrl-names = "default";
106		pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
107		standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
108	};
109
110};
111
112&main_pmx0 {
113	main_uart8_pins_default: main-uart8-pins-default {
114		pinctrl-single,pins = <
115			J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
116			J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
117			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
118			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
119		>;
120	};
121
122	main_i2c3_pins_default: main-i2c3-pins-default {
123		pinctrl-single,pins = <
124			J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
125			J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
126		>;
127	};
128
129	main_mmc1_pins_default: main-mmc1-pins-default {
130		pinctrl-single,pins = <
131			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
132			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
133			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
134			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
135			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
136			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
137			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
138			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
139		>;
140	};
141
142	vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
143		pinctrl-single,pins = <
144			J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
145		>;
146	};
147};
148
149&wkup_pmx0 {
150	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
151		pinctrl-single,pins = <
152			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
153			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
154			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
155			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
156			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
157			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
158			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
159			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
160			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
161			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
162			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
163			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
164		>;
165	};
166
167	mcu_mdio_pins_default: mcu-mdio-pins-default {
168		pinctrl-single,pins = <
169			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
170			J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
171		>;
172	};
173
174	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
175		pinctrl-single,pins = <
176			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
177			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
178		>;
179	};
180
181	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
182		pinctrl-single,pins = <
183			J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
184			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */
185		>;
186	};
187
188	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
189		pinctrl-single,pins = <
190			J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */
191			J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */
192		>;
193	};
194
195	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
196		pinctrl-single,pins = <
197			J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
198		>;
199	};
200
201	mcu_adc0_pins_default: mcu-adc0-pins-default {
202		pinctrl-single,pins = <
203			J721S2_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */
204			J721S2_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */
205			J721S2_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */
206			J721S2_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */
207			J721S2_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */
208			J721S2_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */
209			J721S2_WKUP_IOPAD(0x14c, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */
210			J721S2_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */
211		>;
212	};
213
214	mcu_adc1_pins_default: mcu-adc1-pins-default {
215		pinctrl-single,pins = <
216			J721S2_WKUP_IOPAD(0x154, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */
217			J721S2_WKUP_IOPAD(0x158, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */
218			J721S2_WKUP_IOPAD(0x15c, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */
219			J721S2_WKUP_IOPAD(0x160, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */
220			J721S2_WKUP_IOPAD(0x164, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */
221			J721S2_WKUP_IOPAD(0x168, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */
222			J721S2_WKUP_IOPAD(0x16c, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */
223			J721S2_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */
224		>;
225	};
226};
227
228&main_gpio2 {
229	status = "disabled";
230};
231
232&main_gpio4 {
233	status = "disabled";
234};
235
236&main_gpio6 {
237	status = "disabled";
238};
239
240&wkup_gpio1 {
241	status = "disabled";
242};
243
244&wkup_uart0 {
245	status = "reserved";
246};
247
248&mcu_uart0 {
249	status = "okay";
250	/* Default pinmux */
251};
252
253&main_uart8 {
254	status = "okay";
255	pinctrl-names = "default";
256	pinctrl-0 = <&main_uart8_pins_default>;
257	/* Shared with TFA on this platform */
258	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
259};
260
261&main_i2c0 {
262	clock-frequency = <400000>;
263
264	exp1: gpio@20 {
265		compatible = "ti,tca6416";
266		reg = <0x20>;
267		gpio-controller;
268		#gpio-cells = <2>;
269		gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
270				  "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ",
271				  "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#",
272				  "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1",
273				  "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz";
274	};
275
276	exp2: gpio@22 {
277		compatible = "ti,tca6424";
278		reg = <0x22>;
279		gpio-controller;
280		#gpio-cells = <2>;
281		gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
282				  "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#",
283				  "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1",
284				  "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL",
285				  "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL",
286				  "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2";
287	};
288};
289
290&main_sdhci0 {
291	/* eMMC */
292	non-removable;
293	ti,driver-strength-ohm = <50>;
294	disable-wp;
295};
296
297&main_sdhci1 {
298	/* SD card */
299	pinctrl-0 = <&main_mmc1_pins_default>;
300	pinctrl-names = "default";
301	disable-wp;
302	vmmc-supply = <&vdd_mmc1>;
303	vqmmc-supply = <&vdd_sd_dv>;
304};
305
306&mcu_cpsw {
307	pinctrl-names = "default";
308	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
309};
310
311&davinci_mdio {
312	phy0: ethernet-phy@0 {
313		reg = <0>;
314		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
315		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
316		ti,min-output-impedance;
317	};
318};
319
320&cpsw_port1 {
321	phy-mode = "rgmii-rxid";
322	phy-handle = <&phy0>;
323};
324
325&mcu_mcan0 {
326	status = "okay";
327	pinctrl-names = "default";
328	pinctrl-0 = <&mcu_mcan0_pins_default>;
329	phys = <&transceiver1>;
330};
331
332&mcu_mcan1 {
333	status = "okay";
334	pinctrl-names = "default";
335	pinctrl-0 = <&mcu_mcan1_pins_default>;
336	phys = <&transceiver2>;
337};
338
339&tscadc0 {
340	pinctrl-0 = <&mcu_adc0_pins_default>;
341	pinctrl-names = "default";
342	status = "okay";
343	adc {
344		ti,adc-channels = <0 1 2 3 4 5 6 7>;
345	};
346};
347
348&tscadc1 {
349	pinctrl-0 = <&mcu_adc1_pins_default>;
350	pinctrl-names = "default";
351	status = "okay";
352	adc {
353		ti,adc-channels = <0 1 2 3 4 5 6 7>;
354	};
355};
356