1effb32e9SAswath Govindraju// SPDX-License-Identifier: GPL-2.0 2effb32e9SAswath Govindraju/* 3effb32e9SAswath Govindraju * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4effb32e9SAswath Govindraju * 5effb32e9SAswath Govindraju * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM 6effb32e9SAswath Govindraju */ 7effb32e9SAswath Govindraju 8effb32e9SAswath Govindraju/dts-v1/; 9effb32e9SAswath Govindraju 10effb32e9SAswath Govindraju#include "k3-j721s2-som-p0.dtsi" 11effb32e9SAswath Govindraju#include <dt-bindings/net/ti-dp83867.h> 12da61731dSAswath Govindraju#include <dt-bindings/phy/phy-cadence.h> 13da61731dSAswath Govindraju#include <dt-bindings/phy/phy.h> 14*8d08d7aaSJayesh Choudhary 15*8d08d7aaSJayesh Choudhary#include "k3-serdes.h" 16effb32e9SAswath Govindraju 17effb32e9SAswath Govindraju/ { 18effb32e9SAswath Govindraju compatible = "ti,j721s2-evm", "ti,j721s2"; 19effb32e9SAswath Govindraju model = "Texas Instruments J721S2 EVM"; 20effb32e9SAswath Govindraju 21effb32e9SAswath Govindraju chosen { 22aee744a3SAswath Govindraju stdout-path = "serial2:115200n8"; 23effb32e9SAswath Govindraju }; 24effb32e9SAswath Govindraju 2516521653SAswath Govindraju aliases { 2616521653SAswath Govindraju serial1 = &mcu_uart0; 27aee744a3SAswath Govindraju serial2 = &main_uart8; 2816521653SAswath Govindraju mmc0 = &main_sdhci0; 2916521653SAswath Govindraju mmc1 = &main_sdhci1; 3016521653SAswath Govindraju can0 = &main_mcan16; 3116521653SAswath Govindraju can1 = &mcu_mcan0; 3216521653SAswath Govindraju can2 = &mcu_mcan1; 3316521653SAswath Govindraju }; 3416521653SAswath Govindraju 35effb32e9SAswath Govindraju evm_12v0: fixedregulator-evm12v0 { 36effb32e9SAswath Govindraju /* main supply */ 37effb32e9SAswath Govindraju compatible = "regulator-fixed"; 38effb32e9SAswath Govindraju regulator-name = "evm_12v0"; 39effb32e9SAswath Govindraju regulator-min-microvolt = <12000000>; 40effb32e9SAswath Govindraju regulator-max-microvolt = <12000000>; 41effb32e9SAswath Govindraju regulator-always-on; 42effb32e9SAswath Govindraju regulator-boot-on; 43effb32e9SAswath Govindraju }; 44effb32e9SAswath Govindraju 45effb32e9SAswath Govindraju vsys_3v3: fixedregulator-vsys3v3 { 46effb32e9SAswath Govindraju /* Output of LM5140 */ 47effb32e9SAswath Govindraju compatible = "regulator-fixed"; 48effb32e9SAswath Govindraju regulator-name = "vsys_3v3"; 49effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 50effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 51effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 52effb32e9SAswath Govindraju regulator-always-on; 53effb32e9SAswath Govindraju regulator-boot-on; 54effb32e9SAswath Govindraju }; 55effb32e9SAswath Govindraju 56effb32e9SAswath Govindraju vsys_5v0: fixedregulator-vsys5v0 { 57effb32e9SAswath Govindraju /* Output of LM5140 */ 58effb32e9SAswath Govindraju compatible = "regulator-fixed"; 59effb32e9SAswath Govindraju regulator-name = "vsys_5v0"; 60effb32e9SAswath Govindraju regulator-min-microvolt = <5000000>; 61effb32e9SAswath Govindraju regulator-max-microvolt = <5000000>; 62effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 63effb32e9SAswath Govindraju regulator-always-on; 64effb32e9SAswath Govindraju regulator-boot-on; 65effb32e9SAswath Govindraju }; 66effb32e9SAswath Govindraju 67effb32e9SAswath Govindraju vdd_mmc1: fixedregulator-sd { 68effb32e9SAswath Govindraju /* Output of TPS22918 */ 69effb32e9SAswath Govindraju compatible = "regulator-fixed"; 70effb32e9SAswath Govindraju regulator-name = "vdd_mmc1"; 71effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 72effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 73effb32e9SAswath Govindraju regulator-boot-on; 74effb32e9SAswath Govindraju enable-active-high; 75effb32e9SAswath Govindraju vin-supply = <&vsys_3v3>; 76effb32e9SAswath Govindraju gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; 77effb32e9SAswath Govindraju }; 78effb32e9SAswath Govindraju 79effb32e9SAswath Govindraju vdd_sd_dv: gpio-regulator-TLV71033 { 80effb32e9SAswath Govindraju /* Output of TLV71033 */ 81effb32e9SAswath Govindraju compatible = "regulator-gpio"; 82effb32e9SAswath Govindraju regulator-name = "tlv71033"; 83effb32e9SAswath Govindraju pinctrl-names = "default"; 84effb32e9SAswath Govindraju pinctrl-0 = <&vdd_sd_dv_pins_default>; 85effb32e9SAswath Govindraju regulator-min-microvolt = <1800000>; 86effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 87effb32e9SAswath Govindraju regulator-boot-on; 88effb32e9SAswath Govindraju vin-supply = <&vsys_5v0>; 89effb32e9SAswath Govindraju gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; 90effb32e9SAswath Govindraju states = <1800000 0x0>, 91effb32e9SAswath Govindraju <3300000 0x1>; 92effb32e9SAswath Govindraju }; 93effb32e9SAswath Govindraju 94effb32e9SAswath Govindraju transceiver1: can-phy1 { 95effb32e9SAswath Govindraju compatible = "ti,tcan1043"; 96effb32e9SAswath Govindraju #phy-cells = <0>; 97effb32e9SAswath Govindraju max-bitrate = <5000000>; 98effb32e9SAswath Govindraju pinctrl-names = "default"; 99effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; 100effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>; 101effb32e9SAswath Govindraju enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>; 102effb32e9SAswath Govindraju }; 103effb32e9SAswath Govindraju 104effb32e9SAswath Govindraju transceiver2: can-phy2 { 105effb32e9SAswath Govindraju compatible = "ti,tcan1042"; 106effb32e9SAswath Govindraju #phy-cells = <0>; 107effb32e9SAswath Govindraju max-bitrate = <5000000>; 108effb32e9SAswath Govindraju pinctrl-names = "default"; 109effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; 110effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; 111effb32e9SAswath Govindraju }; 112effb32e9SAswath Govindraju 113effb32e9SAswath Govindraju}; 114effb32e9SAswath Govindraju 115effb32e9SAswath Govindraju&main_pmx0 { 116a4956811STony Lindgren main_uart8_pins_default: main-uart8-default-pins { 117effb32e9SAswath Govindraju pinctrl-single,pins = < 118effb32e9SAswath Govindraju J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ 119effb32e9SAswath Govindraju J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ 120effb32e9SAswath Govindraju J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ 121effb32e9SAswath Govindraju J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ 122effb32e9SAswath Govindraju >; 123effb32e9SAswath Govindraju }; 124effb32e9SAswath Govindraju 125a4956811STony Lindgren main_i2c3_pins_default: main-i2c3-default-pins { 126effb32e9SAswath Govindraju pinctrl-single,pins = < 127effb32e9SAswath Govindraju J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */ 128effb32e9SAswath Govindraju J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */ 129effb32e9SAswath Govindraju >; 130effb32e9SAswath Govindraju }; 131effb32e9SAswath Govindraju 132a4956811STony Lindgren main_mmc1_pins_default: main-mmc1-default-pins { 133effb32e9SAswath Govindraju pinctrl-single,pins = < 134effb32e9SAswath Govindraju J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ 135effb32e9SAswath Govindraju J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ 136effb32e9SAswath Govindraju J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ 137effb32e9SAswath Govindraju J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ 138effb32e9SAswath Govindraju J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ 139effb32e9SAswath Govindraju J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ 140effb32e9SAswath Govindraju J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ 141effb32e9SAswath Govindraju J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ 142effb32e9SAswath Govindraju >; 143effb32e9SAswath Govindraju }; 144effb32e9SAswath Govindraju 145a4956811STony Lindgren vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { 146effb32e9SAswath Govindraju pinctrl-single,pins = < 147effb32e9SAswath Govindraju J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ 148effb32e9SAswath Govindraju >; 149effb32e9SAswath Govindraju }; 1507743a9d7SAswath Govindraju 151a4956811STony Lindgren main_usbss0_pins_default: main-usbss0-default-pins { 1527743a9d7SAswath Govindraju pinctrl-single,pins = < 1537743a9d7SAswath Govindraju J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ 1547743a9d7SAswath Govindraju >; 1557743a9d7SAswath Govindraju }; 156effb32e9SAswath Govindraju}; 157effb32e9SAswath Govindraju 1586bc829ceSSinthu Raja&wkup_pmx2 { 159a4956811STony Lindgren wkup_uart0_pins_default: wkup-uart0-default-pins { 160f5e9ee0bSNishanth Menon pinctrl-single,pins = < 161f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ 162f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ 163f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ 164f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ 165f5e9ee0bSNishanth Menon >; 166f5e9ee0bSNishanth Menon }; 167f5e9ee0bSNishanth Menon 168a4956811STony Lindgren mcu_uart0_pins_default: mcu-uart0-default-pins { 169f5e9ee0bSNishanth Menon pinctrl-single,pins = < 170f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */ 171f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */ 172f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */ 173f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */ 174f5e9ee0bSNishanth Menon >; 175f5e9ee0bSNishanth Menon }; 176f5e9ee0bSNishanth Menon 177a4956811STony Lindgren mcu_cpsw_pins_default: mcu-cpsw-default-pins { 178effb32e9SAswath Govindraju pinctrl-single,pins = < 1796bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ 1806bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ 1816bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ 1826bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ 1836bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ 1846bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ 1856bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ 1866bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ 1876bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ 1886bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ 1896bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ 1906bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ 191effb32e9SAswath Govindraju >; 192effb32e9SAswath Govindraju }; 193effb32e9SAswath Govindraju 194a4956811STony Lindgren mcu_mdio_pins_default: mcu-mdio-default-pins { 195effb32e9SAswath Govindraju pinctrl-single,pins = < 1966bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ 1976bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ 198effb32e9SAswath Govindraju >; 199effb32e9SAswath Govindraju }; 200effb32e9SAswath Govindraju 201a4956811STony Lindgren mcu_mcan0_pins_default: mcu-mcan0-default-pins { 202effb32e9SAswath Govindraju pinctrl-single,pins = < 2036bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ 2046bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ 205effb32e9SAswath Govindraju >; 206effb32e9SAswath Govindraju }; 207effb32e9SAswath Govindraju 208a4956811STony Lindgren mcu_mcan1_pins_default: mcu-mcan1-default-pins { 209effb32e9SAswath Govindraju pinctrl-single,pins = < 2106bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ 2116bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /*(C23) WKUP_GPIO0_4.MCU_MCAN1_TX */ 212effb32e9SAswath Govindraju >; 213effb32e9SAswath Govindraju }; 214effb32e9SAswath Govindraju 215a4956811STony Lindgren mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { 216effb32e9SAswath Govindraju pinctrl-single,pins = < 2176bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */ 2186bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */ 219effb32e9SAswath Govindraju >; 220effb32e9SAswath Govindraju }; 221effb32e9SAswath Govindraju 222a4956811STony Lindgren mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { 223effb32e9SAswath Govindraju pinctrl-single,pins = < 2246bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */ 225effb32e9SAswath Govindraju >; 226effb32e9SAswath Govindraju }; 227cf2aacfeSBhavya Kapoor 228a4956811STony Lindgren mcu_adc0_pins_default: mcu-adc0-default-pins { 229cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2306bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */ 2316bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */ 2326bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */ 2336bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */ 2346bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */ 2356bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */ 2366bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */ 2376bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */ 238cf2aacfeSBhavya Kapoor >; 239cf2aacfeSBhavya Kapoor }; 240cf2aacfeSBhavya Kapoor 241a4956811STony Lindgren mcu_adc1_pins_default: mcu-adc1-default-pins { 242cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2436bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */ 2446bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */ 2456bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */ 2466bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */ 2476bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */ 2486bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */ 2496bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */ 2506bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */ 251cf2aacfeSBhavya Kapoor >; 252cf2aacfeSBhavya Kapoor }; 253bbabba4eSAswath Govindraju 254a4956811STony Lindgren mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { 255bbabba4eSAswath Govindraju pinctrl-single,pins = < 256bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */ 257bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */ 258bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x060, PIN_OUTPUT, 0) /* (C21) MCU_OSPI1_CSn1 */ 259bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */ 260bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */ 261bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */ 262bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */ 263bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */ 264bbabba4eSAswath Govindraju J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ 265bbabba4eSAswath Govindraju >; 266bbabba4eSAswath Govindraju }; 267effb32e9SAswath Govindraju}; 268effb32e9SAswath Govindraju 269effb32e9SAswath Govindraju&main_gpio2 { 270effb32e9SAswath Govindraju status = "disabled"; 271effb32e9SAswath Govindraju}; 272effb32e9SAswath Govindraju 273effb32e9SAswath Govindraju&main_gpio4 { 274effb32e9SAswath Govindraju status = "disabled"; 275effb32e9SAswath Govindraju}; 276effb32e9SAswath Govindraju 277effb32e9SAswath Govindraju&main_gpio6 { 278effb32e9SAswath Govindraju status = "disabled"; 279effb32e9SAswath Govindraju}; 280effb32e9SAswath Govindraju 281effb32e9SAswath Govindraju&wkup_gpio1 { 282effb32e9SAswath Govindraju status = "disabled"; 283effb32e9SAswath Govindraju}; 284effb32e9SAswath Govindraju 285effb32e9SAswath Govindraju&wkup_uart0 { 286effb32e9SAswath Govindraju status = "reserved"; 287f5e9ee0bSNishanth Menon pinctrl-names = "default"; 288f5e9ee0bSNishanth Menon pinctrl-0 = <&wkup_uart0_pins_default>; 289effb32e9SAswath Govindraju}; 290effb32e9SAswath Govindraju 2910e63f35aSAndrew Davis&mcu_uart0 { 2920e63f35aSAndrew Davis status = "okay"; 293f5e9ee0bSNishanth Menon pinctrl-names = "default"; 294f5e9ee0bSNishanth Menon pinctrl-0 = <&mcu_uart0_pins_default>; 295effb32e9SAswath Govindraju}; 296effb32e9SAswath Govindraju 297effb32e9SAswath Govindraju&main_uart8 { 2980e63f35aSAndrew Davis status = "okay"; 299effb32e9SAswath Govindraju pinctrl-names = "default"; 300effb32e9SAswath Govindraju pinctrl-0 = <&main_uart8_pins_default>; 301effb32e9SAswath Govindraju /* Shared with TFA on this platform */ 302effb32e9SAswath Govindraju power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; 303effb32e9SAswath Govindraju}; 304effb32e9SAswath Govindraju 305effb32e9SAswath Govindraju&main_i2c0 { 306effb32e9SAswath Govindraju clock-frequency = <400000>; 307effb32e9SAswath Govindraju 308effb32e9SAswath Govindraju exp1: gpio@20 { 309effb32e9SAswath Govindraju compatible = "ti,tca6416"; 310effb32e9SAswath Govindraju reg = <0x20>; 311effb32e9SAswath Govindraju gpio-controller; 312effb32e9SAswath Govindraju #gpio-cells = <2>; 313effb32e9SAswath Govindraju gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ", 314effb32e9SAswath Govindraju "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ", 315effb32e9SAswath Govindraju "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#", 316effb32e9SAswath Govindraju "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1", 317effb32e9SAswath Govindraju "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz"; 318effb32e9SAswath Govindraju }; 319effb32e9SAswath Govindraju 320effb32e9SAswath Govindraju exp2: gpio@22 { 321effb32e9SAswath Govindraju compatible = "ti,tca6424"; 322effb32e9SAswath Govindraju reg = <0x22>; 323effb32e9SAswath Govindraju gpio-controller; 324effb32e9SAswath Govindraju #gpio-cells = <2>; 325effb32e9SAswath Govindraju gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN", 326effb32e9SAswath Govindraju "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#", 327effb32e9SAswath Govindraju "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1", 328effb32e9SAswath Govindraju "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL", 329effb32e9SAswath Govindraju "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL", 330effb32e9SAswath Govindraju "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2"; 331effb32e9SAswath Govindraju }; 332effb32e9SAswath Govindraju}; 333effb32e9SAswath Govindraju 334effb32e9SAswath Govindraju&main_sdhci0 { 335effb32e9SAswath Govindraju /* eMMC */ 336effb32e9SAswath Govindraju non-removable; 337effb32e9SAswath Govindraju ti,driver-strength-ohm = <50>; 338effb32e9SAswath Govindraju disable-wp; 339effb32e9SAswath Govindraju}; 340effb32e9SAswath Govindraju 341effb32e9SAswath Govindraju&main_sdhci1 { 342effb32e9SAswath Govindraju /* SD card */ 343effb32e9SAswath Govindraju pinctrl-0 = <&main_mmc1_pins_default>; 344effb32e9SAswath Govindraju pinctrl-names = "default"; 345effb32e9SAswath Govindraju disable-wp; 346effb32e9SAswath Govindraju vmmc-supply = <&vdd_mmc1>; 347effb32e9SAswath Govindraju vqmmc-supply = <&vdd_sd_dv>; 348effb32e9SAswath Govindraju}; 349effb32e9SAswath Govindraju 350effb32e9SAswath Govindraju&mcu_cpsw { 351effb32e9SAswath Govindraju pinctrl-names = "default"; 3526a2baa85SNishanth Menon pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; 353effb32e9SAswath Govindraju}; 354effb32e9SAswath Govindraju 355effb32e9SAswath Govindraju&davinci_mdio { 356effb32e9SAswath Govindraju phy0: ethernet-phy@0 { 357effb32e9SAswath Govindraju reg = <0>; 358effb32e9SAswath Govindraju ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 359effb32e9SAswath Govindraju ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 360effb32e9SAswath Govindraju ti,min-output-impedance; 361effb32e9SAswath Govindraju }; 362effb32e9SAswath Govindraju}; 363effb32e9SAswath Govindraju 364effb32e9SAswath Govindraju&cpsw_port1 { 365effb32e9SAswath Govindraju phy-mode = "rgmii-rxid"; 366effb32e9SAswath Govindraju phy-handle = <&phy0>; 367effb32e9SAswath Govindraju}; 368effb32e9SAswath Govindraju 369da61731dSAswath Govindraju&serdes_ln_ctrl { 370da61731dSAswath Govindraju idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>, 371da61731dSAswath Govindraju <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>; 372da61731dSAswath Govindraju}; 373da61731dSAswath Govindraju 374da61731dSAswath Govindraju&serdes_refclk { 375da61731dSAswath Govindraju clock-frequency = <100000000>; 376da61731dSAswath Govindraju}; 377da61731dSAswath Govindraju 378da61731dSAswath Govindraju&serdes0 { 379da61731dSAswath Govindraju status = "okay"; 380da61731dSAswath Govindraju serdes0_pcie_link: phy@0 { 381da61731dSAswath Govindraju reg = <0>; 382da61731dSAswath Govindraju cdns,num-lanes = <1>; 383da61731dSAswath Govindraju #phy-cells = <0>; 384da61731dSAswath Govindraju cdns,phy-type = <PHY_TYPE_PCIE>; 385da61731dSAswath Govindraju resets = <&serdes_wiz0 1>; 386da61731dSAswath Govindraju }; 387da61731dSAswath Govindraju}; 388da61731dSAswath Govindraju 3897743a9d7SAswath Govindraju&usb_serdes_mux { 3907743a9d7SAswath Govindraju idle-states = <1>; /* USB0 to SERDES lane 1 */ 3917743a9d7SAswath Govindraju}; 3927743a9d7SAswath Govindraju 3937743a9d7SAswath Govindraju&usbss0 { 3947743a9d7SAswath Govindraju status = "okay"; 3957743a9d7SAswath Govindraju pinctrl-0 = <&main_usbss0_pins_default>; 3967743a9d7SAswath Govindraju pinctrl-names = "default"; 3977743a9d7SAswath Govindraju ti,vbus-divider; 3987743a9d7SAswath Govindraju ti,usb2-only; 3997743a9d7SAswath Govindraju}; 4007743a9d7SAswath Govindraju 4017743a9d7SAswath Govindraju&usb0 { 4027743a9d7SAswath Govindraju dr_mode = "otg"; 4037743a9d7SAswath Govindraju maximum-speed = "high-speed"; 4047743a9d7SAswath Govindraju}; 4057743a9d7SAswath Govindraju 406bbabba4eSAswath Govindraju&ospi1 { 407bbabba4eSAswath Govindraju status = "okay"; 408bbabba4eSAswath Govindraju pinctrl-names = "default"; 409bbabba4eSAswath Govindraju pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; 410bbabba4eSAswath Govindraju 411bbabba4eSAswath Govindraju flash@0 { 412bbabba4eSAswath Govindraju compatible = "jedec,spi-nor"; 413bbabba4eSAswath Govindraju reg = <0x0>; 414bbabba4eSAswath Govindraju spi-tx-bus-width = <1>; 415bbabba4eSAswath Govindraju spi-rx-bus-width = <4>; 416bbabba4eSAswath Govindraju spi-max-frequency = <40000000>; 417bbabba4eSAswath Govindraju cdns,tshsl-ns = <60>; 418bbabba4eSAswath Govindraju cdns,tsd2d-ns = <60>; 419bbabba4eSAswath Govindraju cdns,tchsh-ns = <60>; 420bbabba4eSAswath Govindraju cdns,tslch-ns = <60>; 421bbabba4eSAswath Govindraju cdns,read-delay = <2>; 422bbabba4eSAswath Govindraju }; 423bbabba4eSAswath Govindraju}; 424bbabba4eSAswath Govindraju 425715084ecSAswath Govindraju&pcie1_rc { 426715084ecSAswath Govindraju status = "okay"; 427715084ecSAswath Govindraju reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; 428715084ecSAswath Govindraju phys = <&serdes0_pcie_link>; 429715084ecSAswath Govindraju phy-names = "pcie-phy"; 430715084ecSAswath Govindraju num-lanes = <1>; 431715084ecSAswath Govindraju}; 432715084ecSAswath Govindraju 433effb32e9SAswath Govindraju&mcu_mcan0 { 43406639b8aSAndrew Davis status = "okay"; 435effb32e9SAswath Govindraju pinctrl-names = "default"; 436effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_pins_default>; 437effb32e9SAswath Govindraju phys = <&transceiver1>; 438effb32e9SAswath Govindraju}; 439effb32e9SAswath Govindraju 440effb32e9SAswath Govindraju&mcu_mcan1 { 44106639b8aSAndrew Davis status = "okay"; 442effb32e9SAswath Govindraju pinctrl-names = "default"; 443effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_pins_default>; 444effb32e9SAswath Govindraju phys = <&transceiver2>; 445effb32e9SAswath Govindraju}; 446cf2aacfeSBhavya Kapoor 447cf2aacfeSBhavya Kapoor&tscadc0 { 448cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc0_pins_default>; 449cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 450cf2aacfeSBhavya Kapoor status = "okay"; 451cf2aacfeSBhavya Kapoor adc { 452cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 453cf2aacfeSBhavya Kapoor }; 454cf2aacfeSBhavya Kapoor}; 455cf2aacfeSBhavya Kapoor 456cf2aacfeSBhavya Kapoor&tscadc1 { 457cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc1_pins_default>; 458cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 459cf2aacfeSBhavya Kapoor status = "okay"; 460cf2aacfeSBhavya Kapoor adc { 461cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 462cf2aacfeSBhavya Kapoor }; 463cf2aacfeSBhavya Kapoor}; 464