125aec8a6SNishanth Menon// SPDX-License-Identifier: GPL-2.0-only OR MIT 2effb32e9SAswath Govindraju/* 325aec8a6SNishanth Menon * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 4effb32e9SAswath Govindraju * 5effb32e9SAswath Govindraju * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM 6effb32e9SAswath Govindraju */ 7effb32e9SAswath Govindraju 8effb32e9SAswath Govindraju/dts-v1/; 9effb32e9SAswath Govindraju 10effb32e9SAswath Govindraju#include "k3-j721s2-som-p0.dtsi" 11effb32e9SAswath Govindraju#include <dt-bindings/net/ti-dp83867.h> 12da61731dSAswath Govindraju#include <dt-bindings/phy/phy-cadence.h> 13da61731dSAswath Govindraju#include <dt-bindings/phy/phy.h> 148d08d7aaSJayesh Choudhary 158d08d7aaSJayesh Choudhary#include "k3-serdes.h" 16effb32e9SAswath Govindraju 17effb32e9SAswath Govindraju/ { 18effb32e9SAswath Govindraju compatible = "ti,j721s2-evm", "ti,j721s2"; 19effb32e9SAswath Govindraju model = "Texas Instruments J721S2 EVM"; 20effb32e9SAswath Govindraju 21effb32e9SAswath Govindraju chosen { 22aee744a3SAswath Govindraju stdout-path = "serial2:115200n8"; 23effb32e9SAswath Govindraju }; 24effb32e9SAswath Govindraju 2516521653SAswath Govindraju aliases { 2616521653SAswath Govindraju serial1 = &mcu_uart0; 27aee744a3SAswath Govindraju serial2 = &main_uart8; 2816521653SAswath Govindraju mmc0 = &main_sdhci0; 2916521653SAswath Govindraju mmc1 = &main_sdhci1; 3016521653SAswath Govindraju can0 = &main_mcan16; 3116521653SAswath Govindraju can1 = &mcu_mcan0; 3216521653SAswath Govindraju can2 = &mcu_mcan1; 3398f3b667SBhavya Kapoor can3 = &main_mcan3; 3498f3b667SBhavya Kapoor can4 = &main_mcan5; 3516521653SAswath Govindraju }; 3616521653SAswath Govindraju 37effb32e9SAswath Govindraju evm_12v0: fixedregulator-evm12v0 { 38effb32e9SAswath Govindraju /* main supply */ 39effb32e9SAswath Govindraju compatible = "regulator-fixed"; 40effb32e9SAswath Govindraju regulator-name = "evm_12v0"; 41effb32e9SAswath Govindraju regulator-min-microvolt = <12000000>; 42effb32e9SAswath Govindraju regulator-max-microvolt = <12000000>; 43effb32e9SAswath Govindraju regulator-always-on; 44effb32e9SAswath Govindraju regulator-boot-on; 45effb32e9SAswath Govindraju }; 46effb32e9SAswath Govindraju 47effb32e9SAswath Govindraju vsys_3v3: fixedregulator-vsys3v3 { 48effb32e9SAswath Govindraju /* Output of LM5140 */ 49effb32e9SAswath Govindraju compatible = "regulator-fixed"; 50effb32e9SAswath Govindraju regulator-name = "vsys_3v3"; 51effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 52effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 53effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 54effb32e9SAswath Govindraju regulator-always-on; 55effb32e9SAswath Govindraju regulator-boot-on; 56effb32e9SAswath Govindraju }; 57effb32e9SAswath Govindraju 58effb32e9SAswath Govindraju vsys_5v0: fixedregulator-vsys5v0 { 59effb32e9SAswath Govindraju /* Output of LM5140 */ 60effb32e9SAswath Govindraju compatible = "regulator-fixed"; 61effb32e9SAswath Govindraju regulator-name = "vsys_5v0"; 62effb32e9SAswath Govindraju regulator-min-microvolt = <5000000>; 63effb32e9SAswath Govindraju regulator-max-microvolt = <5000000>; 64effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 65effb32e9SAswath Govindraju regulator-always-on; 66effb32e9SAswath Govindraju regulator-boot-on; 67effb32e9SAswath Govindraju }; 68effb32e9SAswath Govindraju 69effb32e9SAswath Govindraju vdd_mmc1: fixedregulator-sd { 70effb32e9SAswath Govindraju /* Output of TPS22918 */ 71effb32e9SAswath Govindraju compatible = "regulator-fixed"; 72effb32e9SAswath Govindraju regulator-name = "vdd_mmc1"; 73effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 74effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 75effb32e9SAswath Govindraju regulator-boot-on; 76effb32e9SAswath Govindraju enable-active-high; 77effb32e9SAswath Govindraju vin-supply = <&vsys_3v3>; 78effb32e9SAswath Govindraju gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; 79effb32e9SAswath Govindraju }; 80effb32e9SAswath Govindraju 81effb32e9SAswath Govindraju vdd_sd_dv: gpio-regulator-TLV71033 { 82effb32e9SAswath Govindraju /* Output of TLV71033 */ 83effb32e9SAswath Govindraju compatible = "regulator-gpio"; 84effb32e9SAswath Govindraju regulator-name = "tlv71033"; 85effb32e9SAswath Govindraju pinctrl-names = "default"; 86effb32e9SAswath Govindraju pinctrl-0 = <&vdd_sd_dv_pins_default>; 87effb32e9SAswath Govindraju regulator-min-microvolt = <1800000>; 88effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 89effb32e9SAswath Govindraju regulator-boot-on; 90effb32e9SAswath Govindraju vin-supply = <&vsys_5v0>; 91effb32e9SAswath Govindraju gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; 92effb32e9SAswath Govindraju states = <1800000 0x0>, 93effb32e9SAswath Govindraju <3300000 0x1>; 94effb32e9SAswath Govindraju }; 95effb32e9SAswath Govindraju 96effb32e9SAswath Govindraju transceiver1: can-phy1 { 97effb32e9SAswath Govindraju compatible = "ti,tcan1043"; 98effb32e9SAswath Govindraju #phy-cells = <0>; 99effb32e9SAswath Govindraju max-bitrate = <5000000>; 100effb32e9SAswath Govindraju pinctrl-names = "default"; 101effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; 102effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>; 103effb32e9SAswath Govindraju enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>; 104effb32e9SAswath Govindraju }; 105effb32e9SAswath Govindraju 106effb32e9SAswath Govindraju transceiver2: can-phy2 { 107effb32e9SAswath Govindraju compatible = "ti,tcan1042"; 108effb32e9SAswath Govindraju #phy-cells = <0>; 109effb32e9SAswath Govindraju max-bitrate = <5000000>; 110effb32e9SAswath Govindraju pinctrl-names = "default"; 111effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; 112effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; 113effb32e9SAswath Govindraju }; 114effb32e9SAswath Govindraju 11598f3b667SBhavya Kapoor transceiver3: can-phy3 { 11698f3b667SBhavya Kapoor compatible = "ti,tcan1043"; 11798f3b667SBhavya Kapoor #phy-cells = <0>; 11898f3b667SBhavya Kapoor max-bitrate = <5000000>; 11998f3b667SBhavya Kapoor standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>; 12098f3b667SBhavya Kapoor enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; 12198f3b667SBhavya Kapoor mux-states = <&mux0 1>; 12298f3b667SBhavya Kapoor }; 12398f3b667SBhavya Kapoor 12498f3b667SBhavya Kapoor transceiver4: can-phy4 { 12598f3b667SBhavya Kapoor compatible = "ti,tcan1042"; 12698f3b667SBhavya Kapoor #phy-cells = <0>; 12798f3b667SBhavya Kapoor max-bitrate = <5000000>; 12898f3b667SBhavya Kapoor standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>; 12998f3b667SBhavya Kapoor mux-states = <&mux1 1>; 13098f3b667SBhavya Kapoor }; 131effb32e9SAswath Govindraju}; 132effb32e9SAswath Govindraju 133effb32e9SAswath Govindraju&main_pmx0 { 134a4956811STony Lindgren main_uart8_pins_default: main-uart8-default-pins { 135effb32e9SAswath Govindraju pinctrl-single,pins = < 136effb32e9SAswath Govindraju J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ 137effb32e9SAswath Govindraju J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ 138effb32e9SAswath Govindraju J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ 139effb32e9SAswath Govindraju J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ 140effb32e9SAswath Govindraju >; 141effb32e9SAswath Govindraju }; 142effb32e9SAswath Govindraju 143a4956811STony Lindgren main_i2c3_pins_default: main-i2c3-default-pins { 144effb32e9SAswath Govindraju pinctrl-single,pins = < 145effb32e9SAswath Govindraju J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */ 146effb32e9SAswath Govindraju J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */ 147effb32e9SAswath Govindraju >; 148effb32e9SAswath Govindraju }; 149effb32e9SAswath Govindraju 150*f00c6eadSVaishnav Achath main_i2c5_pins_default: main-i2c5-default-pins { 151*f00c6eadSVaishnav Achath pinctrl-single,pins = < 152*f00c6eadSVaishnav Achath J721S2_IOPAD(0x01c, PIN_INPUT, 8) /* (Y24) MCAN15_TX.I2C5_SCL */ 153*f00c6eadSVaishnav Achath J721S2_IOPAD(0x018, PIN_INPUT, 8) /* (W23) MCAN14_RX.I2C5_SDA */ 154*f00c6eadSVaishnav Achath >; 155*f00c6eadSVaishnav Achath }; 156*f00c6eadSVaishnav Achath 157a4956811STony Lindgren main_mmc1_pins_default: main-mmc1-default-pins { 158effb32e9SAswath Govindraju pinctrl-single,pins = < 159effb32e9SAswath Govindraju J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ 160effb32e9SAswath Govindraju J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ 161effb32e9SAswath Govindraju J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ 162effb32e9SAswath Govindraju J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ 163effb32e9SAswath Govindraju J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ 164effb32e9SAswath Govindraju J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ 165effb32e9SAswath Govindraju J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ 166effb32e9SAswath Govindraju J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ 167effb32e9SAswath Govindraju >; 168effb32e9SAswath Govindraju }; 169effb32e9SAswath Govindraju 170a4956811STony Lindgren vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { 171effb32e9SAswath Govindraju pinctrl-single,pins = < 172effb32e9SAswath Govindraju J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ 173effb32e9SAswath Govindraju >; 174effb32e9SAswath Govindraju }; 1757743a9d7SAswath Govindraju 176a4956811STony Lindgren main_usbss0_pins_default: main-usbss0-default-pins { 1777743a9d7SAswath Govindraju pinctrl-single,pins = < 1787743a9d7SAswath Govindraju J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ 1797743a9d7SAswath Govindraju >; 1807743a9d7SAswath Govindraju }; 18198f3b667SBhavya Kapoor 18298f3b667SBhavya Kapoor main_mcan3_pins_default: main-mcan3-default-pins { 18398f3b667SBhavya Kapoor pinctrl-single,pins = < 18498f3b667SBhavya Kapoor J721S2_IOPAD(0x080, PIN_INPUT, 0) /* (U26) MCASP0_AXR4.MCAN3_RX */ 18598f3b667SBhavya Kapoor J721S2_IOPAD(0x07c, PIN_OUTPUT, 0) /* (T27) MCASP0_AXR3.MCAN3_TX */ 18698f3b667SBhavya Kapoor >; 18798f3b667SBhavya Kapoor }; 18898f3b667SBhavya Kapoor 18998f3b667SBhavya Kapoor main_mcan5_pins_default: main-mcan5-default-pins { 19098f3b667SBhavya Kapoor pinctrl-single,pins = < 19198f3b667SBhavya Kapoor J721S2_IOPAD(0x03c, PIN_INPUT, 0) /* (U27) MCASP0_AFSX.MCAN5_RX */ 19298f3b667SBhavya Kapoor J721S2_IOPAD(0x038, PIN_OUTPUT, 0) /* (AB28) MCASP0_ACLKX.MCAN5_TX */ 19398f3b667SBhavya Kapoor >; 19498f3b667SBhavya Kapoor }; 195effb32e9SAswath Govindraju}; 196effb32e9SAswath Govindraju 1976bc829ceSSinthu Raja&wkup_pmx2 { 198a4956811STony Lindgren wkup_uart0_pins_default: wkup-uart0-default-pins { 199f5e9ee0bSNishanth Menon pinctrl-single,pins = < 200f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ 201f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ 202f5e9ee0bSNishanth Menon >; 203f5e9ee0bSNishanth Menon }; 204f5e9ee0bSNishanth Menon 205a4956811STony Lindgren mcu_uart0_pins_default: mcu-uart0-default-pins { 206f5e9ee0bSNishanth Menon pinctrl-single,pins = < 207f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */ 208f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */ 209f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */ 210f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */ 211f5e9ee0bSNishanth Menon >; 212f5e9ee0bSNishanth Menon }; 213f5e9ee0bSNishanth Menon 214a4956811STony Lindgren mcu_cpsw_pins_default: mcu-cpsw-default-pins { 215effb32e9SAswath Govindraju pinctrl-single,pins = < 2166bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ 2176bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ 2186bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ 2196bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ 2206bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ 2216bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ 2226bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ 2236bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ 2246bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ 2256bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ 2266bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ 2276bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ 228effb32e9SAswath Govindraju >; 229effb32e9SAswath Govindraju }; 230effb32e9SAswath Govindraju 231a4956811STony Lindgren mcu_mdio_pins_default: mcu-mdio-default-pins { 232effb32e9SAswath Govindraju pinctrl-single,pins = < 2336bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ 2346bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ 235effb32e9SAswath Govindraju >; 236effb32e9SAswath Govindraju }; 237effb32e9SAswath Govindraju 238a4956811STony Lindgren mcu_mcan0_pins_default: mcu-mcan0-default-pins { 239effb32e9SAswath Govindraju pinctrl-single,pins = < 2406bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ 2416bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ 242effb32e9SAswath Govindraju >; 243effb32e9SAswath Govindraju }; 244effb32e9SAswath Govindraju 245a4956811STony Lindgren mcu_mcan1_pins_default: mcu-mcan1-default-pins { 246effb32e9SAswath Govindraju pinctrl-single,pins = < 2476bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ 2486bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /*(C23) WKUP_GPIO0_4.MCU_MCAN1_TX */ 249effb32e9SAswath Govindraju >; 250effb32e9SAswath Govindraju }; 251effb32e9SAswath Govindraju 252a4956811STony Lindgren mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { 253effb32e9SAswath Govindraju pinctrl-single,pins = < 2546bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */ 2556bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */ 256effb32e9SAswath Govindraju >; 257effb32e9SAswath Govindraju }; 258effb32e9SAswath Govindraju 259a4956811STony Lindgren mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { 260effb32e9SAswath Govindraju pinctrl-single,pins = < 2616bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */ 262effb32e9SAswath Govindraju >; 263effb32e9SAswath Govindraju }; 264cf2aacfeSBhavya Kapoor 265a4956811STony Lindgren mcu_adc0_pins_default: mcu-adc0-default-pins { 266cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2676bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */ 2686bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */ 2696bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */ 2706bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */ 2716bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */ 2726bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */ 2736bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */ 2746bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */ 275cf2aacfeSBhavya Kapoor >; 276cf2aacfeSBhavya Kapoor }; 277cf2aacfeSBhavya Kapoor 278a4956811STony Lindgren mcu_adc1_pins_default: mcu-adc1-default-pins { 279cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2806bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */ 2816bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */ 2826bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */ 2836bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */ 2846bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */ 2856bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */ 2866bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */ 2876bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */ 288cf2aacfeSBhavya Kapoor >; 289cf2aacfeSBhavya Kapoor }; 29006c4e7aaSUdit Kumar}; 291bbabba4eSAswath Govindraju 29206c4e7aaSUdit Kumar&wkup_pmx1 { 293a4956811STony Lindgren mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { 294bbabba4eSAswath Govindraju pinctrl-single,pins = < 29506c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */ 29606c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */ 29706c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */ 29806c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */ 29906c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */ 30006c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */ 30106c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */ 30206c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ 303bbabba4eSAswath Govindraju >; 304bbabba4eSAswath Govindraju }; 305effb32e9SAswath Govindraju}; 306effb32e9SAswath Govindraju 307578bf4d0SAndrew Davis&main_gpio0 { 308578bf4d0SAndrew Davis status = "okay"; 309effb32e9SAswath Govindraju}; 310effb32e9SAswath Govindraju 311578bf4d0SAndrew Davis&wkup_gpio0 { 312578bf4d0SAndrew Davis status = "okay"; 313effb32e9SAswath Govindraju}; 314effb32e9SAswath Govindraju 315effb32e9SAswath Govindraju&wkup_uart0 { 316effb32e9SAswath Govindraju status = "reserved"; 317f5e9ee0bSNishanth Menon pinctrl-names = "default"; 318f5e9ee0bSNishanth Menon pinctrl-0 = <&wkup_uart0_pins_default>; 319effb32e9SAswath Govindraju}; 320effb32e9SAswath Govindraju 3210e63f35aSAndrew Davis&mcu_uart0 { 3220e63f35aSAndrew Davis status = "okay"; 323f5e9ee0bSNishanth Menon pinctrl-names = "default"; 324f5e9ee0bSNishanth Menon pinctrl-0 = <&mcu_uart0_pins_default>; 325effb32e9SAswath Govindraju}; 326effb32e9SAswath Govindraju 327effb32e9SAswath Govindraju&main_uart8 { 3280e63f35aSAndrew Davis status = "okay"; 329effb32e9SAswath Govindraju pinctrl-names = "default"; 330effb32e9SAswath Govindraju pinctrl-0 = <&main_uart8_pins_default>; 331effb32e9SAswath Govindraju /* Shared with TFA on this platform */ 332effb32e9SAswath Govindraju power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; 333effb32e9SAswath Govindraju}; 334effb32e9SAswath Govindraju 335effb32e9SAswath Govindraju&main_i2c0 { 336effb32e9SAswath Govindraju clock-frequency = <400000>; 337effb32e9SAswath Govindraju 338effb32e9SAswath Govindraju exp1: gpio@20 { 339effb32e9SAswath Govindraju compatible = "ti,tca6416"; 340effb32e9SAswath Govindraju reg = <0x20>; 341effb32e9SAswath Govindraju gpio-controller; 342effb32e9SAswath Govindraju #gpio-cells = <2>; 343effb32e9SAswath Govindraju gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ", 344effb32e9SAswath Govindraju "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ", 345effb32e9SAswath Govindraju "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#", 346effb32e9SAswath Govindraju "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1", 347effb32e9SAswath Govindraju "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz"; 348effb32e9SAswath Govindraju }; 349effb32e9SAswath Govindraju 350effb32e9SAswath Govindraju exp2: gpio@22 { 351effb32e9SAswath Govindraju compatible = "ti,tca6424"; 352effb32e9SAswath Govindraju reg = <0x22>; 353effb32e9SAswath Govindraju gpio-controller; 354effb32e9SAswath Govindraju #gpio-cells = <2>; 355effb32e9SAswath Govindraju gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN", 356effb32e9SAswath Govindraju "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#", 357effb32e9SAswath Govindraju "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1", 358effb32e9SAswath Govindraju "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL", 359effb32e9SAswath Govindraju "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL", 360effb32e9SAswath Govindraju "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2"; 361effb32e9SAswath Govindraju }; 362effb32e9SAswath Govindraju}; 363effb32e9SAswath Govindraju 364*f00c6eadSVaishnav Achath&main_i2c5 { 365*f00c6eadSVaishnav Achath pinctrl-names = "default"; 366*f00c6eadSVaishnav Achath pinctrl-0 = <&main_i2c5_pins_default>; 367*f00c6eadSVaishnav Achath clock-frequency = <400000>; 368*f00c6eadSVaishnav Achath status = "okay"; 369*f00c6eadSVaishnav Achath 370*f00c6eadSVaishnav Achath exp5: gpio@20 { 371*f00c6eadSVaishnav Achath compatible = "ti,tca6408"; 372*f00c6eadSVaishnav Achath reg = <0x20>; 373*f00c6eadSVaishnav Achath gpio-controller; 374*f00c6eadSVaishnav Achath #gpio-cells = <2>; 375*f00c6eadSVaishnav Achath gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0", 376*f00c6eadSVaishnav Achath "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO2", 377*f00c6eadSVaishnav Achath "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2", 378*f00c6eadSVaishnav Achath "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4"; 379*f00c6eadSVaishnav Achath }; 380*f00c6eadSVaishnav Achath}; 381*f00c6eadSVaishnav Achath 382effb32e9SAswath Govindraju&main_sdhci0 { 383effb32e9SAswath Govindraju /* eMMC */ 3845f715be3SAndrew Davis status = "okay"; 385effb32e9SAswath Govindraju non-removable; 386effb32e9SAswath Govindraju ti,driver-strength-ohm = <50>; 387effb32e9SAswath Govindraju disable-wp; 388effb32e9SAswath Govindraju}; 389effb32e9SAswath Govindraju 390effb32e9SAswath Govindraju&main_sdhci1 { 391effb32e9SAswath Govindraju /* SD card */ 3925f715be3SAndrew Davis status = "okay"; 393effb32e9SAswath Govindraju pinctrl-0 = <&main_mmc1_pins_default>; 394effb32e9SAswath Govindraju pinctrl-names = "default"; 395effb32e9SAswath Govindraju disable-wp; 396effb32e9SAswath Govindraju vmmc-supply = <&vdd_mmc1>; 397effb32e9SAswath Govindraju vqmmc-supply = <&vdd_sd_dv>; 398effb32e9SAswath Govindraju}; 399effb32e9SAswath Govindraju 400effb32e9SAswath Govindraju&mcu_cpsw { 401effb32e9SAswath Govindraju pinctrl-names = "default"; 4026a2baa85SNishanth Menon pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; 403effb32e9SAswath Govindraju}; 404effb32e9SAswath Govindraju 405effb32e9SAswath Govindraju&davinci_mdio { 406effb32e9SAswath Govindraju phy0: ethernet-phy@0 { 407effb32e9SAswath Govindraju reg = <0>; 408effb32e9SAswath Govindraju ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 409effb32e9SAswath Govindraju ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 410effb32e9SAswath Govindraju ti,min-output-impedance; 411effb32e9SAswath Govindraju }; 412effb32e9SAswath Govindraju}; 413effb32e9SAswath Govindraju 414effb32e9SAswath Govindraju&cpsw_port1 { 415effb32e9SAswath Govindraju phy-mode = "rgmii-rxid"; 416effb32e9SAswath Govindraju phy-handle = <&phy0>; 417effb32e9SAswath Govindraju}; 418effb32e9SAswath Govindraju 419da61731dSAswath Govindraju&serdes_ln_ctrl { 420da61731dSAswath Govindraju idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>, 421da61731dSAswath Govindraju <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>; 422da61731dSAswath Govindraju}; 423da61731dSAswath Govindraju 424da61731dSAswath Govindraju&serdes_refclk { 425da61731dSAswath Govindraju clock-frequency = <100000000>; 426da61731dSAswath Govindraju}; 427da61731dSAswath Govindraju 428da61731dSAswath Govindraju&serdes0 { 429da61731dSAswath Govindraju status = "okay"; 430da61731dSAswath Govindraju serdes0_pcie_link: phy@0 { 431da61731dSAswath Govindraju reg = <0>; 432da61731dSAswath Govindraju cdns,num-lanes = <1>; 433da61731dSAswath Govindraju #phy-cells = <0>; 434da61731dSAswath Govindraju cdns,phy-type = <PHY_TYPE_PCIE>; 435da61731dSAswath Govindraju resets = <&serdes_wiz0 1>; 436da61731dSAswath Govindraju }; 437da61731dSAswath Govindraju}; 438da61731dSAswath Govindraju 4397743a9d7SAswath Govindraju&usb_serdes_mux { 4407743a9d7SAswath Govindraju idle-states = <1>; /* USB0 to SERDES lane 1 */ 4417743a9d7SAswath Govindraju}; 4427743a9d7SAswath Govindraju 4437743a9d7SAswath Govindraju&usbss0 { 4447743a9d7SAswath Govindraju status = "okay"; 4457743a9d7SAswath Govindraju pinctrl-0 = <&main_usbss0_pins_default>; 4467743a9d7SAswath Govindraju pinctrl-names = "default"; 4477743a9d7SAswath Govindraju ti,vbus-divider; 4487743a9d7SAswath Govindraju ti,usb2-only; 4497743a9d7SAswath Govindraju}; 4507743a9d7SAswath Govindraju 4517743a9d7SAswath Govindraju&usb0 { 4527743a9d7SAswath Govindraju dr_mode = "otg"; 4537743a9d7SAswath Govindraju maximum-speed = "high-speed"; 4547743a9d7SAswath Govindraju}; 4557743a9d7SAswath Govindraju 456bbabba4eSAswath Govindraju&ospi1 { 457bbabba4eSAswath Govindraju status = "okay"; 458bbabba4eSAswath Govindraju pinctrl-names = "default"; 459bbabba4eSAswath Govindraju pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; 460bbabba4eSAswath Govindraju 461bbabba4eSAswath Govindraju flash@0 { 462bbabba4eSAswath Govindraju compatible = "jedec,spi-nor"; 463bbabba4eSAswath Govindraju reg = <0x0>; 464bbabba4eSAswath Govindraju spi-tx-bus-width = <1>; 465bbabba4eSAswath Govindraju spi-rx-bus-width = <4>; 466bbabba4eSAswath Govindraju spi-max-frequency = <40000000>; 467bbabba4eSAswath Govindraju cdns,tshsl-ns = <60>; 468bbabba4eSAswath Govindraju cdns,tsd2d-ns = <60>; 469bbabba4eSAswath Govindraju cdns,tchsh-ns = <60>; 470bbabba4eSAswath Govindraju cdns,tslch-ns = <60>; 471bbabba4eSAswath Govindraju cdns,read-delay = <2>; 472bbabba4eSAswath Govindraju }; 473bbabba4eSAswath Govindraju}; 474bbabba4eSAswath Govindraju 475715084ecSAswath Govindraju&pcie1_rc { 476715084ecSAswath Govindraju status = "okay"; 477715084ecSAswath Govindraju reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; 478715084ecSAswath Govindraju phys = <&serdes0_pcie_link>; 479715084ecSAswath Govindraju phy-names = "pcie-phy"; 480715084ecSAswath Govindraju num-lanes = <1>; 481715084ecSAswath Govindraju}; 482715084ecSAswath Govindraju 483effb32e9SAswath Govindraju&mcu_mcan0 { 48406639b8aSAndrew Davis status = "okay"; 485effb32e9SAswath Govindraju pinctrl-names = "default"; 486effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_pins_default>; 487effb32e9SAswath Govindraju phys = <&transceiver1>; 488effb32e9SAswath Govindraju}; 489effb32e9SAswath Govindraju 490effb32e9SAswath Govindraju&mcu_mcan1 { 49106639b8aSAndrew Davis status = "okay"; 492effb32e9SAswath Govindraju pinctrl-names = "default"; 493effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_pins_default>; 494effb32e9SAswath Govindraju phys = <&transceiver2>; 495effb32e9SAswath Govindraju}; 496cf2aacfeSBhavya Kapoor 497cf2aacfeSBhavya Kapoor&tscadc0 { 498cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc0_pins_default>; 499cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 500cf2aacfeSBhavya Kapoor status = "okay"; 501cf2aacfeSBhavya Kapoor adc { 502cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 503cf2aacfeSBhavya Kapoor }; 504cf2aacfeSBhavya Kapoor}; 505cf2aacfeSBhavya Kapoor 506cf2aacfeSBhavya Kapoor&tscadc1 { 507cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc1_pins_default>; 508cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 509cf2aacfeSBhavya Kapoor status = "okay"; 510cf2aacfeSBhavya Kapoor adc { 511cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 512cf2aacfeSBhavya Kapoor }; 513cf2aacfeSBhavya Kapoor}; 51498f3b667SBhavya Kapoor 51598f3b667SBhavya Kapoor&main_mcan3 { 51698f3b667SBhavya Kapoor status = "okay"; 51798f3b667SBhavya Kapoor pinctrl-names = "default"; 51898f3b667SBhavya Kapoor pinctrl-0 = <&main_mcan3_pins_default>; 51998f3b667SBhavya Kapoor phys = <&transceiver3>; 52098f3b667SBhavya Kapoor}; 52198f3b667SBhavya Kapoor 52298f3b667SBhavya Kapoor&main_mcan5 { 52398f3b667SBhavya Kapoor status = "okay"; 52498f3b667SBhavya Kapoor pinctrl-names = "default"; 52598f3b667SBhavya Kapoor pinctrl-0 = <&main_mcan5_pins_default>; 52698f3b667SBhavya Kapoor phys = <&transceiver4>; 52798f3b667SBhavya Kapoor}; 528