xref: /linux/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts (revision 6bc829ceea4158c7aeb3a9e73d5c52634d78fb6f)
1effb32e9SAswath Govindraju// SPDX-License-Identifier: GPL-2.0
2effb32e9SAswath Govindraju/*
3effb32e9SAswath Govindraju * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4effb32e9SAswath Govindraju *
5effb32e9SAswath Govindraju * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
6effb32e9SAswath Govindraju */
7effb32e9SAswath Govindraju
8effb32e9SAswath Govindraju/dts-v1/;
9effb32e9SAswath Govindraju
10effb32e9SAswath Govindraju#include "k3-j721s2-som-p0.dtsi"
11effb32e9SAswath Govindraju#include <dt-bindings/net/ti-dp83867.h>
12da61731dSAswath Govindraju#include <dt-bindings/phy/phy-cadence.h>
13da61731dSAswath Govindraju#include <dt-bindings/phy/phy.h>
14da61731dSAswath Govindraju#include <dt-bindings/mux/ti-serdes.h>
15effb32e9SAswath Govindraju
16effb32e9SAswath Govindraju/ {
17effb32e9SAswath Govindraju	compatible = "ti,j721s2-evm", "ti,j721s2";
18effb32e9SAswath Govindraju	model = "Texas Instruments J721S2 EVM";
19effb32e9SAswath Govindraju
20effb32e9SAswath Govindraju	chosen {
21aee744a3SAswath Govindraju		stdout-path = "serial2:115200n8";
22effb32e9SAswath Govindraju	};
23effb32e9SAswath Govindraju
2416521653SAswath Govindraju	aliases {
2516521653SAswath Govindraju		serial1 = &mcu_uart0;
26aee744a3SAswath Govindraju		serial2 = &main_uart8;
2716521653SAswath Govindraju		mmc0 = &main_sdhci0;
2816521653SAswath Govindraju		mmc1 = &main_sdhci1;
2916521653SAswath Govindraju		can0 = &main_mcan16;
3016521653SAswath Govindraju		can1 = &mcu_mcan0;
3116521653SAswath Govindraju		can2 = &mcu_mcan1;
3216521653SAswath Govindraju	};
3316521653SAswath Govindraju
34effb32e9SAswath Govindraju	evm_12v0: fixedregulator-evm12v0 {
35effb32e9SAswath Govindraju		/* main supply */
36effb32e9SAswath Govindraju		compatible = "regulator-fixed";
37effb32e9SAswath Govindraju		regulator-name = "evm_12v0";
38effb32e9SAswath Govindraju		regulator-min-microvolt = <12000000>;
39effb32e9SAswath Govindraju		regulator-max-microvolt = <12000000>;
40effb32e9SAswath Govindraju		regulator-always-on;
41effb32e9SAswath Govindraju		regulator-boot-on;
42effb32e9SAswath Govindraju	};
43effb32e9SAswath Govindraju
44effb32e9SAswath Govindraju	vsys_3v3: fixedregulator-vsys3v3 {
45effb32e9SAswath Govindraju		/* Output of LM5140 */
46effb32e9SAswath Govindraju		compatible = "regulator-fixed";
47effb32e9SAswath Govindraju		regulator-name = "vsys_3v3";
48effb32e9SAswath Govindraju		regulator-min-microvolt = <3300000>;
49effb32e9SAswath Govindraju		regulator-max-microvolt = <3300000>;
50effb32e9SAswath Govindraju		vin-supply = <&evm_12v0>;
51effb32e9SAswath Govindraju		regulator-always-on;
52effb32e9SAswath Govindraju		regulator-boot-on;
53effb32e9SAswath Govindraju	};
54effb32e9SAswath Govindraju
55effb32e9SAswath Govindraju	vsys_5v0: fixedregulator-vsys5v0 {
56effb32e9SAswath Govindraju		/* Output of LM5140 */
57effb32e9SAswath Govindraju		compatible = "regulator-fixed";
58effb32e9SAswath Govindraju		regulator-name = "vsys_5v0";
59effb32e9SAswath Govindraju		regulator-min-microvolt = <5000000>;
60effb32e9SAswath Govindraju		regulator-max-microvolt = <5000000>;
61effb32e9SAswath Govindraju		vin-supply = <&evm_12v0>;
62effb32e9SAswath Govindraju		regulator-always-on;
63effb32e9SAswath Govindraju		regulator-boot-on;
64effb32e9SAswath Govindraju	};
65effb32e9SAswath Govindraju
66effb32e9SAswath Govindraju	vdd_mmc1: fixedregulator-sd {
67effb32e9SAswath Govindraju		/* Output of TPS22918 */
68effb32e9SAswath Govindraju		compatible = "regulator-fixed";
69effb32e9SAswath Govindraju		regulator-name = "vdd_mmc1";
70effb32e9SAswath Govindraju		regulator-min-microvolt = <3300000>;
71effb32e9SAswath Govindraju		regulator-max-microvolt = <3300000>;
72effb32e9SAswath Govindraju		regulator-boot-on;
73effb32e9SAswath Govindraju		enable-active-high;
74effb32e9SAswath Govindraju		vin-supply = <&vsys_3v3>;
75effb32e9SAswath Govindraju		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
76effb32e9SAswath Govindraju	};
77effb32e9SAswath Govindraju
78effb32e9SAswath Govindraju	vdd_sd_dv: gpio-regulator-TLV71033 {
79effb32e9SAswath Govindraju		/* Output of TLV71033 */
80effb32e9SAswath Govindraju		compatible = "regulator-gpio";
81effb32e9SAswath Govindraju		regulator-name = "tlv71033";
82effb32e9SAswath Govindraju		pinctrl-names = "default";
83effb32e9SAswath Govindraju		pinctrl-0 = <&vdd_sd_dv_pins_default>;
84effb32e9SAswath Govindraju		regulator-min-microvolt = <1800000>;
85effb32e9SAswath Govindraju		regulator-max-microvolt = <3300000>;
86effb32e9SAswath Govindraju		regulator-boot-on;
87effb32e9SAswath Govindraju		vin-supply = <&vsys_5v0>;
88effb32e9SAswath Govindraju		gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
89effb32e9SAswath Govindraju		states = <1800000 0x0>,
90effb32e9SAswath Govindraju			 <3300000 0x1>;
91effb32e9SAswath Govindraju	};
92effb32e9SAswath Govindraju
93effb32e9SAswath Govindraju	transceiver1: can-phy1 {
94effb32e9SAswath Govindraju		compatible = "ti,tcan1043";
95effb32e9SAswath Govindraju		#phy-cells = <0>;
96effb32e9SAswath Govindraju		max-bitrate = <5000000>;
97effb32e9SAswath Govindraju		pinctrl-names = "default";
98effb32e9SAswath Govindraju		pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
99effb32e9SAswath Govindraju		standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
100effb32e9SAswath Govindraju		enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
101effb32e9SAswath Govindraju	};
102effb32e9SAswath Govindraju
103effb32e9SAswath Govindraju	transceiver2: can-phy2 {
104effb32e9SAswath Govindraju		compatible = "ti,tcan1042";
105effb32e9SAswath Govindraju		#phy-cells = <0>;
106effb32e9SAswath Govindraju		max-bitrate = <5000000>;
107effb32e9SAswath Govindraju		pinctrl-names = "default";
108effb32e9SAswath Govindraju		pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
109effb32e9SAswath Govindraju		standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
110effb32e9SAswath Govindraju	};
111effb32e9SAswath Govindraju
112effb32e9SAswath Govindraju};
113effb32e9SAswath Govindraju
114effb32e9SAswath Govindraju&main_pmx0 {
115effb32e9SAswath Govindraju	main_uart8_pins_default: main-uart8-pins-default {
116effb32e9SAswath Govindraju		pinctrl-single,pins = <
117effb32e9SAswath Govindraju			J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
118effb32e9SAswath Govindraju			J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
119effb32e9SAswath Govindraju			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
120effb32e9SAswath Govindraju			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
121effb32e9SAswath Govindraju		>;
122effb32e9SAswath Govindraju	};
123effb32e9SAswath Govindraju
124effb32e9SAswath Govindraju	main_i2c3_pins_default: main-i2c3-pins-default {
125effb32e9SAswath Govindraju		pinctrl-single,pins = <
126effb32e9SAswath Govindraju			J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
127effb32e9SAswath Govindraju			J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
128effb32e9SAswath Govindraju		>;
129effb32e9SAswath Govindraju	};
130effb32e9SAswath Govindraju
131effb32e9SAswath Govindraju	main_mmc1_pins_default: main-mmc1-pins-default {
132effb32e9SAswath Govindraju		pinctrl-single,pins = <
133effb32e9SAswath Govindraju			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
134effb32e9SAswath Govindraju			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
135effb32e9SAswath Govindraju			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
136effb32e9SAswath Govindraju			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
137effb32e9SAswath Govindraju			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
138effb32e9SAswath Govindraju			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
139effb32e9SAswath Govindraju			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
140effb32e9SAswath Govindraju			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
141effb32e9SAswath Govindraju		>;
142effb32e9SAswath Govindraju	};
143effb32e9SAswath Govindraju
144effb32e9SAswath Govindraju	vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
145effb32e9SAswath Govindraju		pinctrl-single,pins = <
146effb32e9SAswath Govindraju			J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
147effb32e9SAswath Govindraju		>;
148effb32e9SAswath Govindraju	};
1497743a9d7SAswath Govindraju
1507743a9d7SAswath Govindraju	main_usbss0_pins_default: main-usbss0-pins-default {
1517743a9d7SAswath Govindraju		pinctrl-single,pins = <
1527743a9d7SAswath Govindraju			J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
1537743a9d7SAswath Govindraju		>;
1547743a9d7SAswath Govindraju	};
155effb32e9SAswath Govindraju};
156effb32e9SAswath Govindraju
157*6bc829ceSSinthu Raja&wkup_pmx2 {
158effb32e9SAswath Govindraju	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
159effb32e9SAswath Govindraju		pinctrl-single,pins = <
160*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
161*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
162*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
163*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
164*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
165*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
166*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
167*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
168*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
169*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
170*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
171*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
172effb32e9SAswath Govindraju		>;
173effb32e9SAswath Govindraju	};
174effb32e9SAswath Govindraju
175effb32e9SAswath Govindraju	mcu_mdio_pins_default: mcu-mdio-pins-default {
176effb32e9SAswath Govindraju		pinctrl-single,pins = <
177*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
178*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
179effb32e9SAswath Govindraju		>;
180effb32e9SAswath Govindraju	};
181effb32e9SAswath Govindraju
182effb32e9SAswath Govindraju	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
183effb32e9SAswath Govindraju		pinctrl-single,pins = <
184*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
185*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
186effb32e9SAswath Govindraju		>;
187effb32e9SAswath Govindraju	};
188effb32e9SAswath Govindraju
189effb32e9SAswath Govindraju	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
190effb32e9SAswath Govindraju		pinctrl-single,pins = <
191*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
192*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /*(C23) WKUP_GPIO0_4.MCU_MCAN1_TX */
193effb32e9SAswath Govindraju		>;
194effb32e9SAswath Govindraju	};
195effb32e9SAswath Govindraju
196effb32e9SAswath Govindraju	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
197effb32e9SAswath Govindraju		pinctrl-single,pins = <
198*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */
199*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */
200effb32e9SAswath Govindraju		>;
201effb32e9SAswath Govindraju	};
202effb32e9SAswath Govindraju
203effb32e9SAswath Govindraju	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
204effb32e9SAswath Govindraju		pinctrl-single,pins = <
205*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
206effb32e9SAswath Govindraju		>;
207effb32e9SAswath Govindraju	};
208cf2aacfeSBhavya Kapoor
209cf2aacfeSBhavya Kapoor	mcu_adc0_pins_default: mcu-adc0-pins-default {
210cf2aacfeSBhavya Kapoor		pinctrl-single,pins = <
211*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */
212*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */
213*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */
214*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */
215*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */
216*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */
217*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */
218*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */
219cf2aacfeSBhavya Kapoor		>;
220cf2aacfeSBhavya Kapoor	};
221cf2aacfeSBhavya Kapoor
222cf2aacfeSBhavya Kapoor	mcu_adc1_pins_default: mcu-adc1-pins-default {
223cf2aacfeSBhavya Kapoor		pinctrl-single,pins = <
224*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */
225*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */
226*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */
227*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */
228*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */
229*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */
230*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */
231*6bc829ceSSinthu Raja			J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */
232cf2aacfeSBhavya Kapoor		>;
233cf2aacfeSBhavya Kapoor	};
234bbabba4eSAswath Govindraju
235bbabba4eSAswath Govindraju	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
236bbabba4eSAswath Govindraju		pinctrl-single,pins = <
237bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
238bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
239bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x060, PIN_OUTPUT, 0) /* (C21) MCU_OSPI1_CSn1 */
240bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
241bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
242bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
243bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
244bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */
245bbabba4eSAswath Govindraju			J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
246bbabba4eSAswath Govindraju		>;
247bbabba4eSAswath Govindraju	};
248effb32e9SAswath Govindraju};
249effb32e9SAswath Govindraju
250effb32e9SAswath Govindraju&main_gpio2 {
251effb32e9SAswath Govindraju	status = "disabled";
252effb32e9SAswath Govindraju};
253effb32e9SAswath Govindraju
254effb32e9SAswath Govindraju&main_gpio4 {
255effb32e9SAswath Govindraju	status = "disabled";
256effb32e9SAswath Govindraju};
257effb32e9SAswath Govindraju
258effb32e9SAswath Govindraju&main_gpio6 {
259effb32e9SAswath Govindraju	status = "disabled";
260effb32e9SAswath Govindraju};
261effb32e9SAswath Govindraju
262effb32e9SAswath Govindraju&wkup_gpio1 {
263effb32e9SAswath Govindraju	status = "disabled";
264effb32e9SAswath Govindraju};
265effb32e9SAswath Govindraju
266effb32e9SAswath Govindraju&wkup_uart0 {
267effb32e9SAswath Govindraju	status = "reserved";
268effb32e9SAswath Govindraju};
269effb32e9SAswath Govindraju
2700e63f35aSAndrew Davis&mcu_uart0 {
2710e63f35aSAndrew Davis	status = "okay";
2720e63f35aSAndrew Davis	/* Default pinmux */
273effb32e9SAswath Govindraju};
274effb32e9SAswath Govindraju
275effb32e9SAswath Govindraju&main_uart8 {
2760e63f35aSAndrew Davis	status = "okay";
277effb32e9SAswath Govindraju	pinctrl-names = "default";
278effb32e9SAswath Govindraju	pinctrl-0 = <&main_uart8_pins_default>;
279effb32e9SAswath Govindraju	/* Shared with TFA on this platform */
280effb32e9SAswath Govindraju	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
281effb32e9SAswath Govindraju};
282effb32e9SAswath Govindraju
283effb32e9SAswath Govindraju&main_i2c0 {
284effb32e9SAswath Govindraju	clock-frequency = <400000>;
285effb32e9SAswath Govindraju
286effb32e9SAswath Govindraju	exp1: gpio@20 {
287effb32e9SAswath Govindraju		compatible = "ti,tca6416";
288effb32e9SAswath Govindraju		reg = <0x20>;
289effb32e9SAswath Govindraju		gpio-controller;
290effb32e9SAswath Govindraju		#gpio-cells = <2>;
291effb32e9SAswath Govindraju		gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
292effb32e9SAswath Govindraju				  "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ",
293effb32e9SAswath Govindraju				  "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#",
294effb32e9SAswath Govindraju				  "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1",
295effb32e9SAswath Govindraju				  "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz";
296effb32e9SAswath Govindraju	};
297effb32e9SAswath Govindraju
298effb32e9SAswath Govindraju	exp2: gpio@22 {
299effb32e9SAswath Govindraju		compatible = "ti,tca6424";
300effb32e9SAswath Govindraju		reg = <0x22>;
301effb32e9SAswath Govindraju		gpio-controller;
302effb32e9SAswath Govindraju		#gpio-cells = <2>;
303effb32e9SAswath Govindraju		gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
304effb32e9SAswath Govindraju				  "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#",
305effb32e9SAswath Govindraju				  "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1",
306effb32e9SAswath Govindraju				  "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL",
307effb32e9SAswath Govindraju				  "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL",
308effb32e9SAswath Govindraju				  "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2";
309effb32e9SAswath Govindraju	};
310effb32e9SAswath Govindraju};
311effb32e9SAswath Govindraju
312effb32e9SAswath Govindraju&main_sdhci0 {
313effb32e9SAswath Govindraju	/* eMMC */
314effb32e9SAswath Govindraju	non-removable;
315effb32e9SAswath Govindraju	ti,driver-strength-ohm = <50>;
316effb32e9SAswath Govindraju	disable-wp;
317effb32e9SAswath Govindraju};
318effb32e9SAswath Govindraju
319effb32e9SAswath Govindraju&main_sdhci1 {
320effb32e9SAswath Govindraju	/* SD card */
321effb32e9SAswath Govindraju	pinctrl-0 = <&main_mmc1_pins_default>;
322effb32e9SAswath Govindraju	pinctrl-names = "default";
323effb32e9SAswath Govindraju	disable-wp;
324effb32e9SAswath Govindraju	vmmc-supply = <&vdd_mmc1>;
325effb32e9SAswath Govindraju	vqmmc-supply = <&vdd_sd_dv>;
326effb32e9SAswath Govindraju};
327effb32e9SAswath Govindraju
328effb32e9SAswath Govindraju&mcu_cpsw {
329effb32e9SAswath Govindraju	pinctrl-names = "default";
3306a2baa85SNishanth Menon	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
331effb32e9SAswath Govindraju};
332effb32e9SAswath Govindraju
333effb32e9SAswath Govindraju&davinci_mdio {
334effb32e9SAswath Govindraju	phy0: ethernet-phy@0 {
335effb32e9SAswath Govindraju		reg = <0>;
336effb32e9SAswath Govindraju		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
337effb32e9SAswath Govindraju		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
338effb32e9SAswath Govindraju		ti,min-output-impedance;
339effb32e9SAswath Govindraju	};
340effb32e9SAswath Govindraju};
341effb32e9SAswath Govindraju
342effb32e9SAswath Govindraju&cpsw_port1 {
343effb32e9SAswath Govindraju	phy-mode = "rgmii-rxid";
344effb32e9SAswath Govindraju	phy-handle = <&phy0>;
345effb32e9SAswath Govindraju};
346effb32e9SAswath Govindraju
347da61731dSAswath Govindraju&serdes_ln_ctrl {
348da61731dSAswath Govindraju	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
349da61731dSAswath Govindraju		      <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
350da61731dSAswath Govindraju};
351da61731dSAswath Govindraju
352da61731dSAswath Govindraju&serdes_refclk {
353da61731dSAswath Govindraju	clock-frequency = <100000000>;
354da61731dSAswath Govindraju};
355da61731dSAswath Govindraju
356da61731dSAswath Govindraju&serdes0 {
357da61731dSAswath Govindraju	status = "okay";
358da61731dSAswath Govindraju	serdes0_pcie_link: phy@0 {
359da61731dSAswath Govindraju		reg = <0>;
360da61731dSAswath Govindraju		cdns,num-lanes = <1>;
361da61731dSAswath Govindraju		#phy-cells = <0>;
362da61731dSAswath Govindraju		cdns,phy-type = <PHY_TYPE_PCIE>;
363da61731dSAswath Govindraju		resets = <&serdes_wiz0 1>;
364da61731dSAswath Govindraju	};
365da61731dSAswath Govindraju};
366da61731dSAswath Govindraju
3677743a9d7SAswath Govindraju&usb_serdes_mux {
3687743a9d7SAswath Govindraju	idle-states = <1>; /* USB0 to SERDES lane 1 */
3697743a9d7SAswath Govindraju};
3707743a9d7SAswath Govindraju
3717743a9d7SAswath Govindraju&usbss0 {
3727743a9d7SAswath Govindraju	status = "okay";
3737743a9d7SAswath Govindraju	pinctrl-0 = <&main_usbss0_pins_default>;
3747743a9d7SAswath Govindraju	pinctrl-names = "default";
3757743a9d7SAswath Govindraju	ti,vbus-divider;
3767743a9d7SAswath Govindraju	ti,usb2-only;
3777743a9d7SAswath Govindraju};
3787743a9d7SAswath Govindraju
3797743a9d7SAswath Govindraju&usb0 {
3807743a9d7SAswath Govindraju	dr_mode = "otg";
3817743a9d7SAswath Govindraju	maximum-speed = "high-speed";
3827743a9d7SAswath Govindraju};
3837743a9d7SAswath Govindraju
384bbabba4eSAswath Govindraju&ospi1 {
385bbabba4eSAswath Govindraju	status = "okay";
386bbabba4eSAswath Govindraju	pinctrl-names = "default";
387bbabba4eSAswath Govindraju	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
388bbabba4eSAswath Govindraju
389bbabba4eSAswath Govindraju	flash@0{
390bbabba4eSAswath Govindraju		compatible = "jedec,spi-nor";
391bbabba4eSAswath Govindraju		reg = <0x0>;
392bbabba4eSAswath Govindraju		spi-tx-bus-width = <1>;
393bbabba4eSAswath Govindraju		spi-rx-bus-width = <4>;
394bbabba4eSAswath Govindraju		spi-max-frequency = <40000000>;
395bbabba4eSAswath Govindraju		cdns,tshsl-ns = <60>;
396bbabba4eSAswath Govindraju		cdns,tsd2d-ns = <60>;
397bbabba4eSAswath Govindraju		cdns,tchsh-ns = <60>;
398bbabba4eSAswath Govindraju		cdns,tslch-ns = <60>;
399bbabba4eSAswath Govindraju		cdns,read-delay = <2>;
400bbabba4eSAswath Govindraju	};
401bbabba4eSAswath Govindraju};
402bbabba4eSAswath Govindraju
403715084ecSAswath Govindraju&pcie1_rc {
404715084ecSAswath Govindraju	status = "okay";
405715084ecSAswath Govindraju	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
406715084ecSAswath Govindraju	phys = <&serdes0_pcie_link>;
407715084ecSAswath Govindraju	phy-names = "pcie-phy";
408715084ecSAswath Govindraju	num-lanes = <1>;
409715084ecSAswath Govindraju};
410715084ecSAswath Govindraju
411effb32e9SAswath Govindraju&mcu_mcan0 {
41206639b8aSAndrew Davis	status = "okay";
413effb32e9SAswath Govindraju	pinctrl-names = "default";
414effb32e9SAswath Govindraju	pinctrl-0 = <&mcu_mcan0_pins_default>;
415effb32e9SAswath Govindraju	phys = <&transceiver1>;
416effb32e9SAswath Govindraju};
417effb32e9SAswath Govindraju
418effb32e9SAswath Govindraju&mcu_mcan1 {
41906639b8aSAndrew Davis	status = "okay";
420effb32e9SAswath Govindraju	pinctrl-names = "default";
421effb32e9SAswath Govindraju	pinctrl-0 = <&mcu_mcan1_pins_default>;
422effb32e9SAswath Govindraju	phys = <&transceiver2>;
423effb32e9SAswath Govindraju};
424cf2aacfeSBhavya Kapoor
425cf2aacfeSBhavya Kapoor&tscadc0 {
426cf2aacfeSBhavya Kapoor	pinctrl-0 = <&mcu_adc0_pins_default>;
427cf2aacfeSBhavya Kapoor	pinctrl-names = "default";
428cf2aacfeSBhavya Kapoor	status = "okay";
429cf2aacfeSBhavya Kapoor	adc {
430cf2aacfeSBhavya Kapoor		ti,adc-channels = <0 1 2 3 4 5 6 7>;
431cf2aacfeSBhavya Kapoor	};
432cf2aacfeSBhavya Kapoor};
433cf2aacfeSBhavya Kapoor
434cf2aacfeSBhavya Kapoor&tscadc1 {
435cf2aacfeSBhavya Kapoor	pinctrl-0 = <&mcu_adc1_pins_default>;
436cf2aacfeSBhavya Kapoor	pinctrl-names = "default";
437cf2aacfeSBhavya Kapoor	status = "okay";
438cf2aacfeSBhavya Kapoor	adc {
439cf2aacfeSBhavya Kapoor		ti,adc-channels = <0 1 2 3 4 5 6 7>;
440cf2aacfeSBhavya Kapoor	};
441cf2aacfeSBhavya Kapoor};
442