1*c5b645dbSBeleswar Padhi// SPDX-License-Identifier: GPL-2.0-only OR MIT 2*c5b645dbSBeleswar Padhi/** 3*c5b645dbSBeleswar Padhi * Device Tree Source for enabling IPC using TI SDK firmware on J7200 SoCs 4*c5b645dbSBeleswar Padhi * 5*c5b645dbSBeleswar Padhi * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/ 6*c5b645dbSBeleswar Padhi */ 7*c5b645dbSBeleswar Padhi 8*c5b645dbSBeleswar Padhi&reserved_memory { 9*c5b645dbSBeleswar Padhi mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { 10*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 11*c5b645dbSBeleswar Padhi reg = <0x00 0xa1000000 0x00 0x100000>; 12*c5b645dbSBeleswar Padhi no-map; 13*c5b645dbSBeleswar Padhi }; 14*c5b645dbSBeleswar Padhi 15*c5b645dbSBeleswar Padhi mcu_r5fss0_core1_memory_region: memory@a1100000 { 16*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 17*c5b645dbSBeleswar Padhi reg = <0x00 0xa1100000 0x00 0xf00000>; 18*c5b645dbSBeleswar Padhi no-map; 19*c5b645dbSBeleswar Padhi }; 20*c5b645dbSBeleswar Padhi 21*c5b645dbSBeleswar Padhi main_r5fss0_core0_dma_memory_region: memory@a2000000 { 22*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 23*c5b645dbSBeleswar Padhi reg = <0x00 0xa2000000 0x00 0x100000>; 24*c5b645dbSBeleswar Padhi no-map; 25*c5b645dbSBeleswar Padhi }; 26*c5b645dbSBeleswar Padhi 27*c5b645dbSBeleswar Padhi main_r5fss0_core0_memory_region: memory@a2100000 { 28*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 29*c5b645dbSBeleswar Padhi reg = <0x00 0xa2100000 0x00 0xf00000>; 30*c5b645dbSBeleswar Padhi no-map; 31*c5b645dbSBeleswar Padhi }; 32*c5b645dbSBeleswar Padhi 33*c5b645dbSBeleswar Padhi main_r5fss0_core1_dma_memory_region: memory@a3000000 { 34*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 35*c5b645dbSBeleswar Padhi reg = <0x00 0xa3000000 0x00 0x100000>; 36*c5b645dbSBeleswar Padhi no-map; 37*c5b645dbSBeleswar Padhi }; 38*c5b645dbSBeleswar Padhi 39*c5b645dbSBeleswar Padhi main_r5fss0_core1_memory_region: memory@a3100000 { 40*c5b645dbSBeleswar Padhi compatible = "shared-dma-pool"; 41*c5b645dbSBeleswar Padhi reg = <0x00 0xa3100000 0x00 0xf00000>; 42*c5b645dbSBeleswar Padhi no-map; 43*c5b645dbSBeleswar Padhi }; 44*c5b645dbSBeleswar Padhi 45*c5b645dbSBeleswar Padhi rtos_ipc_memory_region: memory@a4000000 { 46*c5b645dbSBeleswar Padhi reg = <0x00 0xa4000000 0x00 0x00800000>; 47*c5b645dbSBeleswar Padhi alignment = <0x1000>; 48*c5b645dbSBeleswar Padhi no-map; 49*c5b645dbSBeleswar Padhi }; 50*c5b645dbSBeleswar Padhi}; 51*c5b645dbSBeleswar Padhi 52*c5b645dbSBeleswar Padhi&mailbox0_cluster0 { 53*c5b645dbSBeleswar Padhi status = "okay"; 54*c5b645dbSBeleswar Padhi interrupts = <436>; 55*c5b645dbSBeleswar Padhi 56*c5b645dbSBeleswar Padhi mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { 57*c5b645dbSBeleswar Padhi ti,mbox-rx = <0 0 0>; 58*c5b645dbSBeleswar Padhi ti,mbox-tx = <1 0 0>; 59*c5b645dbSBeleswar Padhi }; 60*c5b645dbSBeleswar Padhi 61*c5b645dbSBeleswar Padhi mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { 62*c5b645dbSBeleswar Padhi ti,mbox-rx = <2 0 0>; 63*c5b645dbSBeleswar Padhi ti,mbox-tx = <3 0 0>; 64*c5b645dbSBeleswar Padhi }; 65*c5b645dbSBeleswar Padhi}; 66*c5b645dbSBeleswar Padhi 67*c5b645dbSBeleswar Padhi&mailbox0_cluster1 { 68*c5b645dbSBeleswar Padhi status = "okay"; 69*c5b645dbSBeleswar Padhi interrupts = <432>; 70*c5b645dbSBeleswar Padhi 71*c5b645dbSBeleswar Padhi mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { 72*c5b645dbSBeleswar Padhi ti,mbox-rx = <0 0 0>; 73*c5b645dbSBeleswar Padhi ti,mbox-tx = <1 0 0>; 74*c5b645dbSBeleswar Padhi }; 75*c5b645dbSBeleswar Padhi 76*c5b645dbSBeleswar Padhi mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { 77*c5b645dbSBeleswar Padhi ti,mbox-rx = <2 0 0>; 78*c5b645dbSBeleswar Padhi ti,mbox-tx = <3 0 0>; 79*c5b645dbSBeleswar Padhi }; 80*c5b645dbSBeleswar Padhi}; 81*c5b645dbSBeleswar Padhi 82*c5b645dbSBeleswar Padhi/* Timers are used by Remoteproc firmware */ 83*c5b645dbSBeleswar Padhi&main_timer0 { 84*c5b645dbSBeleswar Padhi status = "reserved"; 85*c5b645dbSBeleswar Padhi}; 86*c5b645dbSBeleswar Padhi 87*c5b645dbSBeleswar Padhi&main_timer1 { 88*c5b645dbSBeleswar Padhi status = "reserved"; 89*c5b645dbSBeleswar Padhi}; 90*c5b645dbSBeleswar Padhi 91*c5b645dbSBeleswar Padhi&main_timer2 { 92*c5b645dbSBeleswar Padhi status = "reserved"; 93*c5b645dbSBeleswar Padhi}; 94*c5b645dbSBeleswar Padhi 95*c5b645dbSBeleswar Padhi&mcu_r5fss0 { 96*c5b645dbSBeleswar Padhi status = "okay"; 97*c5b645dbSBeleswar Padhi}; 98*c5b645dbSBeleswar Padhi 99*c5b645dbSBeleswar Padhi&mcu_r5fss0_core0 { 100*c5b645dbSBeleswar Padhi mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; 101*c5b645dbSBeleswar Padhi memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 102*c5b645dbSBeleswar Padhi <&mcu_r5fss0_core0_memory_region>; 103*c5b645dbSBeleswar Padhi status = "okay"; 104*c5b645dbSBeleswar Padhi}; 105*c5b645dbSBeleswar Padhi 106*c5b645dbSBeleswar Padhi&mcu_r5fss0_core1 { 107*c5b645dbSBeleswar Padhi mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; 108*c5b645dbSBeleswar Padhi memory-region = <&mcu_r5fss0_core1_dma_memory_region>, 109*c5b645dbSBeleswar Padhi <&mcu_r5fss0_core1_memory_region>; 110*c5b645dbSBeleswar Padhi status = "okay"; 111*c5b645dbSBeleswar Padhi}; 112*c5b645dbSBeleswar Padhi 113*c5b645dbSBeleswar Padhi&main_r5fss0 { 114*c5b645dbSBeleswar Padhi ti,cluster-mode = <0>; 115*c5b645dbSBeleswar Padhi status = "okay"; 116*c5b645dbSBeleswar Padhi}; 117*c5b645dbSBeleswar Padhi 118*c5b645dbSBeleswar Padhi&main_r5fss0_core0 { 119*c5b645dbSBeleswar Padhi mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; 120*c5b645dbSBeleswar Padhi memory-region = <&main_r5fss0_core0_dma_memory_region>, 121*c5b645dbSBeleswar Padhi <&main_r5fss0_core0_memory_region>; 122*c5b645dbSBeleswar Padhi status = "okay"; 123*c5b645dbSBeleswar Padhi}; 124*c5b645dbSBeleswar Padhi 125*c5b645dbSBeleswar Padhi&main_r5fss0_core1 { 126*c5b645dbSBeleswar Padhi mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; 127*c5b645dbSBeleswar Padhi memory-region = <&main_r5fss0_core1_dma_memory_region>, 128*c5b645dbSBeleswar Padhi <&main_r5fss0_core1_memory_region>; 129*c5b645dbSBeleswar Padhi status = "okay"; 130*c5b645dbSBeleswar Padhi}; 131