1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * https://beagley-ai.org/ 4 * 5 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 6 * Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include "k3-j722s.dtsi" 14 15/ { 16 compatible = "beagle,am67a-beagley-ai", "ti,j722s"; 17 model = "BeagleBoard.org BeagleY-AI"; 18 19 aliases { 20 serial0 = &wkup_uart0; 21 serial2 = &main_uart0; 22 mmc1 = &sdhci1; 23 rtc0 = &rtc; 24 }; 25 26 chosen { 27 stdout-path = &main_uart0; 28 }; 29 30 memory@80000000 { 31 /* 4G RAM */ 32 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 33 <0x00000008 0x80000000 0x00000000 0x80000000>; 34 device_type = "memory"; 35 bootph-pre-ram; 36 }; 37 38 reserved_memory: reserved-memory { 39 #address-cells = <2>; 40 #size-cells = <2>; 41 ranges; 42 43 secure_tfa_ddr: tfa@9e780000 { 44 reg = <0x00 0x9e780000 0x00 0x80000>; 45 no-map; 46 }; 47 48 secure_ddr: optee@9e800000 { 49 reg = <0x00 0x9e800000 0x00 0x01800000>; 50 no-map; 51 }; 52 53 wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { 54 compatible = "shared-dma-pool"; 55 reg = <0x00 0xa0100000 0x00 0xf00000>; 56 no-map; 57 }; 58 }; 59 60 vsys_5v0: regulator-1 { 61 compatible = "regulator-fixed"; 62 regulator-name = "vsys_5v0"; 63 regulator-min-microvolt = <5000000>; 64 regulator-max-microvolt = <5000000>; 65 regulator-always-on; 66 regulator-boot-on; 67 bootph-all; 68 }; 69 70 vdd_3v3: regulator-2 { 71 compatible = "regulator-fixed"; 72 regulator-name = "vdd_3v3"; 73 regulator-min-microvolt = <3300000>; 74 regulator-max-microvolt = <3300000>; 75 vin-supply = <&vsys_5v0>; 76 regulator-always-on; 77 regulator-boot-on; 78 }; 79 80 vdd_mmc1: regulator-3 { 81 compatible = "regulator-fixed"; 82 regulator-name = "vdd_mmc1"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&vdd_3v3_sd_pins_default>; 85 regulator-min-microvolt = <3300000>; 86 regulator-max-microvolt = <3300000>; 87 regulator-boot-on; 88 enable-active-high; 89 gpio = <&main_gpio1 50 GPIO_ACTIVE_HIGH>; 90 bootph-all; 91 }; 92 93 vdd_sd_dv: regulator-4 { 94 compatible = "regulator-gpio"; 95 regulator-name = "tlv71033"; 96 pinctrl-names = "default"; 97 pinctrl-0 = <&vdd_sd_dv_pins_default>; 98 regulator-min-microvolt = <1800000>; 99 regulator-max-microvolt = <3300000>; 100 regulator-boot-on; 101 vin-supply = <&vsys_5v0>; 102 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 103 states = <1800000 0x0>, 104 <3300000 0x1>; 105 bootph-all; 106 }; 107 108 vsys_io_1v8: regulator-5 { 109 compatible = "regulator-fixed"; 110 regulator-name = "vsys_io_1v8"; 111 regulator-min-microvolt = <1800000>; 112 regulator-max-microvolt = <1800000>; 113 regulator-always-on; 114 regulator-boot-on; 115 }; 116 117 vsys_io_1v2: regulator-6 { 118 compatible = "regulator-fixed"; 119 regulator-name = "vsys_io_1v2"; 120 regulator-min-microvolt = <1200000>; 121 regulator-max-microvolt = <1200000>; 122 regulator-always-on; 123 regulator-boot-on; 124 }; 125 126 leds { 127 compatible = "gpio-leds"; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&led_pins_default>; 130 131 led-0 { 132 gpios = <&main_gpio0 11 GPIO_ACTIVE_LOW>; 133 default-state = "off"; 134 }; 135 136 led-1 { 137 gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; 138 linux,default-trigger = "heartbeat"; 139 function = LED_FUNCTION_HEARTBEAT; 140 default-state = "on"; 141 }; 142 }; 143}; 144 145&main_pmx0 { 146 main_i2c0_pins_default: main-i2c0-default-pins { 147 pinctrl-single,pins = < 148 J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */ 149 J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */ 150 >; 151 bootph-all; 152 }; 153 154 main_uart0_pins_default: main-uart0-default-pins { 155 pinctrl-single,pins = < 156 J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 157 J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 158 >; 159 bootph-all; 160 }; 161 162 vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { 163 pinctrl-single,pins = < 164 J722S_IOPAD(0x0244, PIN_OUTPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */ 165 >; 166 bootph-all; 167 }; 168 169 main_mmc1_pins_default: main-mmc1-default-pins { 170 pinctrl-single,pins = < 171 J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */ 172 J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */ 173 J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */ 174 J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */ 175 J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */ 176 J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ 177 J722S_IOPAD(0x0240, PIN_INPUT, 7) /* (B24) MMC1_SDCD.GPIO1_48 */ 178 >; 179 bootph-all; 180 }; 181 182 mdio_pins_default: mdio-default-pins { 183 pinctrl-single,pins = < 184 J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ 185 J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ 186 >; 187 }; 188 189 rgmii1_pins_default: rgmii1-default-pins { 190 pinctrl-single,pins = < 191 J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ 192 J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */ 193 J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */ 194 J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */ 195 J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */ 196 J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */ 197 J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */ 198 J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */ 199 J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */ 200 J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */ 201 J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ 202 J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ 203 >; 204 }; 205 206 led_pins_default: led-default-pins { 207 pinctrl-single,pins = < 208 J722S_IOPAD(0x002c, PIN_OUTPUT, 7) /* (K26) OSPI0_CSn0.GPIO0_11 */ 209 J722S_IOPAD(0x0030, PIN_OUTPUT, 7) /* (K23) OSPI0_CSn1.GPIO0_12 */ 210 >; 211 }; 212 213 pmic_irq_pins_default: pmic-irq-default-pins { 214 pinctrl-single,pins = < 215 J722S_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (B23) EXTINTn */ 216 >; 217 }; 218 219 vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins { 220 pinctrl-single,pins = < 221 J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ 222 >; 223 }; 224}; 225 226&cpsw3g { 227 pinctrl-names = "default"; 228 pinctrl-0 = <&rgmii1_pins_default>; 229 status = "okay"; 230}; 231 232&cpsw3g_mdio { 233 pinctrl-names = "default"; 234 pinctrl-0 = <&mdio_pins_default>; 235 status = "okay"; 236 237 cpsw3g_phy0: ethernet-phy@0 { 238 reg = <0>; 239 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 240 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 241 ti,min-output-impedance; 242 }; 243}; 244 245&cpsw_port1 { 246 phy-mode = "rgmii-rxid"; 247 phy-handle = <&cpsw3g_phy0>; 248 status = "okay"; 249}; 250 251&main_gpio1 { 252 status = "okay"; 253}; 254 255&main_uart0 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&main_uart0_pins_default>; 258 bootph-all; 259 status = "okay"; 260}; 261 262&mcu_pmx0 { 263 wkup_uart0_pins_default: wkup-uart0-default-pins { 264 pinctrl-single,pins = < 265 J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ 266 J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ 267 J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 268 J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 269 >; 270 bootph-all; 271 }; 272 273 wkup_i2c0_pins_default: wkup-i2c0-default-pins { 274 pinctrl-single,pins = < 275 J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */ 276 J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */ 277 >; 278 bootph-all; 279 }; 280}; 281 282&wkup_uart0 { 283 /* WKUP UART0 is used by Device Manager firmware */ 284 pinctrl-names = "default"; 285 pinctrl-0 = <&wkup_uart0_pins_default>; 286 bootph-all; 287 status = "reserved"; 288}; 289 290&wkup_i2c0 { 291 pinctrl-names = "default"; 292 pinctrl-0 = <&wkup_i2c0_pins_default>; 293 clock-frequency = <100000>; 294 bootph-all; 295 status = "okay"; 296 297 tps65219: pmic@30 { 298 compatible = "ti,tps65219"; 299 reg = <0x30>; 300 buck1-supply = <&vsys_5v0>; 301 buck2-supply = <&vsys_5v0>; 302 buck3-supply = <&vsys_5v0>; 303 ldo1-supply = <&vdd_3v3>; 304 ldo3-supply = <&vdd_3v3>; 305 ldo4-supply = <&vdd_3v3>; 306 307 pinctrl-names = "default"; 308 pinctrl-0 = <&pmic_irq_pins_default>; 309 interrupt-parent = <&gic500>; 310 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 311 interrupt-controller; 312 #interrupt-cells = <1>; 313 314 bootph-all; 315 system-power-controller; 316 ti,power-button; 317 318 regulators { 319 buck1_reg: buck1 { 320 regulator-name = "VDD_3V3"; 321 regulator-min-microvolt = <3300000>; 322 regulator-max-microvolt = <3300000>; 323 regulator-boot-on; 324 regulator-always-on; 325 }; 326 327 buck2_reg: buck2 { 328 regulator-name = "VDD_1V8"; 329 regulator-min-microvolt = <1800000>; 330 regulator-max-microvolt = <1800000>; 331 regulator-boot-on; 332 regulator-always-on; 333 }; 334 335 ldo1_reg: ldo1 { 336 regulator-name = "VDDSHV5_SDIO"; 337 regulator-min-microvolt = <3300000>; 338 regulator-max-microvolt = <3300000>; 339 regulator-allow-bypass; 340 regulator-boot-on; 341 regulator-always-on; 342 }; 343 344 ldo2_reg: ldo2 { 345 regulator-name = "VDD_1V2"; 346 regulator-min-microvolt = <1200000>; 347 regulator-max-microvolt = <1200000>; 348 regulator-boot-on; 349 regulator-always-on; 350 }; 351 352 ldo3_reg: ldo3 { 353 regulator-name = "VDDA_PHY_1V8"; 354 regulator-min-microvolt = <1800000>; 355 regulator-max-microvolt = <1800000>; 356 regulator-boot-on; 357 regulator-always-on; 358 }; 359 360 ldo4_reg: ldo4 { 361 regulator-name = "VDDA_PLL_1V8"; 362 regulator-min-microvolt = <1800000>; 363 regulator-max-microvolt = <1800000>; 364 regulator-boot-on; 365 regulator-always-on; 366 }; 367 }; 368 }; 369 370 eeprom@50 { 371 compatible = "atmel,24c32"; 372 reg = <0x50>; 373 }; 374 375 rtc: rtc@68 { 376 compatible = "dallas,ds1340"; 377 reg = <0x68>; 378 }; 379}; 380 381&sdhci1 { 382 /* SD/MMC */ 383 vmmc-supply = <&vdd_mmc1>; 384 vqmmc-supply = <&vdd_sd_dv>; 385 pinctrl-names = "default"; 386 pinctrl-0 = <&main_mmc1_pins_default>; 387 disable-wp; 388 cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; 389 cd-debounce-delay-ms = <100>; 390 bootph-all; 391 ti,fails-without-test-cd; 392 status = "okay"; 393}; 394