1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) Siemens AG, 2023 4 * 5 * Authors: 6 * Baocheng Su <baocheng.su@siemens.com> 7 * Chao Zeng <chao.zeng@siemens.com> 8 * Huaqian Li <huaqian.li@siemens.com> 9 * 10 * AM6548-based (quad-core) IOT2050 SM variant, Product Generation 2 11 * 4 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 12 * 13 * Product homepage: 14 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 15 */ 16 17/dts-v1/; 18 19#include "k3-am6548-iot2050-advanced-common.dtsi" 20#include "k3-am65-iot2050-common-pg2.dtsi" 21 22/ { 23 compatible = "siemens,iot2050-advanced-sm", "ti,am654"; 24 model = "SIMATIC IOT2050 Advanced SM"; 25 26 memory@80000000 { 27 device_type = "memory"; 28 /* 4G RAM */ 29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 30 <0x00000008 0x80000000 0x00000000 0x80000000>; 31 }; 32 33 aliases { 34 spi1 = &main_spi0; 35 }; 36 37 leds { 38 pinctrl-0 = <&leds_pins_default>, <&user1_led_pins>; 39 40 led-2 { 41 gpios = <&wkup_gpio0 52 GPIO_ACTIVE_HIGH>; 42 }; 43 44 led-3 { 45 gpios = <&wkup_gpio0 53 GPIO_ACTIVE_HIGH>; 46 }; 47 }; 48}; 49 50&main_pmx0 { 51 main_pcie_enable_pins_default: main-pcie-enable-default-pins { 52 pinctrl-single,pins = < 53 AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */ 54 >; 55 }; 56 57 main_spi0_pins: main-spi0-default-pins { 58 pinctrl-single,pins = < 59 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ 60 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ 61 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ 62 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ 63 >; 64 }; 65}; 66 67&main_pmx1 { 68 asic_spi_mux_ctrl_pin: asic-spi-mux-ctrl-default-pins { 69 pinctrl-single,pins = < 70 AM65X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (D21) GPIO1_86 */ 71 >; 72 }; 73}; 74 75&wkup_pmx0 { 76 user1_led_pins: user1-led-default-pins { 77 pinctrl-single,pins = < 78 /* (AB1) WKUP_UART0_RXD:WKUP_GPIO0_52, as USER 1 led red */ 79 AM65X_WKUP_IOPAD(0x00a0, PIN_OUTPUT, 7) 80 /* (AB5) WKUP_UART0_TXD:WKUP_GPIO0_53, as USER 1 led green */ 81 AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 7) 82 >; 83 }; 84 85 soc_asic_pins: soc-asic-default-pins { 86 pinctrl-single,pins = < 87 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) /* (P4) WKUP_GPIO0_29 */ 88 AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) /* (P5) WKUP_GPIO0_30 */ 89 AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7) /* (P1) WKUP_GPIO0_31 */ 90 >; 91 }; 92}; 93 94&main_gpio0 { 95 gpio-line-names = "main_gpio0-base"; 96}; 97 98&main_gpio1 { 99 pinctrl-names = "default"; 100 pinctrl-0 = 101 <&cp2102n_reset_pin_default>, 102 <&main_pcie_enable_pins_default>, 103 <&asic_spi_mux_ctrl_pin>; 104 gpio-line-names = 105 /* 0..9 */ 106 "", "", "", "", "", "", "", "", "", "", 107 /* 10..19 */ 108 "", "", "", "", "", "", "", "", "", "", 109 /* 20..29 */ 110 "", "", "", "", "CP2102N-RESET", "", "", "", "", "", 111 /* 30..39 */ 112 "", "", "", "", "", "", "", "", "", "", 113 /* 40..49 */ 114 "", "", "", "", "", "", "", "", "", "", 115 /* 50..59 */ 116 "", "", "", "", "", "", "", "", "", "", 117 /* 60..69 */ 118 "", "", "", "", "", "", "", "", "", "", 119 /* 70..79 */ 120 "", "", "", "", "", "", "", "", "", "", 121 /* 80..86 */ 122 "", "", "", "", "", "", "ASIC-spi-mux-ctrl"; 123}; 124 125&wkup_gpio0 { 126 pinctrl-names = "default"; 127 pinctrl-0 = 128 <&push_button_pins_default>, 129 <&db9_com_mode_pins_default>, 130 <&soc_asic_pins>; 131 gpio-line-names = 132 /* 0..9 */ 133 "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", 134 "UART0-enable", "UART0-terminate", "", "WIFI-disable", 135 /* 10..19 */ 136 "", "", "", "", "", "", "", "", "", "", 137 /* 20..29 */ 138 "", "", "", "", "", "USER-button", "", "", "","ASIC-gpio-0", 139 /* 30..31 */ 140 "ASIC-gpio-1", "ASIC-gpio-2"; 141}; 142 143&main_spi0 { 144 pinctrl-names = "default"; 145 pinctrl-0 = <&main_spi0_pins>; 146 147 #address-cells = <1>; 148 #size-cells= <0>; 149}; 150 151&mcu_spi0 { 152 pinctrl-names = "default"; 153 pinctrl-0 = <&mcu_spi0_pins_default>; 154}; 155 156&main_i2c3 { 157 accelerometer: lsm6dso@6a { 158 compatible = "st,lsm6dso"; 159 reg = <0x6a>; 160 }; 161}; 162 163&dss { 164 status = "disabled"; 165}; 166 167&serdes0 { 168 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; 169 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; 170}; 171 172&serdes1 { 173 status = "disabled"; 174}; 175 176&pcie0_rc { 177 pinctrl-names = "default"; 178 pinctrl-0 = <&minipcie_pins_default>; 179 180 num-lanes = <1>; 181 phys = <&serdes0 PHY_TYPE_PCIE 1>; 182 phy-names = "pcie-phy0"; 183 reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; 184 status = "okay"; 185}; 186 187&pcie1_rc { 188 status = "disabled"; 189}; 190