1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 4 */ 5 6/dts-v1/; 7 8#include "k3-am654.dtsi" 9#include <dt-bindings/input/input.h> 10 11/ { 12 compatible = "ti,am654-evm", "ti,am654"; 13 model = "Texas Instruments AM654 Base Board"; 14 15 chosen { 16 stdout-path = "serial2:115200n8"; 17 bootargs = "earlycon=ns16550a,mmio32,0x02800000"; 18 }; 19 20 memory@80000000 { 21 device_type = "memory"; 22 /* 4G RAM */ 23 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 24 <0x00000008 0x80000000 0x00000000 0x80000000>; 25 }; 26 27 reserved-memory { 28 #address-cells = <2>; 29 #size-cells = <2>; 30 ranges; 31 secure_ddr: secure_ddr@9e800000 { 32 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ 33 alignment = <0x1000>; 34 no-map; 35 }; 36 }; 37 38 gpio-keys { 39 compatible = "gpio-keys"; 40 autorepeat; 41 pinctrl-names = "default"; 42 pinctrl-0 = <&push_button_pins_default>; 43 44 sw5 { 45 label = "GPIO Key USER1"; 46 linux,code = <BTN_0>; 47 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>; 48 }; 49 50 sw6 { 51 label = "GPIO Key USER2"; 52 linux,code = <BTN_1>; 53 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>; 54 }; 55 }; 56 57 clk_ov5640_fixed: clock { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <24000000>; 61 }; 62}; 63 64&wkup_pmx0 { 65 wkup_i2c0_pins_default: wkup-i2c0-pins-default { 66 pinctrl-single,pins = < 67 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ 68 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ 69 >; 70 }; 71 72 push_button_pins_default: push_button__pins_default { 73 pinctrl-single,pins = < 74 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ 75 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */ 76 >; 77 }; 78 79 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { 80 pinctrl-single,pins = < 81 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ 82 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ 83 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ 84 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ 85 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ 86 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ 87 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ 88 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ 89 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ 90 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ 91 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ 92 >; 93 }; 94 95 wkup_pca554_default: wkup_pca554_default { 96 pinctrl-single,pins = < 97 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ 98 99 >; 100 }; 101}; 102 103&main_pmx0 { 104 main_uart0_pins_default: main-uart0-pins-default { 105 pinctrl-single,pins = < 106 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ 107 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ 108 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ 109 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ 110 >; 111 }; 112 113 main_i2c2_pins_default: main-i2c2-pins-default { 114 pinctrl-single,pins = < 115 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ 116 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ 117 >; 118 }; 119 120 main_spi0_pins_default: main-spi0-pins-default { 121 pinctrl-single,pins = < 122 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ 123 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ 124 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ 125 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ 126 >; 127 }; 128 129 main_mmc0_pins_default: main-mmc0-pins-default { 130 pinctrl-single,pins = < 131 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ 132 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ 133 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ 134 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ 135 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ 136 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ 137 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ 138 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ 139 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ 140 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ 141 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ 142 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ 143 >; 144 }; 145 146 usb1_pins_default: usb1_pins_default { 147 pinctrl-single,pins = < 148 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ 149 >; 150 }; 151}; 152 153&main_pmx1 { 154 main_i2c0_pins_default: main-i2c0-pins-default { 155 pinctrl-single,pins = < 156 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ 157 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ 158 >; 159 }; 160 161 main_i2c1_pins_default: main-i2c1-pins-default { 162 pinctrl-single,pins = < 163 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ 164 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ 165 >; 166 }; 167 168 ecap0_pins_default: ecap0-pins-default { 169 pinctrl-single,pins = < 170 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ 171 >; 172 }; 173}; 174 175&wkup_uart0 { 176 /* Wakeup UART is used by System firmware */ 177 status = "disabled"; 178}; 179 180&main_uart0 { 181 pinctrl-names = "default"; 182 pinctrl-0 = <&main_uart0_pins_default>; 183 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 184}; 185 186&wkup_i2c0 { 187 pinctrl-names = "default"; 188 pinctrl-0 = <&wkup_i2c0_pins_default>; 189 clock-frequency = <400000>; 190 191 pca9554: gpio@39 { 192 compatible = "nxp,pca9554"; 193 reg = <0x39>; 194 gpio-controller; 195 #gpio-cells = <2>; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&wkup_pca554_default>; 198 interrupt-parent = <&wkup_gpio0>; 199 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 200 interrupt-controller; 201 #interrupt-cells = <2>; 202 }; 203}; 204 205&main_i2c0 { 206 pinctrl-names = "default"; 207 pinctrl-0 = <&main_i2c0_pins_default>; 208 clock-frequency = <400000>; 209 210 pca9555: gpio@21 { 211 compatible = "nxp,pca9555"; 212 reg = <0x21>; 213 gpio-controller; 214 #gpio-cells = <2>; 215 }; 216}; 217 218&main_i2c1 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&main_i2c1_pins_default>; 221 clock-frequency = <400000>; 222 223 ov5640@3c { 224 compatible = "ovti,ov5640"; 225 reg = <0x3c>; 226 227 clocks = <&clk_ov5640_fixed>; 228 clock-names = "xclk"; 229 230 port { 231 csi2_cam0: endpoint { 232 remote-endpoint = <&csi2_phy0>; 233 clock-lanes = <0>; 234 data-lanes = <1 2>; 235 }; 236 }; 237 }; 238 239}; 240 241&main_i2c2 { 242 pinctrl-names = "default"; 243 pinctrl-0 = <&main_i2c2_pins_default>; 244 clock-frequency = <400000>; 245}; 246 247&ecap0 { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&ecap0_pins_default>; 250}; 251 252&main_spi0 { 253 pinctrl-names = "default"; 254 pinctrl-0 = <&main_spi0_pins_default>; 255 #address-cells = <1>; 256 #size-cells= <0>; 257 ti,pindir-d0-out-d1-in = <1>; 258 259 flash@0{ 260 compatible = "jedec,spi-nor"; 261 reg = <0x0>; 262 spi-tx-bus-width = <1>; 263 spi-rx-bus-width = <1>; 264 spi-max-frequency = <48000000>; 265 #address-cells = <1>; 266 #size-cells= <1>; 267 }; 268}; 269 270&sdhci0 { 271 pinctrl-names = "default"; 272 pinctrl-0 = <&main_mmc0_pins_default>; 273 bus-width = <8>; 274 non-removable; 275 ti,driver-strength-ohm = <50>; 276 disable-wp; 277}; 278 279&dwc3_1 { 280 status = "okay"; 281}; 282 283&usb1_phy { 284 status = "okay"; 285}; 286 287&usb1 { 288 pinctrl-names = "default"; 289 pinctrl-0 = <&usb1_pins_default>; 290 dr_mode = "otg"; 291}; 292 293&dwc3_0 { 294 status = "disabled"; 295}; 296 297&usb0_phy { 298 status = "disabled"; 299}; 300 301&tscadc0 { 302 adc { 303 ti,adc-channels = <0 1 2 3 4 5 6 7>; 304 }; 305}; 306 307&tscadc1 { 308 adc { 309 ti,adc-channels = <0 1 2 3 4 5 6 7>; 310 }; 311}; 312 313&serdes0 { 314 status = "disabled"; 315}; 316 317&serdes1 { 318 status = "disabled"; 319}; 320 321&pcie0_rc { 322 status = "disabled"; 323}; 324 325&pcie0_ep { 326 status = "disabled"; 327}; 328 329&pcie1_rc { 330 status = "disabled"; 331}; 332 333&pcie1_ep { 334 status = "disabled"; 335}; 336 337&mailbox0_cluster0 { 338 interrupts = <164 0>; 339 340 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { 341 ti,mbox-tx = <1 0 0>; 342 ti,mbox-rx = <0 0 0>; 343 }; 344}; 345 346&mailbox0_cluster1 { 347 interrupts = <165 0>; 348 349 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { 350 ti,mbox-tx = <1 0 0>; 351 ti,mbox-rx = <0 0 0>; 352 }; 353}; 354 355&mailbox0_cluster2 { 356 status = "disabled"; 357}; 358 359&mailbox0_cluster3 { 360 status = "disabled"; 361}; 362 363&mailbox0_cluster4 { 364 status = "disabled"; 365}; 366 367&mailbox0_cluster5 { 368 status = "disabled"; 369}; 370 371&mailbox0_cluster6 { 372 status = "disabled"; 373}; 374 375&mailbox0_cluster7 { 376 status = "disabled"; 377}; 378 379&mailbox0_cluster8 { 380 status = "disabled"; 381}; 382 383&mailbox0_cluster9 { 384 status = "disabled"; 385}; 386 387&mailbox0_cluster10 { 388 status = "disabled"; 389}; 390 391&mailbox0_cluster11 { 392 status = "disabled"; 393}; 394 395&ospi0 { 396 pinctrl-names = "default"; 397 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; 398 399 flash@0{ 400 compatible = "jedec,spi-nor"; 401 reg = <0x0>; 402 spi-tx-bus-width = <1>; 403 spi-rx-bus-width = <8>; 404 spi-max-frequency = <40000000>; 405 cdns,tshsl-ns = <60>; 406 cdns,tsd2d-ns = <60>; 407 cdns,tchsh-ns = <60>; 408 cdns,tslch-ns = <60>; 409 cdns,read-delay = <0>; 410 #address-cells = <1>; 411 #size-cells = <1>; 412 }; 413}; 414 415&csi2_0 { 416 csi2_phy0: endpoint { 417 remote-endpoint = <&csi2_cam0>; 418 clock-lanes = <0>; 419 data-lanes = <1 2>; 420 }; 421}; 422