xref: /linux/arch/arm64/boot/dts/ti/k3-am654-base-board.dts (revision ca3be22dd0de6e0845420a9fa0fec850e8134198)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-am654.dtsi"
9#include <dt-bindings/input/input.h>
10
11/ {
12	compatible =  "ti,am654-evm", "ti,am654";
13	model = "Texas Instruments AM654 Base Board";
14
15	chosen {
16		stdout-path = "serial2:115200n8";
17		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
18	};
19
20	memory@80000000 {
21		device_type = "memory";
22		/* 4G RAM */
23		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
24		      <0x00000008 0x80000000 0x00000000 0x80000000>;
25	};
26
27	reserved-memory {
28		#address-cells = <2>;
29		#size-cells = <2>;
30		ranges;
31		secure_ddr: secure_ddr@9e800000 {
32			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
33			alignment = <0x1000>;
34			no-map;
35		};
36	};
37
38	gpio-keys {
39		compatible = "gpio-keys";
40		autorepeat;
41		pinctrl-names = "default";
42		pinctrl-0 = <&push_button_pins_default>;
43
44		sw5 {
45			label = "GPIO Key USER1";
46			linux,code = <BTN_0>;
47			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
48		};
49
50		sw6 {
51			label = "GPIO Key USER2";
52			linux,code = <BTN_1>;
53			gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
54		};
55	};
56};
57
58&wkup_pmx0 {
59	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
60		pinctrl-single,pins = <
61			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
62			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
63		>;
64	};
65
66	push_button_pins_default: push_button__pins_default {
67		pinctrl-single,pins = <
68			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
69			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
70		>;
71	};
72
73	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
74		pinctrl-single,pins = <
75			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
76			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
77			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
78			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
79			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
80			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
81			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
82			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
83			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
84			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
85			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
86		>;
87	};
88
89	wkup_pca554_default: wkup_pca554_default {
90		pinctrl-single,pins = <
91			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
92
93		>;
94	};
95};
96
97&main_pmx0 {
98	main_uart0_pins_default: main-uart0-pins-default {
99		pinctrl-single,pins = <
100			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
101			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
102			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
103			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
104		>;
105	};
106
107	main_i2c2_pins_default: main-i2c2-pins-default {
108		pinctrl-single,pins = <
109			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
110			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
111		>;
112	};
113
114	main_spi0_pins_default: main-spi0-pins-default {
115		pinctrl-single,pins = <
116			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
117			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
118			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
119			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
120		>;
121	};
122
123	main_mmc0_pins_default: main-mmc0-pins-default {
124		pinctrl-single,pins = <
125			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
126			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
127			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
128			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
129			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
130			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
131			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
132			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
133			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
134			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
135			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
136			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
137		>;
138	};
139
140	usb1_pins_default: usb1_pins_default {
141		pinctrl-single,pins = <
142			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
143		>;
144	};
145};
146
147&main_pmx1 {
148	main_i2c0_pins_default: main-i2c0-pins-default {
149		pinctrl-single,pins = <
150			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
151			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
152		>;
153	};
154
155	main_i2c1_pins_default: main-i2c1-pins-default {
156		pinctrl-single,pins = <
157			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
158			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
159		>;
160	};
161
162	ecap0_pins_default: ecap0-pins-default {
163		pinctrl-single,pins = <
164			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
165		>;
166	};
167};
168
169&wkup_uart0 {
170	/* Wakeup UART is used by System firmware */
171	status = "disabled";
172};
173
174&main_uart0 {
175	pinctrl-names = "default";
176	pinctrl-0 = <&main_uart0_pins_default>;
177	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
178};
179
180&wkup_i2c0 {
181	pinctrl-names = "default";
182	pinctrl-0 = <&wkup_i2c0_pins_default>;
183	clock-frequency = <400000>;
184
185	pca9554: gpio@39 {
186		compatible = "nxp,pca9554";
187		reg = <0x39>;
188		gpio-controller;
189		#gpio-cells = <2>;
190		pinctrl-names = "default";
191		pinctrl-0 = <&wkup_pca554_default>;
192		interrupt-parent = <&wkup_gpio0>;
193		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
194		interrupt-controller;
195		#interrupt-cells = <2>;
196	};
197};
198
199&main_i2c0 {
200	pinctrl-names = "default";
201	pinctrl-0 = <&main_i2c0_pins_default>;
202	clock-frequency = <400000>;
203
204	pca9555: gpio@21 {
205		compatible = "nxp,pca9555";
206		reg = <0x21>;
207		gpio-controller;
208		#gpio-cells = <2>;
209	};
210};
211
212&main_i2c1 {
213	pinctrl-names = "default";
214	pinctrl-0 = <&main_i2c1_pins_default>;
215	clock-frequency = <400000>;
216};
217
218&main_i2c2 {
219	pinctrl-names = "default";
220	pinctrl-0 = <&main_i2c2_pins_default>;
221	clock-frequency = <400000>;
222};
223
224&ecap0 {
225	pinctrl-names = "default";
226	pinctrl-0 = <&ecap0_pins_default>;
227};
228
229&main_spi0 {
230	pinctrl-names = "default";
231	pinctrl-0 = <&main_spi0_pins_default>;
232	#address-cells = <1>;
233	#size-cells= <0>;
234	ti,pindir-d0-out-d1-in = <1>;
235
236	flash@0{
237		compatible = "jedec,spi-nor";
238		reg = <0x0>;
239		spi-tx-bus-width = <1>;
240		spi-rx-bus-width = <1>;
241		spi-max-frequency = <48000000>;
242		#address-cells = <1>;
243		#size-cells= <1>;
244	};
245};
246
247&sdhci0 {
248	pinctrl-names = "default";
249	pinctrl-0 = <&main_mmc0_pins_default>;
250	bus-width = <8>;
251	non-removable;
252	ti,driver-strength-ohm = <50>;
253	disable-wp;
254};
255
256&dwc3_1 {
257	status = "okay";
258};
259
260&usb1_phy {
261	status = "okay";
262};
263
264&usb1 {
265	pinctrl-names = "default";
266	pinctrl-0 = <&usb1_pins_default>;
267	dr_mode = "otg";
268};
269
270&dwc3_0 {
271	status = "disabled";
272};
273
274&usb0_phy {
275	status = "disabled";
276};
277
278&tscadc0 {
279	adc {
280		ti,adc-channels = <0 1 2 3 4 5 6 7>;
281	};
282};
283
284&tscadc1 {
285	adc {
286		ti,adc-channels = <0 1 2 3 4 5 6 7>;
287	};
288};
289
290&serdes0 {
291	status = "disabled";
292};
293
294&serdes1 {
295	status = "disabled";
296};
297
298&pcie0_rc {
299	status = "disabled";
300};
301
302&pcie0_ep {
303	status = "disabled";
304};
305
306&pcie1_rc {
307	status = "disabled";
308};
309
310&pcie1_ep {
311	status = "disabled";
312};
313
314&mailbox0_cluster0 {
315	interrupts = <164 0>;
316
317	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
318		ti,mbox-tx = <1 0 0>;
319		ti,mbox-rx = <0 0 0>;
320	};
321};
322
323&mailbox0_cluster1 {
324	interrupts = <165 0>;
325
326	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
327		ti,mbox-tx = <1 0 0>;
328		ti,mbox-rx = <0 0 0>;
329	};
330};
331
332&mailbox0_cluster2 {
333	status = "disabled";
334};
335
336&mailbox0_cluster3 {
337	status = "disabled";
338};
339
340&mailbox0_cluster4 {
341	status = "disabled";
342};
343
344&mailbox0_cluster5 {
345	status = "disabled";
346};
347
348&mailbox0_cluster6 {
349	status = "disabled";
350};
351
352&mailbox0_cluster7 {
353	status = "disabled";
354};
355
356&mailbox0_cluster8 {
357	status = "disabled";
358};
359
360&mailbox0_cluster9 {
361	status = "disabled";
362};
363
364&mailbox0_cluster10 {
365	status = "disabled";
366};
367
368&mailbox0_cluster11 {
369	status = "disabled";
370};
371
372&ospi0 {
373	pinctrl-names = "default";
374	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
375
376	flash@0{
377		compatible = "jedec,spi-nor";
378		reg = <0x0>;
379		spi-tx-bus-width = <1>;
380		spi-rx-bus-width = <8>;
381		spi-max-frequency = <40000000>;
382		cdns,tshsl-ns = <60>;
383		cdns,tsd2d-ns = <60>;
384		cdns,tchsh-ns = <60>;
385		cdns,tslch-ns = <60>;
386		cdns,read-delay = <0>;
387		#address-cells = <1>;
388		#size-cells = <1>;
389	};
390};
391