14201af25SNishanth Menon// SPDX-License-Identifier: GPL-2.0 24201af25SNishanth Menon/* 34201af25SNishanth Menon * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals 44201af25SNishanth Menon * 5303d6f62SAlexander A. Klimov * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 64201af25SNishanth Menon */ 74201af25SNishanth Menon 84201af25SNishanth Menon&cbass_wakeup { 99d3c9378SNishanth Menon dmsc: system-controller@44083000 { 10f5a5d83fSLokesh Vutla compatible = "ti,am654-sci"; 1142e54f64SNishanth Menon ti,host-id = <12>; 1242e54f64SNishanth Menon 1342e54f64SNishanth Menon mbox-names = "rx", "tx"; 1442e54f64SNishanth Menon 1542e54f64SNishanth Menon mboxes = <&secure_proxy_main 11>, 1642e54f64SNishanth Menon <&secure_proxy_main 13>; 1742e54f64SNishanth Menon 18830454bbSNishanth Menon reg-names = "debug_messages"; 19830454bbSNishanth Menon reg = <0x44083000 0x1000>; 20830454bbSNishanth Menon 2142e54f64SNishanth Menon k3_pds: power-controller { 2242e54f64SNishanth Menon compatible = "ti,sci-pm-domain"; 23c68272cbSLokesh Vutla #power-domain-cells = <2>; 2442e54f64SNishanth Menon }; 2542e54f64SNishanth Menon 26a0812885SNishanth Menon k3_clks: clock-controller { 2742e54f64SNishanth Menon compatible = "ti,k2g-sci-clk"; 2842e54f64SNishanth Menon #clock-cells = <2>; 2942e54f64SNishanth Menon }; 3042e54f64SNishanth Menon 3142e54f64SNishanth Menon k3_reset: reset-controller { 3242e54f64SNishanth Menon compatible = "ti,sci-reset"; 3342e54f64SNishanth Menon #reset-cells = <2>; 3442e54f64SNishanth Menon }; 3542e54f64SNishanth Menon }; 3642e54f64SNishanth Menon 3732369aa1SGrygorii Strashko chipid@43000014 { 3832369aa1SGrygorii Strashko compatible = "ti,am654-chipid"; 3932369aa1SGrygorii Strashko reg = <0x43000014 0x4>; 4032369aa1SGrygorii Strashko }; 4132369aa1SGrygorii Strashko 42dcccf770SNishanth Menon wkup_pmx0: pinctrl@4301c000 { 431d79b437STero Kristo compatible = "pinctrl-single"; 441d79b437STero Kristo reg = <0x4301c000 0x118>; 451d79b437STero Kristo #pinctrl-cells = <1>; 461d79b437STero Kristo pinctrl-single,register-width = <32>; 471d79b437STero Kristo pinctrl-single,function-mask = <0xffffffff>; 481d79b437STero Kristo }; 491d79b437STero Kristo 504201af25SNishanth Menon wkup_uart0: serial@42300000 { 514201af25SNishanth Menon compatible = "ti,am654-uart"; 528588eac3SVignesh R reg = <0x42300000 0x100>; 534201af25SNishanth Menon interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>; 544201af25SNishanth Menon clock-frequency = <48000000>; 554201af25SNishanth Menon current-speed = <115200>; 56c68272cbSLokesh Vutla power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; 57*65e8781aSAndrew Davis status = "disabled"; 584201af25SNishanth Menon }; 5919a1768fSVignesh R 6019a1768fSVignesh R wkup_i2c0: i2c@42120000 { 6119a1768fSVignesh R compatible = "ti,am654-i2c", "ti,omap4-i2c"; 6219a1768fSVignesh R reg = <0x42120000 0x100>; 6319a1768fSVignesh R interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; 6419a1768fSVignesh R #address-cells = <1>; 6519a1768fSVignesh R #size-cells = <0>; 6619a1768fSVignesh R clock-names = "fck"; 6719a1768fSVignesh R clocks = <&k3_clks 115 1>; 68c68272cbSLokesh Vutla power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; 6919a1768fSVignesh R }; 705fec389fSLokesh Vutla 71cab12badSNishanth Menon intr_wkup_gpio: interrupt-controller@42200000 { 725fec389fSLokesh Vutla compatible = "ti,sci-intr"; 73cab12badSNishanth Menon reg = <0x42200000 0x200>; 745fec389fSLokesh Vutla ti,intr-trigger-type = <1>; 755fec389fSLokesh Vutla interrupt-controller; 765fec389fSLokesh Vutla interrupt-parent = <&gic500>; 77fef84512SLokesh Vutla #interrupt-cells = <1>; 785fec389fSLokesh Vutla ti,sci = <&dmsc>; 79fef84512SLokesh Vutla ti,sci-dev-id = <156>; 80fef84512SLokesh Vutla ti,interrupt-ranges = <0 712 16>; 815fec389fSLokesh Vutla }; 827a558c46SKeerthy 8391e5f404SNishanth Menon wkup_gpio0: gpio@42110000 { 847a558c46SKeerthy compatible = "ti,am654-gpio", "ti,keystone-gpio"; 857a558c46SKeerthy reg = <0x42110000 0x100>; 867a558c46SKeerthy gpio-controller; 877a558c46SKeerthy #gpio-cells = <2>; 887a558c46SKeerthy interrupt-parent = <&intr_wkup_gpio>; 89fef84512SLokesh Vutla interrupts = <60>, <61>, <62>, <63>; 907a558c46SKeerthy interrupt-controller; 917a558c46SKeerthy #interrupt-cells = <2>; 927a558c46SKeerthy ti,ngpio = <56>; 937a558c46SKeerthy ti,davinci-gpio-unbanked = <0>; 947a558c46SKeerthy clocks = <&k3_clks 59 0>; 957a558c46SKeerthy clock-names = "gpio"; 967a558c46SKeerthy }; 977fd28c6aSKeerthy 989a8ecd41SNishanth Menon wkup_vtm0: temperature-sensor@42050000 { 997fd28c6aSKeerthy compatible = "ti,am654-vtm"; 1007fd28c6aSKeerthy reg = <0x42050000 0x25c>; 1017fd28c6aSKeerthy power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; 1027fd28c6aSKeerthy #thermal-sensor-cells = <1>; 1037fd28c6aSKeerthy }; 1044201af25SNishanth Menon}; 105