18abae938SDave Gerlach// SPDX-License-Identifier: GPL-2.0 28abae938SDave Gerlach/* 38abae938SDave Gerlach * Device Tree Source for AM64 SoC Family MCU Domain peripherals 48abae938SDave Gerlach * 58abae938SDave Gerlach * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 68abae938SDave Gerlach */ 78abae938SDave Gerlach 88abae938SDave Gerlach&cbass_mcu { 98abae938SDave Gerlach mcu_uart0: serial@4a00000 { 108abae938SDave Gerlach compatible = "ti,am64-uart", "ti,am654-uart"; 118abae938SDave Gerlach reg = <0x00 0x04a00000 0x00 0x100>; 128abae938SDave Gerlach interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 138abae938SDave Gerlach clock-frequency = <48000000>; 148abae938SDave Gerlach current-speed = <115200>; 158abae938SDave Gerlach power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 168abae938SDave Gerlach clocks = <&k3_clks 149 0>; 178abae938SDave Gerlach clock-names = "fclk"; 188abae938SDave Gerlach }; 198abae938SDave Gerlach 208abae938SDave Gerlach mcu_uart1: serial@4a10000 { 218abae938SDave Gerlach compatible = "ti,am64-uart", "ti,am654-uart"; 228abae938SDave Gerlach reg = <0x00 0x04a10000 0x00 0x100>; 238abae938SDave Gerlach interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 248abae938SDave Gerlach clock-frequency = <48000000>; 258abae938SDave Gerlach current-speed = <115200>; 268abae938SDave Gerlach power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>; 278abae938SDave Gerlach clocks = <&k3_clks 160 0>; 288abae938SDave Gerlach clock-names = "fclk"; 298abae938SDave Gerlach }; 308abae938SDave Gerlach 318abae938SDave Gerlach mcu_i2c0: i2c@4900000 { 328abae938SDave Gerlach compatible = "ti,am64-i2c", "ti,omap4-i2c"; 338abae938SDave Gerlach reg = <0x00 0x04900000 0x00 0x100>; 348abae938SDave Gerlach interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 358abae938SDave Gerlach #address-cells = <1>; 368abae938SDave Gerlach #size-cells = <0>; 378abae938SDave Gerlach power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; 388abae938SDave Gerlach clocks = <&k3_clks 106 2>; 398abae938SDave Gerlach clock-names = "fck"; 408abae938SDave Gerlach }; 418abae938SDave Gerlach 428abae938SDave Gerlach mcu_i2c1: i2c@4910000 { 438abae938SDave Gerlach compatible = "ti,am64-i2c", "ti,omap4-i2c"; 448abae938SDave Gerlach reg = <0x00 0x04910000 0x00 0x100>; 458abae938SDave Gerlach interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 468abae938SDave Gerlach #address-cells = <1>; 478abae938SDave Gerlach #size-cells = <0>; 488abae938SDave Gerlach power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; 498abae938SDave Gerlach clocks = <&k3_clks 107 2>; 508abae938SDave Gerlach clock-names = "fck"; 518abae938SDave Gerlach }; 528abae938SDave Gerlach 538abae938SDave Gerlach mcu_spi0: spi@4b00000 { 548abae938SDave Gerlach compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; 558abae938SDave Gerlach reg = <0x00 0x04b00000 0x00 0x400>; 568abae938SDave Gerlach interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 578abae938SDave Gerlach #address-cells = <1>; 588abae938SDave Gerlach #size-cells = <0>; 598abae938SDave Gerlach power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; 608abae938SDave Gerlach clocks = <&k3_clks 147 0>; 618abae938SDave Gerlach }; 628abae938SDave Gerlach 638abae938SDave Gerlach mcu_spi1: spi@4b10000 { 648abae938SDave Gerlach compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 658abae938SDave Gerlach reg = <0x00 0x04b10000 0x00 0x400>; 668abae938SDave Gerlach interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 678abae938SDave Gerlach #address-cells = <1>; 688abae938SDave Gerlach #size-cells = <0>; 698abae938SDave Gerlach power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; 708abae938SDave Gerlach clocks = <&k3_clks 148 0>; 718abae938SDave Gerlach }; 7201a91e01SAswath Govindraju 73cab12badSNishanth Menon mcu_gpio_intr: interrupt-controller@4210000 { 7401a91e01SAswath Govindraju compatible = "ti,sci-intr"; 75cab12badSNishanth Menon reg = <0x00 0x04210000 0x00 0x200>; 7601a91e01SAswath Govindraju ti,intr-trigger-type = <1>; 7701a91e01SAswath Govindraju interrupt-controller; 7801a91e01SAswath Govindraju interrupt-parent = <&gic500>; 7901a91e01SAswath Govindraju #interrupt-cells = <1>; 8001a91e01SAswath Govindraju ti,sci = <&dmsc>; 8101a91e01SAswath Govindraju ti,sci-dev-id = <5>; 8201a91e01SAswath Govindraju ti,interrupt-ranges = <0 104 4>; 8301a91e01SAswath Govindraju }; 8401a91e01SAswath Govindraju 8501a91e01SAswath Govindraju mcu_gpio0: gpio@4201000 { 86ec2fb989SAswath Govindraju compatible = "ti,am64-gpio", "ti,keystone-gpio"; 8701a91e01SAswath Govindraju reg = <0x0 0x4201000 0x0 0x100>; 8801a91e01SAswath Govindraju gpio-controller; 8901a91e01SAswath Govindraju #gpio-cells = <2>; 9001a91e01SAswath Govindraju interrupt-parent = <&mcu_gpio_intr>; 9101a91e01SAswath Govindraju interrupts = <30>, <31>; 9201a91e01SAswath Govindraju interrupt-controller; 9301a91e01SAswath Govindraju #interrupt-cells = <2>; 9401a91e01SAswath Govindraju ti,ngpio = <23>; 9501a91e01SAswath Govindraju ti,davinci-gpio-unbanked = <0>; 9601a91e01SAswath Govindraju power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; 9701a91e01SAswath Govindraju clocks = <&k3_clks 79 0>; 9801a91e01SAswath Govindraju clock-names = "gpio"; 9901a91e01SAswath Govindraju }; 100*500e6dfbSChristian Gmeiner 101*500e6dfbSChristian Gmeiner mcu_pmx0: pinctrl@4084000 { 102*500e6dfbSChristian Gmeiner compatible = "pinctrl-single"; 103*500e6dfbSChristian Gmeiner reg = <0x00 0x4084000 0x00 0x84>; 104*500e6dfbSChristian Gmeiner #pinctrl-cells = <1>; 105*500e6dfbSChristian Gmeiner pinctrl-single,register-width = <32>; 106*500e6dfbSChristian Gmeiner pinctrl-single,function-mask = <0xffffffff>; 107*500e6dfbSChristian Gmeiner }; 1088abae938SDave Gerlach}; 109