1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Device Tree file for the AM62P5-SK 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * Schematics: https://www.ti.com/lit/zip/sprr487 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/net/ti-dp83867.h> 14#include "k3-am62p5.dtsi" 15 16/ { 17 compatible = "ti,am62p5-sk", "ti,am62p5"; 18 model = "Texas Instruments AM62P5 SK"; 19 20 aliases { 21 serial0 = &wkup_uart0; 22 serial2 = &main_uart0; 23 serial3 = &main_uart1; 24 mmc0 = &sdhci0; 25 mmc1 = &sdhci1; 26 mmc2 = &sdhci2; 27 spi0 = &ospi0; 28 ethernet0 = &cpsw_port1; 29 ethernet1 = &cpsw_port2; 30 usb0 = &usb0; 31 usb1 = &usb1; 32 }; 33 34 chosen { 35 stdout-path = &main_uart0; 36 }; 37 38 memory@80000000 { 39 /* 8G RAM */ 40 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 41 <0x00000008 0x80000000 0x00000001 0x80000000>; 42 device_type = "memory"; 43 bootph-pre-ram; 44 }; 45 46 reserved-memory { 47 #address-cells = <2>; 48 #size-cells = <2>; 49 ranges; 50 51 secure_tfa_ddr: tfa@9e780000 { 52 reg = <0x00 0x9e780000 0x00 0x80000>; 53 no-map; 54 }; 55 56 secure_ddr: optee@9e800000 { 57 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 58 no-map; 59 }; 60 61 wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 62 compatible = "shared-dma-pool"; 63 reg = <0x00 0x9c900000 0x00 0x01e00000>; 64 no-map; 65 }; 66 }; 67 68 vmain_pd: regulator-0 { 69 /* TPS65988 PD CONTROLLER OUTPUT */ 70 compatible = "regulator-fixed"; 71 regulator-name = "vmain_pd"; 72 regulator-min-microvolt = <5000000>; 73 regulator-max-microvolt = <5000000>; 74 regulator-always-on; 75 regulator-boot-on; 76 bootph-all; 77 }; 78 79 vcc_5v0: regulator-1 { 80 /* Output of TPS630702RNMR */ 81 compatible = "regulator-fixed"; 82 regulator-name = "vcc_5v0"; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 vin-supply = <&vmain_pd>; 86 regulator-always-on; 87 regulator-boot-on; 88 bootph-all; 89 }; 90 91 vdd_mmc1: regulator-2 { 92 /* TPS22918DBVR */ 93 compatible = "regulator-fixed"; 94 regulator-name = "vdd_mmc1"; 95 regulator-min-microvolt = <3300000>; 96 regulator-max-microvolt = <3300000>; 97 regulator-boot-on; 98 enable-active-high; 99 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 100 bootph-all; 101 }; 102 103 vddshv_sdio: regulator-3 { 104 compatible = "regulator-gpio"; 105 regulator-name = "vddshv_sdio"; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&vddshv_sdio_pins_default>; 108 regulator-min-microvolt = <1800000>; 109 regulator-max-microvolt = <3300000>; 110 regulator-boot-on; 111 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 112 states = <1800000 0x0>, 113 <3300000 0x1>; 114 bootph-all; 115 }; 116 117 leds { 118 compatible = "gpio-leds"; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&usr_led_pins_default>; 121 122 led-0 { 123 label = "am62-sk:green:heartbeat"; 124 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 125 linux,default-trigger = "heartbeat"; 126 function = LED_FUNCTION_HEARTBEAT; 127 default-state = "off"; 128 }; 129 }; 130 131 tlv320_mclk: clk-0 { 132 #clock-cells = <0>; 133 compatible = "fixed-clock"; 134 clock-frequency = <12288000>; 135 }; 136 137 codec_audio: sound { 138 compatible = "simple-audio-card"; 139 simple-audio-card,name = "AM62x-SKEVM"; 140 simple-audio-card,widgets = 141 "Headphone", "Headphone Jack", 142 "Line", "Line In", 143 "Microphone", "Microphone Jack"; 144 simple-audio-card,routing = 145 "Headphone Jack", "HPLOUT", 146 "Headphone Jack", "HPROUT", 147 "LINE1L", "Line In", 148 "LINE1R", "Line In", 149 "MIC3R", "Microphone Jack", 150 "Microphone Jack", "Mic Bias"; 151 simple-audio-card,format = "dsp_b"; 152 simple-audio-card,bitclock-master = <&sound_master>; 153 simple-audio-card,frame-master = <&sound_master>; 154 simple-audio-card,bitclock-inversion; 155 156 simple-audio-card,cpu { 157 sound-dai = <&mcasp1>; 158 }; 159 160 sound_master: simple-audio-card,codec { 161 sound-dai = <&tlv320aic3106>; 162 clocks = <&tlv320_mclk>; 163 }; 164 }; 165}; 166 167&main_gpio0 { 168 bootph-all; 169}; 170 171&main_gpio1 { 172 bootph-all; 173}; 174 175&main_pmx0 { 176 bootph-all; 177 178 main_i2c0_pins_default: main-i2c0-default-pins { 179 pinctrl-single,pins = < 180 AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ 181 AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ 182 >; 183 }; 184 185 main_i2c1_pins_default: main-i2c1-default-pins { 186 pinctrl-single,pins = < 187 AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ 188 AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ 189 >; 190 bootph-all; 191 }; 192 193 main_i2c2_pins_default: main-i2c2-default-pins { 194 pinctrl-single,pins = < 195 AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ 196 AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ 197 >; 198 }; 199 200 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 201 pinctrl-single,pins = < 202 AM62PX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C22) UART0_RTSn.GPIO1_23 */ 203 >; 204 }; 205 206 main_mcasp1_pins_default: main-mcasp1-default-pins { 207 pinctrl-single,pins = < 208 AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 209 AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ 210 AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ 211 AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 212 >; 213 }; 214 215 main_mdio1_pins_default: main-mdio1-default-pins { 216 pinctrl-single,pins = < 217 AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ 218 AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */ 219 >; 220 }; 221 222 main_mmc1_pins_default: main-mmc1-default-pins { 223 pinctrl-single,pins = < 224 AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ 225 AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ 226 AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ 227 AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ 228 AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ 229 AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ 230 AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ 231 >; 232 bootph-all; 233 }; 234 235 main_mmc2_pins_default: main-mmc2-default-pins { 236 pinctrl-single,pins = < 237 AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */ 238 AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */ 239 AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */ 240 AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */ 241 AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */ 242 AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */ 243 AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */ 244 >; 245 bootph-all; 246 }; 247 248 main_rgmii1_pins_default: main-rgmii1-default-pins { 249 pinctrl-single,pins = < 250 AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */ 251 AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */ 252 AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */ 253 AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */ 254 AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */ 255 AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ 256 AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */ 257 AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */ 258 AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */ 259 AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */ 260 AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */ 261 AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ 262 >; 263 bootph-all; 264 }; 265 266 main_rgmii2_pins_default: main-rgmii2-default-pins { 267 pinctrl-single,pins = < 268 AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */ 269 AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */ 270 AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */ 271 AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */ 272 AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */ 273 AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ 274 AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */ 275 AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */ 276 AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */ 277 AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */ 278 AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC */ 279 AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ 280 >; 281 bootph-all; 282 }; 283 284 main_uart0_pins_default: main-uart0-default-pins { 285 pinctrl-single,pins = < 286 AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 287 AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 288 >; 289 bootph-all; 290 }; 291 292 main_uart1_pins_default: main-uart1-default-pins { 293 pinctrl-single,pins = < 294 AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */ 295 AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ 296 AM62PX_IOPAD(0x01ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR.UART1_RXD */ 297 AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ 298 >; 299 bootph-all; 300 }; 301 302 main_usb1_pins_default: main-usb1-default-pins { 303 pinctrl-single,pins = < 304 AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ 305 >; 306 }; 307 308 main_wlirq_pins_default: main-wlirq-default-pins { 309 pinctrl-single,pins = < 310 AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */ 311 >; 312 }; 313 314 ospi0_pins_default: ospi0-default-pins { 315 pinctrl-single,pins = < 316 AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ 317 AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ 318 AM62PX_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ 319 AM62PX_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ 320 AM62PX_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ 321 AM62PX_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ 322 AM62PX_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ 323 AM62PX_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ 324 AM62PX_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ 325 AM62PX_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ 326 AM62PX_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ 327 >; 328 bootph-all; 329 }; 330 331 usr_led_pins_default: usr-led-default-pins { 332 pinctrl-single,pins = < 333 AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */ 334 >; 335 }; 336 337 vddshv_sdio_pins_default: vddshvr-sdio-default-pins { 338 pinctrl-single,pins = < 339 AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ 340 >; 341 bootph-all; 342 }; 343 344 wlan_en_pins_default: wlan-en-default-pins { 345 pinctrl-single,pins = < 346 AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ 347 >; 348 }; 349}; 350 351&main_i2c0 { 352 status = "okay"; 353 pinctrl-names = "default"; 354 pinctrl-0 = <&main_i2c0_pins_default>; 355 clock-frequency = <400000>; 356 357 typec_pd0: usb-power-controller@3f { 358 compatible = "ti,tps6598x"; 359 reg = <0x3f>; 360 361 connector { 362 compatible = "usb-c-connector"; 363 label = "USB-C"; 364 self-powered; 365 data-role = "dual"; 366 power-role = "sink"; 367 port { 368 usb_con_hs: endpoint { 369 remote-endpoint = <&usb0_hs_ep>; 370 }; 371 }; 372 }; 373 }; 374}; 375 376&main_i2c1 { 377 status = "okay"; 378 pinctrl-names = "default"; 379 pinctrl-0 = <&main_i2c1_pins_default>; 380 clock-frequency = <100000>; 381 bootph-all; 382 383 tlv320aic3106: audio-codec@1b { 384 #sound-dai-cells = <0>; 385 compatible = "ti,tlv320aic3106"; 386 reg = <0x1b>; 387 ai3x-micbias-vg = <1>; /* 2.0V */ 388 }; 389 390 exp1: gpio@22 { 391 compatible = "ti,tca6424"; 392 reg = <0x22>; 393 gpio-controller; 394 #gpio-cells = <2>; 395 gpio-line-names = "OLDI_INT#", "x8_NAND_DETECT", 396 "UART1_FET_SEL", "MMC1_SD_EN", 397 "VPP_EN", "EXP_PS_3V3_EN", 398 "UART1_FET_BUF_EN", "EXP_HAT_DETECT", 399 "DSI_GPIO0", "DSI_GPIO1", 400 "OLDI_EDID", "BT_UART_WAKE_SOC_3V3", 401 "USB_TYPEA_OC_INDICATION", "CSI_GPIO0", 402 "CSI_GPIO1", "WLAN_ALERTn", 403 "HDMI_INTn", "TEST_GPIO2", 404 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 405 "MCASP1_FET_SEL", "DSI_EDID", 406 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 407 408 interrupt-parent = <&main_gpio1>; 409 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 410 interrupt-controller; 411 #interrupt-cells = <2>; 412 413 pinctrl-names = "default"; 414 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 415 bootph-all; 416 }; 417 418 exp2: gpio@23 { 419 compatible = "ti,tca6424"; 420 reg = <0x23>; 421 gpio-controller; 422 #gpio-cells = <2>; 423 gpio-line-names = "BT_EN_SOC", "EXP_PS_5V0_EN", 424 "", "", 425 "", "", 426 "", "", 427 "WL_LT_EN", "", 428 "TP3", "TP6", 429 "TP4", "TP7", 430 "TP5", "TP8", 431 "SoC_I2C2_MCAN_SEL", "GPIO_HDMI_RSTn", 432 "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 433 "GPIO_OLDI_RSTn", "GPIO_AUD_RSTn", 434 "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST"; 435 }; 436}; 437 438&main_i2c2 { 439 status = "okay"; 440 pinctrl-names = "default"; 441 pinctrl-0 = <&main_i2c2_pins_default>; 442 clock-frequency = <400000>; 443}; 444 445&sdhci0 { 446 status = "okay"; 447 ti,driver-strength-ohm = <50>; 448 disable-wp; 449 bootph-all; 450}; 451 452&sdhci1 { 453 /* SD/MMC */ 454 status = "okay"; 455 vmmc-supply = <&vdd_mmc1>; 456 vqmmc-supply = <&vddshv_sdio>; 457 pinctrl-names = "default"; 458 pinctrl-0 = <&main_mmc1_pins_default>; 459 disable-wp; 460 bootph-all; 461}; 462 463&cpsw3g { 464 pinctrl-names = "default"; 465 pinctrl-0 = <&main_rgmii1_pins_default>, 466 <&main_rgmii2_pins_default>; 467 status = "okay"; 468}; 469 470&cpsw_port1 { 471 phy-mode = "rgmii-rxid"; 472 phy-handle = <&cpsw3g_phy0>; 473 status = "okay"; 474}; 475 476&cpsw_port2 { 477 phy-mode = "rgmii-rxid"; 478 phy-handle = <&cpsw3g_phy1>; 479 status = "okay"; 480}; 481 482&cpsw3g_mdio { 483 pinctrl-names = "default"; 484 pinctrl-0 = <&main_mdio1_pins_default>; 485 status = "okay"; 486 487 cpsw3g_phy0: ethernet-phy@0 { 488 reg = <0>; 489 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 490 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 491 ti,min-output-impedance; 492 }; 493 494 cpsw3g_phy1: ethernet-phy@1 { 495 reg = <1>; 496 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 497 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 498 ti,min-output-impedance; 499 }; 500}; 501 502&usbss0 { 503 status = "okay"; 504 ti,vbus-divider; 505}; 506 507&usbss1 { 508 status = "okay"; 509 ti,vbus-divider; 510}; 511 512&usb0 { 513 usb-role-switch; 514 515 port { 516 usb0_hs_ep: endpoint { 517 remote-endpoint = <&usb_con_hs>; 518 }; 519 }; 520}; 521 522&usb1 { 523 dr_mode = "host"; 524 pinctrl-names = "default"; 525 pinctrl-0 = <&main_usb1_pins_default>; 526}; 527 528&mcasp1 { 529 status = "okay"; 530 #sound-dai-cells = <0>; 531 532 pinctrl-names = "default"; 533 pinctrl-0 = <&main_mcasp1_pins_default>; 534 535 op-mode = <0>; /* MCASP_IIS_MODE */ 536 tdm-slots = <2>; 537 538 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 539 1 0 2 0 540 0 0 0 0 541 0 0 0 0 542 0 0 0 0 543 >; 544}; 545 546&fss { 547 bootph-all; 548}; 549 550&ospi0 { 551 status = "okay"; 552 pinctrl-names = "default"; 553 pinctrl-0 = <&ospi0_pins_default>; 554 bootph-all; 555 556 flash@0 { 557 compatible = "jedec,spi-nor"; 558 reg = <0x0>; 559 spi-tx-bus-width = <8>; 560 spi-rx-bus-width = <8>; 561 spi-max-frequency = <25000000>; 562 cdns,tshsl-ns = <60>; 563 cdns,tsd2d-ns = <60>; 564 cdns,tchsh-ns = <60>; 565 cdns,tslch-ns = <60>; 566 cdns,read-delay = <4>; 567 bootph-all; 568 569 partitions { 570 compatible = "fixed-partitions"; 571 #address-cells = <1>; 572 #size-cells = <1>; 573 bootph-all; 574 575 partition@0 { 576 label = "ospi.tiboot3"; 577 reg = <0x00 0x80000>; 578 }; 579 580 partition@80000 { 581 label = "ospi.tispl"; 582 reg = <0x80000 0x200000>; 583 }; 584 585 partition@280000 { 586 label = "ospi.u-boot"; 587 reg = <0x280000 0x400000>; 588 }; 589 590 partition@680000 { 591 label = "ospi.env"; 592 reg = <0x680000 0x40000>; 593 }; 594 595 partition@6c0000 { 596 label = "ospi.env.backup"; 597 reg = <0x6c0000 0x40000>; 598 }; 599 600 partition@800000 { 601 label = "ospi.rootfs"; 602 reg = <0x800000 0x37c0000>; 603 }; 604 605 partition@3fc0000 { 606 label = "ospi.phypattern"; 607 reg = <0x3fc0000 0x40000>; 608 bootph-all; 609 }; 610 }; 611 }; 612}; 613 614&mailbox0_cluster0 { 615 mbox_r5_0: mbox-r5-0 { 616 ti,mbox-rx = <0 0 0>; 617 ti,mbox-tx = <1 0 0>; 618 }; 619}; 620 621&mailbox0_cluster1 { 622 mbox_mcu_r5_0: mbox-mcu-r5-0 { 623 ti,mbox-rx = <0 0 0>; 624 ti,mbox-tx = <1 0 0>; 625 }; 626}; 627 628&main_uart0 { 629 pinctrl-names = "default"; 630 pinctrl-0 = <&main_uart0_pins_default>; 631 status = "okay"; 632 bootph-all; 633}; 634 635&main_uart1 { 636 pinctrl-names = "default"; 637 pinctrl-0 = <&main_uart1_pins_default>; 638 /* Main UART1 is used by TIFS firmware */ 639 status = "reserved"; 640 bootph-all; 641}; 642 643&mcu_pmx0 { 644 bootph-all; 645 646 wkup_uart0_pins_default: wkup-uart0-default-pins { 647 pinctrl-single,pins = < 648 AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 649 AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 650 >; 651 bootph-all; 652 }; 653}; 654 655&wkup_uart0 { 656 /* WKUP UART0 is used by DM firmware */ 657 pinctrl-names = "default"; 658 pinctrl-0 = <&wkup_uart0_pins_default>; 659 status = "reserved"; 660 bootph-all; 661}; 662 663/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 664&mcu_gpio0 { 665 status = "reserved"; 666}; 667 668&mcu_gpio_intr { 669 status = "reserved"; 670}; 671