1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Device Tree file for the AM62P5-SK 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * Schematics: https://www.ti.com/lit/zip/sprr487 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/net/ti-dp83867.h> 14#include "k3-am62p5.dtsi" 15 16/ { 17 compatible = "ti,am62p5-sk", "ti,am62p5"; 18 model = "Texas Instruments AM62P5 SK"; 19 20 aliases { 21 serial0 = &wkup_uart0; 22 serial2 = &main_uart0; 23 serial3 = &main_uart1; 24 mmc0 = &sdhci0; 25 mmc1 = &sdhci1; 26 mmc2 = &sdhci2; 27 spi0 = &ospi0; 28 ethernet0 = &cpsw_port1; 29 ethernet1 = &cpsw_port2; 30 usb0 = &usb0; 31 usb1 = &usb1; 32 }; 33 34 chosen { 35 stdout-path = &main_uart0; 36 }; 37 38 memory@80000000 { 39 /* 8G RAM */ 40 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 41 <0x00000008 0x80000000 0x00000001 0x80000000>; 42 device_type = "memory"; 43 bootph-pre-ram; 44 }; 45 46 reserved-memory { 47 #address-cells = <2>; 48 #size-cells = <2>; 49 ranges; 50 51 secure_tfa_ddr: tfa@9e780000 { 52 reg = <0x00 0x9e780000 0x00 0x80000>; 53 no-map; 54 }; 55 56 secure_ddr: optee@9e800000 { 57 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 58 no-map; 59 }; 60 61 wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 62 compatible = "shared-dma-pool"; 63 reg = <0x00 0x9c900000 0x00 0x01e00000>; 64 no-map; 65 }; 66 }; 67 68 vmain_pd: regulator-0 { 69 /* TPS65988 PD CONTROLLER OUTPUT */ 70 compatible = "regulator-fixed"; 71 regulator-name = "vmain_pd"; 72 regulator-min-microvolt = <5000000>; 73 regulator-max-microvolt = <5000000>; 74 regulator-always-on; 75 regulator-boot-on; 76 bootph-all; 77 }; 78 79 vcc_5v0: regulator-1 { 80 /* Output of TPS630702RNMR */ 81 compatible = "regulator-fixed"; 82 regulator-name = "vcc_5v0"; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 vin-supply = <&vmain_pd>; 86 regulator-always-on; 87 regulator-boot-on; 88 bootph-all; 89 }; 90 91 vdd_mmc1: regulator-2 { 92 /* TPS22918DBVR */ 93 compatible = "regulator-fixed"; 94 regulator-name = "vdd_mmc1"; 95 regulator-min-microvolt = <3300000>; 96 regulator-max-microvolt = <3300000>; 97 regulator-boot-on; 98 enable-active-high; 99 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 100 bootph-all; 101 }; 102 103 vddshv_sdio: regulator-3 { 104 compatible = "regulator-gpio"; 105 regulator-name = "vddshv_sdio"; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&vddshv_sdio_pins_default>; 108 regulator-min-microvolt = <1800000>; 109 regulator-max-microvolt = <3300000>; 110 regulator-boot-on; 111 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 112 states = <1800000 0x0>, 113 <3300000 0x1>; 114 bootph-all; 115 }; 116 117 leds { 118 compatible = "gpio-leds"; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&usr_led_pins_default>; 121 122 led-0 { 123 label = "am62-sk:green:heartbeat"; 124 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 125 linux,default-trigger = "heartbeat"; 126 function = LED_FUNCTION_HEARTBEAT; 127 default-state = "off"; 128 }; 129 }; 130 131 opp-table { 132 /* Requires VDD_CORE at 0v85 */ 133 opp-1400000000 { 134 opp-hz = /bits/ 64 <1400000000>; 135 opp-supported-hw = <0x01 0x0004>; 136 clock-latency-ns = <6000000>; 137 }; 138 }; 139 140 tlv320_mclk: clk-0 { 141 #clock-cells = <0>; 142 compatible = "fixed-clock"; 143 clock-frequency = <12288000>; 144 }; 145 146 codec_audio: sound { 147 compatible = "simple-audio-card"; 148 simple-audio-card,name = "AM62x-SKEVM"; 149 simple-audio-card,widgets = 150 "Headphone", "Headphone Jack", 151 "Line", "Line In", 152 "Microphone", "Microphone Jack"; 153 simple-audio-card,routing = 154 "Headphone Jack", "HPLOUT", 155 "Headphone Jack", "HPROUT", 156 "LINE1L", "Line In", 157 "LINE1R", "Line In", 158 "MIC3R", "Microphone Jack", 159 "Microphone Jack", "Mic Bias"; 160 simple-audio-card,format = "dsp_b"; 161 simple-audio-card,bitclock-master = <&sound_master>; 162 simple-audio-card,frame-master = <&sound_master>; 163 simple-audio-card,bitclock-inversion; 164 165 simple-audio-card,cpu { 166 sound-dai = <&mcasp1>; 167 }; 168 169 sound_master: simple-audio-card,codec { 170 sound-dai = <&tlv320aic3106>; 171 clocks = <&tlv320_mclk>; 172 }; 173 }; 174}; 175 176&main_gpio0 { 177 bootph-all; 178}; 179 180&main_gpio1 { 181 bootph-all; 182}; 183 184&main_pmx0 { 185 bootph-all; 186 187 main_i2c0_pins_default: main-i2c0-default-pins { 188 pinctrl-single,pins = < 189 AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ 190 AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ 191 >; 192 }; 193 194 main_i2c1_pins_default: main-i2c1-default-pins { 195 pinctrl-single,pins = < 196 AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ 197 AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ 198 >; 199 bootph-all; 200 }; 201 202 main_i2c2_pins_default: main-i2c2-default-pins { 203 pinctrl-single,pins = < 204 AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ 205 AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ 206 >; 207 }; 208 209 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 210 pinctrl-single,pins = < 211 AM62PX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C22) UART0_RTSn.GPIO1_23 */ 212 >; 213 }; 214 215 main_mcasp1_pins_default: main-mcasp1-default-pins { 216 pinctrl-single,pins = < 217 AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 218 AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ 219 AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ 220 AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 221 >; 222 }; 223 224 main_mdio1_pins_default: main-mdio1-default-pins { 225 pinctrl-single,pins = < 226 AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ 227 AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */ 228 >; 229 }; 230 231 main_mmc1_pins_default: main-mmc1-default-pins { 232 pinctrl-single,pins = < 233 AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ 234 AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ 235 AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ 236 AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ 237 AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ 238 AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ 239 AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ 240 >; 241 bootph-all; 242 }; 243 244 main_mmc2_pins_default: main-mmc2-default-pins { 245 pinctrl-single,pins = < 246 AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */ 247 AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */ 248 AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */ 249 AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */ 250 AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */ 251 AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */ 252 AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */ 253 >; 254 bootph-all; 255 }; 256 257 main_rgmii1_pins_default: main-rgmii1-default-pins { 258 pinctrl-single,pins = < 259 AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */ 260 AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */ 261 AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */ 262 AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */ 263 AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */ 264 AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ 265 AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */ 266 AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */ 267 AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */ 268 AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */ 269 AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */ 270 AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ 271 >; 272 bootph-all; 273 }; 274 275 main_rgmii2_pins_default: main-rgmii2-default-pins { 276 pinctrl-single,pins = < 277 AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */ 278 AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */ 279 AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */ 280 AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */ 281 AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */ 282 AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ 283 AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */ 284 AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */ 285 AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */ 286 AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */ 287 AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC */ 288 AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ 289 >; 290 bootph-all; 291 }; 292 293 main_uart0_pins_default: main-uart0-default-pins { 294 pinctrl-single,pins = < 295 AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 296 AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 297 >; 298 bootph-all; 299 }; 300 301 main_uart1_pins_default: main-uart1-default-pins { 302 pinctrl-single,pins = < 303 AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */ 304 AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ 305 AM62PX_IOPAD(0x01ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR.UART1_RXD */ 306 AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ 307 >; 308 bootph-all; 309 }; 310 311 main_usb1_pins_default: main-usb1-default-pins { 312 pinctrl-single,pins = < 313 AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ 314 >; 315 }; 316 317 main_wlirq_pins_default: main-wlirq-default-pins { 318 pinctrl-single,pins = < 319 AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */ 320 >; 321 }; 322 323 ospi0_pins_default: ospi0-default-pins { 324 pinctrl-single,pins = < 325 AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ 326 AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ 327 AM62PX_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ 328 AM62PX_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ 329 AM62PX_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ 330 AM62PX_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ 331 AM62PX_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ 332 AM62PX_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ 333 AM62PX_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ 334 AM62PX_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ 335 AM62PX_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ 336 >; 337 bootph-all; 338 }; 339 340 usr_led_pins_default: usr-led-default-pins { 341 pinctrl-single,pins = < 342 AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */ 343 >; 344 }; 345 346 vddshv_sdio_pins_default: vddshvr-sdio-default-pins { 347 pinctrl-single,pins = < 348 AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ 349 >; 350 bootph-all; 351 }; 352 353 wlan_en_pins_default: wlan-en-default-pins { 354 pinctrl-single,pins = < 355 AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ 356 >; 357 }; 358}; 359 360&main_i2c0 { 361 status = "okay"; 362 pinctrl-names = "default"; 363 pinctrl-0 = <&main_i2c0_pins_default>; 364 clock-frequency = <400000>; 365 366 typec_pd0: usb-power-controller@3f { 367 compatible = "ti,tps6598x"; 368 reg = <0x3f>; 369 370 connector { 371 compatible = "usb-c-connector"; 372 label = "USB-C"; 373 self-powered; 374 data-role = "dual"; 375 power-role = "sink"; 376 port { 377 usb_con_hs: endpoint { 378 remote-endpoint = <&usb0_hs_ep>; 379 }; 380 }; 381 }; 382 }; 383}; 384 385&main_i2c1 { 386 status = "okay"; 387 pinctrl-names = "default"; 388 pinctrl-0 = <&main_i2c1_pins_default>; 389 clock-frequency = <100000>; 390 bootph-all; 391 392 tlv320aic3106: audio-codec@1b { 393 #sound-dai-cells = <0>; 394 compatible = "ti,tlv320aic3106"; 395 reg = <0x1b>; 396 ai3x-micbias-vg = <1>; /* 2.0V */ 397 }; 398 399 exp1: gpio@22 { 400 compatible = "ti,tca6424"; 401 reg = <0x22>; 402 gpio-controller; 403 #gpio-cells = <2>; 404 gpio-line-names = "OLDI_INT#", "x8_NAND_DETECT", 405 "UART1_FET_SEL", "MMC1_SD_EN", 406 "VPP_EN", "EXP_PS_3V3_EN", 407 "UART1_FET_BUF_EN", "EXP_HAT_DETECT", 408 "DSI_GPIO0", "DSI_GPIO1", 409 "OLDI_EDID", "BT_UART_WAKE_SOC_3V3", 410 "USB_TYPEA_OC_INDICATION", "CSI_GPIO0", 411 "CSI_GPIO1", "WLAN_ALERTn", 412 "HDMI_INTn", "TEST_GPIO2", 413 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 414 "MCASP1_FET_SEL", "DSI_EDID", 415 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 416 417 interrupt-parent = <&main_gpio1>; 418 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 419 interrupt-controller; 420 #interrupt-cells = <2>; 421 422 pinctrl-names = "default"; 423 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 424 bootph-all; 425 }; 426 427 exp2: gpio@23 { 428 compatible = "ti,tca6424"; 429 reg = <0x23>; 430 gpio-controller; 431 #gpio-cells = <2>; 432 gpio-line-names = "BT_EN_SOC", "EXP_PS_5V0_EN", 433 "", "", 434 "", "", 435 "", "", 436 "WL_LT_EN", "", 437 "TP3", "TP6", 438 "TP4", "TP7", 439 "TP5", "TP8", 440 "SoC_I2C2_MCAN_SEL", "GPIO_HDMI_RSTn", 441 "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 442 "GPIO_OLDI_RSTn", "GPIO_AUD_RSTn", 443 "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST"; 444 }; 445}; 446 447&main_i2c2 { 448 status = "okay"; 449 pinctrl-names = "default"; 450 pinctrl-0 = <&main_i2c2_pins_default>; 451 clock-frequency = <400000>; 452}; 453 454&sdhci0 { 455 status = "okay"; 456 ti,driver-strength-ohm = <50>; 457 disable-wp; 458 bootph-all; 459}; 460 461&sdhci1 { 462 /* SD/MMC */ 463 status = "okay"; 464 vmmc-supply = <&vdd_mmc1>; 465 vqmmc-supply = <&vddshv_sdio>; 466 pinctrl-names = "default"; 467 pinctrl-0 = <&main_mmc1_pins_default>; 468 disable-wp; 469 bootph-all; 470}; 471 472&cpsw3g { 473 pinctrl-names = "default"; 474 pinctrl-0 = <&main_rgmii1_pins_default>, 475 <&main_rgmii2_pins_default>; 476 status = "okay"; 477}; 478 479&cpsw_port1 { 480 phy-mode = "rgmii-rxid"; 481 phy-handle = <&cpsw3g_phy0>; 482 status = "okay"; 483}; 484 485&cpsw_port2 { 486 phy-mode = "rgmii-rxid"; 487 phy-handle = <&cpsw3g_phy1>; 488 status = "okay"; 489}; 490 491&cpsw3g_mdio { 492 pinctrl-names = "default"; 493 pinctrl-0 = <&main_mdio1_pins_default>; 494 status = "okay"; 495 496 cpsw3g_phy0: ethernet-phy@0 { 497 reg = <0>; 498 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 499 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 500 ti,min-output-impedance; 501 }; 502 503 cpsw3g_phy1: ethernet-phy@1 { 504 reg = <1>; 505 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 506 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 507 ti,min-output-impedance; 508 }; 509}; 510 511&usbss0 { 512 status = "okay"; 513 ti,vbus-divider; 514}; 515 516&usbss1 { 517 status = "okay"; 518 ti,vbus-divider; 519}; 520 521&usb0 { 522 usb-role-switch; 523 524 port { 525 usb0_hs_ep: endpoint { 526 remote-endpoint = <&usb_con_hs>; 527 }; 528 }; 529}; 530 531&usb1 { 532 dr_mode = "host"; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&main_usb1_pins_default>; 535}; 536 537&mcasp1 { 538 status = "okay"; 539 #sound-dai-cells = <0>; 540 541 pinctrl-names = "default"; 542 pinctrl-0 = <&main_mcasp1_pins_default>; 543 544 op-mode = <0>; /* MCASP_IIS_MODE */ 545 tdm-slots = <2>; 546 547 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 548 1 0 2 0 549 0 0 0 0 550 0 0 0 0 551 0 0 0 0 552 >; 553}; 554 555&fss { 556 bootph-all; 557}; 558 559&ospi0 { 560 status = "okay"; 561 pinctrl-names = "default"; 562 pinctrl-0 = <&ospi0_pins_default>; 563 bootph-all; 564 565 flash@0 { 566 compatible = "jedec,spi-nor"; 567 reg = <0x0>; 568 spi-tx-bus-width = <8>; 569 spi-rx-bus-width = <8>; 570 spi-max-frequency = <25000000>; 571 cdns,tshsl-ns = <60>; 572 cdns,tsd2d-ns = <60>; 573 cdns,tchsh-ns = <60>; 574 cdns,tslch-ns = <60>; 575 cdns,read-delay = <4>; 576 bootph-all; 577 578 partitions { 579 compatible = "fixed-partitions"; 580 #address-cells = <1>; 581 #size-cells = <1>; 582 bootph-all; 583 584 partition@0 { 585 label = "ospi.tiboot3"; 586 reg = <0x00 0x80000>; 587 }; 588 589 partition@80000 { 590 label = "ospi.tispl"; 591 reg = <0x80000 0x200000>; 592 }; 593 594 partition@280000 { 595 label = "ospi.u-boot"; 596 reg = <0x280000 0x400000>; 597 }; 598 599 partition@680000 { 600 label = "ospi.env"; 601 reg = <0x680000 0x40000>; 602 }; 603 604 partition@6c0000 { 605 label = "ospi.env.backup"; 606 reg = <0x6c0000 0x40000>; 607 }; 608 609 partition@800000 { 610 label = "ospi.rootfs"; 611 reg = <0x800000 0x37c0000>; 612 }; 613 614 partition@3fc0000 { 615 label = "ospi.phypattern"; 616 reg = <0x3fc0000 0x40000>; 617 bootph-all; 618 }; 619 }; 620 }; 621}; 622 623&mailbox0_cluster0 { 624 mbox_r5_0: mbox-r5-0 { 625 ti,mbox-rx = <0 0 0>; 626 ti,mbox-tx = <1 0 0>; 627 }; 628}; 629 630&mailbox0_cluster1 { 631 mbox_mcu_r5_0: mbox-mcu-r5-0 { 632 ti,mbox-rx = <0 0 0>; 633 ti,mbox-tx = <1 0 0>; 634 }; 635}; 636 637&main_uart0 { 638 pinctrl-names = "default"; 639 pinctrl-0 = <&main_uart0_pins_default>; 640 status = "okay"; 641 bootph-all; 642}; 643 644&main_uart1 { 645 pinctrl-names = "default"; 646 pinctrl-0 = <&main_uart1_pins_default>; 647 /* Main UART1 is used by TIFS firmware */ 648 status = "reserved"; 649 bootph-all; 650}; 651 652&mcu_pmx0 { 653 bootph-all; 654 655 wkup_uart0_pins_default: wkup-uart0-default-pins { 656 pinctrl-single,pins = < 657 AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 658 AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 659 >; 660 bootph-all; 661 }; 662}; 663 664&wkup_uart0 { 665 /* WKUP UART0 is used by DM firmware */ 666 pinctrl-names = "default"; 667 pinctrl-0 = <&wkup_uart0_pins_default>; 668 status = "reserved"; 669 bootph-all; 670}; 671 672/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 673&mcu_gpio0 { 674 status = "reserved"; 675}; 676 677&mcu_gpio_intr { 678 status = "reserved"; 679}; 680