1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * AM62D2 EVM: https://www.ti.com/lit/zip/sprcal5 4 * 5 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include "k3-am62d2.dtsi" 14 15/ { 16 compatible = "ti,am62d2-evm", "ti,am62d2"; 17 model = "Texas Instruments AM62D2 EVM"; 18 19 aliases { 20 serial0 = &wkup_uart0; 21 serial1 = &mcu_uart0; 22 serial2 = &main_uart0; 23 mmc0 = &sdhci0; 24 mmc1 = &sdhci1; 25 rtc0 = &wkup_rtc0; 26 ethernet0 = &cpsw_port1; 27 ethernet1 = &cpsw_port2; 28 spi0 = &ospi0; 29 }; 30 31 chosen { 32 stdout-path = &main_uart0; 33 }; 34 35 memory@80000000 { 36 device_type = "memory"; 37 /* 4G RAM */ 38 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 39 <0x00000008 0x80000000 0x00000000 0x80000000>; 40 bootph-all; 41 }; 42 43 reserved_memory: reserved-memory { 44 #address-cells = <2>; 45 #size-cells = <2>; 46 ranges; 47 48 /* global cma region */ 49 linux,cma { 50 compatible = "shared-dma-pool"; 51 reusable; 52 size = <0x00 0x2000000>; 53 alloc-ranges = <0x00 0xc0000000 0x00 0x2000000>; 54 linux,cma-default; 55 }; 56 57 secure_tfa_ddr: tfa@80000000 { 58 reg = <0x00 0x80000000 0x00 0x80000>; 59 no-map; 60 }; 61 62 wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { 63 compatible = "shared-dma-pool"; 64 reg = <0x00 0x9c800000 0x00 0x100000>; 65 no-map; 66 }; 67 68 wkup_r5fss0_core0_memory_region: memory@9c900000 { 69 compatible = "shared-dma-pool"; 70 reg = <0x00 0x9c900000 0x00 0xf00000>; 71 no-map; 72 bootph-pre-ram; 73 }; 74 75 secure_ddr: optee@9e800000 { 76 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 77 no-map; 78 }; 79 80 rtos_ipc_memory_region: memory@a0000000 { 81 compatible = "shared-dma-pool"; 82 reg = <0x00 0xa0000000 0x00 0x01000000>; 83 no-map; 84 }; 85 }; 86 87 opp-table { 88 /* Requires VDD_CORE at 0v85 */ 89 opp-1400000000 { 90 opp-hz = /bits/ 64 <1400000000>; 91 opp-supported-hw = <0x01 0x0004>; 92 clock-latency-ns = <6000000>; 93 }; 94 }; 95 96 vout_pd: regulator-0 { 97 /* TPS65988 PD CONTROLLER OUTPUT */ 98 compatible = "regulator-fixed"; 99 regulator-name = "vout_pd"; 100 regulator-min-microvolt = <5000000>; 101 regulator-max-microvolt = <5000000>; 102 regulator-always-on; 103 regulator-boot-on; 104 bootph-all; 105 }; 106 107 vmain_pd: regulator-1 { 108 /* Output of TPS22811 */ 109 compatible = "regulator-fixed"; 110 regulator-name = "vmain_pd"; 111 regulator-min-microvolt = <5000000>; 112 regulator-max-microvolt = <5000000>; 113 vin-supply = <&vout_pd>; 114 regulator-always-on; 115 regulator-boot-on; 116 bootph-all; 117 }; 118 119 vcc_5v0: regulator-2 { 120 /* Output of TPS630702RNMR */ 121 compatible = "regulator-fixed"; 122 regulator-name = "vcc_5v0"; 123 regulator-min-microvolt = <5000000>; 124 regulator-max-microvolt = <5000000>; 125 vin-supply = <&vmain_pd>; 126 regulator-always-on; 127 regulator-boot-on; 128 bootph-all; 129 }; 130 131 vcc_3v3_main: regulator-3 { 132 /* output of LM5141-Q1 */ 133 compatible = "regulator-fixed"; 134 regulator-name = "vcc_3v3_main"; 135 regulator-min-microvolt = <3300000>; 136 regulator-max-microvolt = <3300000>; 137 vin-supply = <&vmain_pd>; 138 regulator-always-on; 139 regulator-boot-on; 140 bootph-all; 141 }; 142 143 vdd_mmc1: regulator-4 { 144 /* TPS22918DBVR */ 145 compatible = "regulator-fixed"; 146 regulator-name = "vdd_mmc1"; 147 regulator-min-microvolt = <3300000>; 148 regulator-max-microvolt = <3300000>; 149 regulator-boot-on; 150 enable-active-high; 151 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 152 bootph-all; 153 }; 154 155 vcc_3v3_sys: regulator-5 { 156 /* output of TPS222965DSGT */ 157 compatible = "regulator-fixed"; 158 regulator-name = "vcc_3v3_sys"; 159 regulator-min-microvolt = <3300000>; 160 regulator-max-microvolt = <3300000>; 161 vin-supply = <&vcc_3v3_main>; 162 regulator-always-on; 163 regulator-boot-on; 164 bootph-all; 165 }; 166 167 vddshv_sdio: regulator-6 { 168 compatible = "regulator-gpio"; 169 regulator-name = "vddshv_sdio"; 170 pinctrl-names = "default"; 171 pinctrl-0 = <&vddshv_sdio_pins_default>; 172 regulator-min-microvolt = <1800000>; 173 regulator-max-microvolt = <3300000>; 174 regulator-boot-on; 175 gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>; 176 states = <1800000 0x0>, 177 <3300000 0x1>; 178 bootph-all; 179 }; 180 181 leds { 182 compatible = "gpio-leds"; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&usr_led_pins_default>; 185 186 led-0 { 187 label = "am62d-evm:green:heartbeat"; 188 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 189 linux,default-trigger = "heartbeat"; 190 function = LED_FUNCTION_HEARTBEAT; 191 default-state = "off"; 192 }; 193 }; 194}; 195 196&mcu_pmx0 { 197 status = "okay"; 198 199 pmic_irq_pins_default: pmic-irq-default-pins { 200 pinctrl-single,pins = < 201 AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ 202 >; 203 }; 204 205 wkup_uart0_pins_default: wkup-uart0-default-pins { 206 pinctrl-single,pins = < 207 AM62DX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */ 208 AM62DX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */ 209 AM62DX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */ 210 AM62DX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */ 211 >; 212 bootph-all; 213 }; 214}; 215 216/* WKUP UART0 is used for DM firmware logs */ 217&wkup_uart0 { 218 pinctrl-names = "default"; 219 pinctrl-0 = <&wkup_uart0_pins_default>; 220 bootph-all; 221 status = "reserved"; 222}; 223 224&main_pmx0 { 225 main_uart0_pins_default: main-uart0-default-pins { 226 pinctrl-single,pins = < 227 AM62DX_IOPAD(0x01c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ 228 AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ 229 >; 230 bootph-all; 231 }; 232 233 main_i2c0_pins_default: main-i2c0-default-pins { 234 pinctrl-single,pins = < 235 AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ 236 AM62DX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */ 237 >; 238 bootph-all; 239 }; 240 241 main_i2c1_pins_default: main-i2c1-default-pins { 242 pinctrl-single,pins = < 243 AM62DX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C17) I2C1_SCL */ 244 AM62DX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (E17) I2C1_SDA */ 245 >; 246 bootph-all; 247 }; 248 249 main_i2c2_pins_default: main-i2c2-default-pins { 250 pinctrl-single,pins = < 251 AM62DX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (M22) GPMC0_CSn2.I2C2_SCL */ 252 AM62DX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (M20) GPMC0_CSn3.I2C2_SDA */ 253 >; 254 }; 255 256 main_mmc0_pins_default: main-mmc0-default-pins { 257 pinctrl-single,pins = < 258 AM62DX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */ 259 AM62DX_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB7) MMC0_CLK */ 260 AM62DX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */ 261 AM62DX_IOPAD(0x0210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */ 262 AM62DX_IOPAD(0x020c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */ 263 AM62DX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */ 264 AM62DX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */ 265 AM62DX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */ 266 AM62DX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */ 267 AM62DX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */ 268 >; 269 bootph-all; 270 }; 271 272 main_mmc1_pins_default: main-mmc1-default-pins { 273 pinctrl-single,pins = < 274 AM62DX_IOPAD(0x023c, PIN_INPUT, 0) /* (C21) MMC1_CMD */ 275 AM62DX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (E22) MMC1_CLK */ 276 AM62DX_IOPAD(0x0230, PIN_INPUT, 0) /* (B22) MMC1_DAT0 */ 277 AM62DX_IOPAD(0x022c, PIN_INPUT, 0) /* (D21) MMC1_DAT1 */ 278 AM62DX_IOPAD(0x0228, PIN_INPUT, 0) /* (C22) MMC1_DAT2 */ 279 AM62DX_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 280 AM62DX_IOPAD(0x0240, PIN_INPUT, 0) /* (E18) MMC1_SDCD */ 281 >; 282 bootph-all; 283 }; 284 285 main_mdio0_pins_default: main-mdio0-default-pins { 286 pinctrl-single,pins = < 287 AM62DX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ 288 AM62DX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ 289 >; 290 bootph-all; 291 }; 292 293 main_rgmii1_pins_default: main-rgmii1-default-pins { 294 pinctrl-single,pins = < 295 AM62DX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ 296 AM62DX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ 297 AM62DX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ 298 AM62DX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ 299 AM62DX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ 300 AM62DX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ 301 AM62DX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */ 302 AM62DX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */ 303 AM62DX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */ 304 AM62DX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */ 305 AM62DX_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */ 306 AM62DX_IOPAD(0x012c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */ 307 >; 308 bootph-all; 309 }; 310 311 main_rgmii2_pins_default: main-rgmii2-default-pins { 312 pinctrl-single,pins = < 313 AM62DX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */ 314 AM62DX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */ 315 AM62DX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */ 316 AM62DX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */ 317 AM62DX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */ 318 AM62DX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */ 319 AM62DX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */ 320 AM62DX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */ 321 AM62DX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */ 322 AM62DX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */ 323 AM62DX_IOPAD(0x0168, PIN_OUTPUT, 0) /* (AB19) RGMII2_TXC */ 324 AM62DX_IOPAD(0x0164, PIN_OUTPUT, 0) /* (Y19) RGMII2_TX_CTL */ 325 >; 326 bootph-all; 327 }; 328 329 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 330 pinctrl-single,pins = < 331 AM62DX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ 332 >; 333 }; 334 335 vddshv_sdio_pins_default: vddshv-sdio-default-pins { 336 pinctrl-single,pins = < 337 AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */ 338 >; 339 bootph-all; 340 }; 341 342 usr_led_pins_default: usr-led-default-pins { 343 pinctrl-single,pins = < 344 AM62DX_IOPAD(0x0244, PIN_INPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */ 345 >; 346 }; 347 348 main_usb1_pins_default: main-usb1-default-pins { 349 pinctrl-single,pins = < 350 AM62DX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (D19) USB1_DRVVBUS */ 351 >; 352 }; 353 354 ospi0_pins_default: ospi0-default-pins { 355 pinctrl-single,pins = < 356 AM62DX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */ 357 AM62DX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */ 358 AM62DX_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G19) OSPI0_CSn1 */ 359 AM62DX_IOPAD(0x0034, PIN_OUTPUT, 0) /* (K20) OSPI0_CSn2 */ 360 AM62DX_IOPAD(0x0038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */ 361 AM62DX_IOPAD(0x000c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */ 362 AM62DX_IOPAD(0x0010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */ 363 AM62DX_IOPAD(0x0014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */ 364 AM62DX_IOPAD(0x0018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */ 365 AM62DX_IOPAD(0x001c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */ 366 AM62DX_IOPAD(0x0020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */ 367 AM62DX_IOPAD(0x0024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */ 368 AM62DX_IOPAD(0x0028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 369 AM62DX_IOPAD(0x0008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */ 370 >; 371 bootph-all; 372 }; 373}; 374 375&mcu_gpio0 { 376 status = "okay"; 377}; 378 379&main_i2c0 { 380 pinctrl-names = "default"; 381 pinctrl-0 = <&main_i2c0_pins_default>; 382 clock-frequency = <400000>; 383 bootph-all; 384 status = "okay"; 385 386 typec_pd0: usb-power-controller@3f { 387 compatible = "ti,tps6598x"; 388 reg = <0x3f>; 389 390 connector { 391 compatible = "usb-c-connector"; 392 label = "USB-C"; 393 self-powered; 394 data-role = "dual"; 395 power-role = "sink"; 396 port { 397 usb_con_hs: endpoint { 398 remote-endpoint = <&usb0_hs_ep>; 399 }; 400 }; 401 }; 402 }; 403 404 exp1: gpio@22 { 405 compatible = "ti,tca6424"; 406 reg = <0x22>; 407 gpio-controller; 408 #gpio-cells = <2>; 409 interrupt-parent = <&main_gpio1>; 410 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 411 interrupt-controller; 412 #interrupt-cells = <2>; 413 pinctrl-names = "default"; 414 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 415 bootph-all; 416 417 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 418 "","MMC1_SD_EN", 419 "VPP_EN", "GPIO_DIX_RST", 420 "IO_EXP_OPT_EN", "DIX_INT", 421 "GPIO_eMMC_RSTn", "CPLD2_DONE", 422 "CPLD2_INTN", "CPLD1_DONE", 423 "CPLD1_INTN", "USB_TYPEA_OC_INDICATION", 424 "PCM1_INT", "PCM2_INT", 425 "GPIO_PCM1_RST", "TEST_GPIO2", 426 "GPIO_PCM2_RST", "", 427 "IO_MCAN0_STB", "IO_MCAN1_STB", 428 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 429 }; 430 431 exp2: gpio@20 { 432 compatible = "ti,tca6416"; 433 reg = <0x20>; 434 gpio-controller; 435 #gpio-cells = <2>; 436 437 gpio-line-names = "PCM6240_BUF_IO_EN", "", 438 "CPLD1_JTAGENB", "CPLD1_PROGRAMN", 439 "CPLD2_JTAGENB", "CPLD2_PROGRAMN", 440 "", "", 441 "", "CPLD1_TCK", 442 "CPLD1_TMS", "CPLD1_TDI", 443 "CPLD1_TDO", "CPLD2_TCK", 444 "CPLD2_TMS", "CPLD2_TDI", 445 "CPLD2_TDO", "ADDR1_IO_EXP", 446 "SoC_I2C0_SCL", "SoC_I2C0_SDA"; 447 }; 448}; 449 450&main_i2c1 { 451 pinctrl-names = "default"; 452 pinctrl-0 = <&main_i2c1_pins_default>; 453 clock-frequency = <100000>; 454 status = "okay"; 455}; 456 457&main_i2c2 { 458 pinctrl-names = "default"; 459 pinctrl-0 = <&main_i2c2_pins_default>; 460 clock-frequency = <400000>; 461 status = "okay"; 462}; 463 464&sdhci0 { 465 /* eMMC */ 466 non-removable; 467 pinctrl-names = "default"; 468 pinctrl-0 = <&main_mmc0_pins_default>; 469 bootph-all; 470 status = "okay"; 471}; 472 473&sdhci1 { 474 /* SD/MMC */ 475 vmmc-supply = <&vdd_mmc1>; 476 vqmmc-supply = <&vddshv_sdio>; 477 pinctrl-names = "default"; 478 pinctrl-0 = <&main_mmc1_pins_default>; 479 disable-wp; 480 bootph-all; 481 status = "okay"; 482}; 483 484&main_gpio0 { 485 bootph-all; 486 status = "okay"; 487}; 488 489&main_gpio1 { 490 bootph-all; 491 status = "okay"; 492}; 493 494&main_gpio_intr { 495 status = "okay"; 496}; 497 498&main_uart0 { 499 pinctrl-names = "default"; 500 pinctrl-0 = <&main_uart0_pins_default>; 501 bootph-all; 502 status = "okay"; 503}; 504 505&usbss0 { 506 status = "okay"; 507 ti,vbus-divider; 508}; 509 510&usb0 { 511 usb-role-switch; 512 513 port { 514 usb0_hs_ep: endpoint { 515 remote-endpoint = <&usb_con_hs>; 516 }; 517 }; 518}; 519 520&usbss1 { 521 status = "okay"; 522}; 523 524&usb1 { 525 dr_mode = "host"; 526 pinctrl-names = "default"; 527 pinctrl-0 = <&main_usb1_pins_default>; 528}; 529 530&cpsw3g { 531 pinctrl-names = "default"; 532 pinctrl-0 = <&main_rgmii1_pins_default>, 533 <&main_rgmii2_pins_default>; 534 status = "okay"; 535 536 cpts@3d000 { 537 /* MAP HW3_TS_PUSH to GENF1 */ 538 ti,pps = <2 1>; 539 }; 540}; 541 542&cpsw_port1 { 543 phy-mode = "rgmii-id"; 544 phy-handle = <&cpsw3g_phy0>; 545 status = "okay"; 546}; 547 548&cpsw_port2 { 549 phy-mode = "rgmii-id"; 550 phy-handle = <&cpsw3g_phy1>; 551 status = "okay"; 552}; 553 554&cpsw3g_mdio { 555 pinctrl-names = "default"; 556 pinctrl-0 = <&main_mdio0_pins_default>; 557 status = "okay"; 558 559 cpsw3g_phy0: ethernet-phy@0 { 560 reg = <0>; 561 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 562 ti,min-output-impedance; 563 }; 564 565 cpsw3g_phy1: ethernet-phy@3 { 566 reg = <3>; 567 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 568 ti,min-output-impedance; 569 }; 570}; 571 572&fss { 573 status = "okay"; 574}; 575 576&ospi0 { 577 pinctrl-names = "default"; 578 pinctrl-0 = <&ospi0_pins_default>; 579 status = "okay"; 580 581 flash@0{ 582 compatible = "jedec,spi-nor"; 583 reg = <0x0>; 584 spi-tx-bus-width = <8>; 585 spi-rx-bus-width = <8>; 586 spi-max-frequency = <25000000>; 587 cdns,tshsl-ns = <60>; 588 cdns,tsd2d-ns = <60>; 589 cdns,tchsh-ns = <60>; 590 cdns,tslch-ns = <60>; 591 cdns,read-delay = <4>; 592 593 partitions { 594 compatible = "fixed-partitions"; 595 #address-cells = <1>; 596 #size-cells = <1>; 597 598 partition@0 { 599 label = "ospi.tiboot3"; 600 reg = <0x0 0x80000>; 601 }; 602 603 partition@80000 { 604 label = "ospi.tispl"; 605 reg = <0x80000 0x200000>; 606 }; 607 608 partition@280000 { 609 label = "ospi.u-boot"; 610 reg = <0x280000 0x400000>; 611 }; 612 613 partition@680000 { 614 label = "ospi.env"; 615 reg = <0x680000 0x40000>; 616 }; 617 618 partition@6c0000 { 619 label = "ospi.env.backup"; 620 reg = <0x6c0000 0x40000>; 621 }; 622 623 partition@800000 { 624 label = "ospi.rootfs"; 625 reg = <0x800000 0x37c0000>; 626 }; 627 628 partition@3fc0000 { 629 label = "ospi.phypattern"; 630 reg = <0x3fc0000 0x40000>; 631 bootph-all; 632 }; 633 }; 634 }; 635}; 636 637&wkup_r5fss0_core0 { 638 bootph-pre-ram; 639}; 640 641&mcu_r5fss0_core0 { 642 firmware-name = "am62d-mcu-r5f0_0-fw"; 643}; 644 645&c7x_0 { 646 firmware-name = "am62d-c71_0-fw"; 647}; 648 649#include "k3-am62a-ti-ipc-firmware.dtsi" 650