1*5fc6b1b6SVignesh Raghavendra// SPDX-License-Identifier: GPL-2.0 2*5fc6b1b6SVignesh Raghavendra/* 3*5fc6b1b6SVignesh Raghavendra * Device Tree Source for AM625 SoC Family MCU Domain peripherals 4*5fc6b1b6SVignesh Raghavendra * 5*5fc6b1b6SVignesh Raghavendra * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 6*5fc6b1b6SVignesh Raghavendra */ 7*5fc6b1b6SVignesh Raghavendra 8*5fc6b1b6SVignesh Raghavendra&cbass_mcu { 9*5fc6b1b6SVignesh Raghavendra mcu_pmx0: pinctrl@4084000 { 10*5fc6b1b6SVignesh Raghavendra compatible = "pinctrl-single"; 11*5fc6b1b6SVignesh Raghavendra reg = <0x00 0x04084000 0x00 0x88>; 12*5fc6b1b6SVignesh Raghavendra #pinctrl-cells = <1>; 13*5fc6b1b6SVignesh Raghavendra pinctrl-single,register-width = <32>; 14*5fc6b1b6SVignesh Raghavendra pinctrl-single,function-mask = <0xffffffff>; 15*5fc6b1b6SVignesh Raghavendra status = "disabled"; 16*5fc6b1b6SVignesh Raghavendra }; 17*5fc6b1b6SVignesh Raghavendra 18*5fc6b1b6SVignesh Raghavendra mcu_uart0: serial@4a00000 { 19*5fc6b1b6SVignesh Raghavendra compatible = "ti,am64-uart", "ti,am654-uart"; 20*5fc6b1b6SVignesh Raghavendra reg = <0x00 0x04a00000 0x00 0x100>; 21*5fc6b1b6SVignesh Raghavendra interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 22*5fc6b1b6SVignesh Raghavendra power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 23*5fc6b1b6SVignesh Raghavendra clocks = <&k3_clks 149 0>; 24*5fc6b1b6SVignesh Raghavendra clock-names = "fclk"; 25*5fc6b1b6SVignesh Raghavendra status = "disabled"; 26*5fc6b1b6SVignesh Raghavendra }; 27*5fc6b1b6SVignesh Raghavendra 28*5fc6b1b6SVignesh Raghavendra mcu_i2c0: i2c@4900000 { 29*5fc6b1b6SVignesh Raghavendra compatible = "ti,am64-i2c", "ti,omap4-i2c"; 30*5fc6b1b6SVignesh Raghavendra reg = <0x00 0x04900000 0x00 0x100>; 31*5fc6b1b6SVignesh Raghavendra interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 32*5fc6b1b6SVignesh Raghavendra #address-cells = <1>; 33*5fc6b1b6SVignesh Raghavendra #size-cells = <0>; 34*5fc6b1b6SVignesh Raghavendra power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; 35*5fc6b1b6SVignesh Raghavendra clocks = <&k3_clks 106 2>; 36*5fc6b1b6SVignesh Raghavendra clock-names = "fck"; 37*5fc6b1b6SVignesh Raghavendra status = "disabled"; 38*5fc6b1b6SVignesh Raghavendra }; 39*5fc6b1b6SVignesh Raghavendra}; 40