xref: /linux/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi (revision cdd30ebb1b9f36159d66f088b61aee264e649d7a)
1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/*
3 * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
4 *
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <dt-bindings/bus/ti-sysc.h>
9
10&cbass_wakeup {
11	wkup_conf: bus@43000000 {
12		bootph-all;
13		compatible = "simple-bus";
14		reg = <0x00 0x43000000 0x00 0x20000>;
15		#address-cells = <1>;
16		#size-cells = <1>;
17		ranges = <0x0 0x00 0x43000000 0x20000>;
18
19		chipid: chipid@14 {
20			bootph-all;
21			compatible = "ti,am654-chipid";
22			reg = <0x14 0x4>;
23		};
24
25		opp_efuse_table: syscon@18 {
26			compatible = "ti,am62-opp-efuse-table", "syscon";
27			reg = <0x18 0x4>;
28		};
29
30		cpsw_mac_syscon: ethernet-mac-syscon@200 {
31			compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
32			reg = <0x200 0x8>;
33		};
34
35		usb0_phy_ctrl: syscon@4008 {
36			compatible = "ti,am62-usb-phy-ctrl", "syscon";
37			reg = <0x4008 0x4>;
38		};
39
40		usb1_phy_ctrl: syscon@4018 {
41			compatible = "ti,am62-usb-phy-ctrl", "syscon";
42			reg = <0x4018 0x4>;
43		};
44	};
45
46	target-module@2b300050 {
47		compatible = "ti,sysc-omap2", "ti,sysc";
48		reg = <0x00 0x2b300050 0x00 0x4>,
49		      <0x00 0x2b300054 0x00 0x4>,
50		      <0x00 0x2b300058 0x00 0x4>;
51		reg-names = "rev", "sysc", "syss";
52		ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
53				 SYSC_OMAP2_SOFTRESET |
54				 SYSC_OMAP2_AUTOIDLE)>;
55		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
56				<SYSC_IDLE_NO>,
57				<SYSC_IDLE_SMART>,
58				<SYSC_IDLE_SMART_WKUP>;
59		ti,syss-mask = <1>;
60		ti,no-reset-on-init;
61		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
62		clocks = <&k3_clks 114 0>;
63		clock-names = "fck";
64		#address-cells = <1>;
65		#size-cells = <1>;
66		ranges = <0x0 0x00 0x2b300000 0x100000>;
67
68		wkup_uart0: serial@0 {
69			compatible = "ti,am64-uart", "ti,am654-uart";
70			reg = <0x0 0x100>;
71			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
72			status = "disabled";
73		};
74	};
75
76	wkup_i2c0: i2c@2b200000 {
77		compatible = "ti,am64-i2c", "ti,omap4-i2c";
78		reg = <0x00 0x2b200000 0x00 0x100>;
79		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
80		#address-cells = <1>;
81		#size-cells = <0>;
82		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
83		clocks = <&k3_clks 107 4>;
84		clock-names = "fck";
85		status = "disabled";
86	};
87
88	wkup_rtc0: rtc@2b1f0000 {
89		compatible = "ti,am62-rtc";
90		reg = <0x00 0x2b1f0000 0x00 0x100>;
91		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
92		clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
93		clock-names = "vbus", "osc32k";
94		power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
95		wakeup-source;
96	};
97
98	wkup_rti0: watchdog@2b000000 {
99		compatible = "ti,j7-rti-wdt";
100		reg = <0x00 0x2b000000 0x00 0x100>;
101		clocks = <&k3_clks 132 0>;
102		power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
103		assigned-clocks = <&k3_clks 132 0>;
104		assigned-clock-parents = <&k3_clks 132 2>;
105		/* Used by DM firmware */
106		status = "reserved";
107	};
108
109	wkup_vtm0: temperature-sensor@b00000 {
110		compatible = "ti,j7200-vtm";
111		reg = <0x00 0xb00000 0x00 0x400>,
112		      <0x00 0xb01000 0x00 0x400>;
113		power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
114		#thermal-sensor-cells = <1>;
115	};
116};
117