xref: /linux/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts (revision 46e6acfe3501fa938af9c5bd730f0020235b08a2)
1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/*
3 * AM62x LP SK: https://www.ti.com/tool/SK-AM62-LP
4 *
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8/dts-v1/;
9
10#include "k3-am62x-sk-common.dtsi"
11
12/ {
13	compatible = "ti,am62-lp-sk", "ti,am625";
14	model = "Texas Instruments AM62x LP SK";
15
16	vmain_pd: regulator-0 {
17		/* TPS65988 PD CONTROLLER OUTPUT */
18		compatible = "regulator-fixed";
19		regulator-name = "vmain_pd";
20		regulator-min-microvolt = <5000000>;
21		regulator-max-microvolt = <5000000>;
22		regulator-always-on;
23		regulator-boot-on;
24	};
25
26	vcc_5v0: regulator-1 {
27		/* Output of TPS630702RNMR */
28		compatible = "regulator-fixed";
29		regulator-name = "vcc_5v0";
30		regulator-min-microvolt = <5000000>;
31		regulator-max-microvolt = <5000000>;
32		vin-supply = <&vmain_pd>;
33		regulator-always-on;
34		regulator-boot-on;
35	};
36
37	vcc_3v3_sys: regulator-2 {
38		/* output of LM61460-Q1 */
39		compatible = "regulator-fixed";
40		regulator-name = "vcc_3v3_sys";
41		regulator-min-microvolt = <3300000>;
42		regulator-max-microvolt = <3300000>;
43		vin-supply = <&vmain_pd>;
44		regulator-always-on;
45		regulator-boot-on;
46	};
47
48	vdd_mmc1: regulator-3 {
49		/* TPS22918DBVR */
50		compatible = "regulator-fixed";
51		regulator-name = "vdd_mmc1";
52		regulator-min-microvolt = <3300000>;
53		regulator-max-microvolt = <3300000>;
54		regulator-boot-on;
55		enable-active-high;
56		vin-supply = <&vcc_3v3_sys>;
57		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
58	};
59
60	vddshv_sdio: regulator-4 {
61		compatible = "regulator-gpio";
62		regulator-name = "vddshv_sdio";
63		pinctrl-names = "default";
64		pinctrl-0 = <&vddshv_sdio_pins_default>;
65		regulator-min-microvolt = <1800000>;
66		regulator-max-microvolt = <3300000>;
67		regulator-boot-on;
68		vin-supply = <&ldo1_reg>;
69		gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
70		states = <1800000 0x0>,
71			 <3300000 0x1>;
72	};
73};
74
75&main_pmx0 {
76	vddshv_sdio_pins_default: vddshv-sdio-default-pins {
77		pinctrl-single,pins = <
78			AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
79		>;
80	};
81
82	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
83		pinctrl-single,pins = <
84			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (C13) UART0_RTSn.GPIO1_23 */
85		>;
86	};
87
88	pmic_irq_pins_default: pmic-irq-default-pins {
89		pinctrl-single,pins = <
90			AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (B16) EXTINTn */
91		>;
92	};
93};
94
95&main_i2c1 {
96	exp1: gpio@22 {
97		compatible = "ti,tca6424";
98		reg = <0x22>;
99		gpio-controller;
100		#gpio-cells = <2>;
101		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
102				   "PRU_DETECT", "MMC1_SD_EN",
103				   "VPP_LDO_EN", "EXP_PS_3V3_En",
104				   "EXP_PS_5V0_En", "EXP_HAT_DETECT",
105				   "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
106				   "UART1_FET_BUF_EN", "BT_UART_WAKE_SOC",
107				   "GPIO_HDMI_RSTn", "CSI_GPIO0",
108				   "CSI_GPIO1", "GPIO_OLDI_INT",
109				   "HDMI_INTn", "TEST_GPIO2",
110				   "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
111				   "MCASP1_FET_SEL", "UART1_FET_SEL",
112				   "", "IO_EXP_TEST_LED";
113
114		interrupt-parent = <&main_gpio1>;
115		interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
116		interrupt-controller;
117		#interrupt-cells = <2>;
118
119		pinctrl-names = "default";
120		pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
121	};
122
123	exp2: gpio@23 {
124		compatible = "ti,tca6424";
125		reg = <0x23>;
126		gpio-controller;
127		#gpio-cells = <2>;
128		gpio-line-names = "", "",
129				   "", "",
130				   "", "",
131				   "", "",
132				   "WL_LT_EN", "CSI_RSTz",
133				   "", "",
134				   "", "",
135				   "", "",
136				   "SPI0_FET_SEL", "SPI0_FET_OE",
137				   "GPIO_OLDI_RSTn", "PRU_3V3_EN",
138				   "", "",
139				   "CSI_VLDO_SEL", "SOC_WLAN_SDIO_RST";
140	};
141};
142
143&sdhci1 {
144	vmmc-supply = <&vdd_mmc1>;
145	vqmmc-supply = <&vddshv_sdio>;
146};
147
148&cpsw_port2 {
149	status = "disabled";
150};
151
152&main_i2c0 {
153	tps65219: pmic@30 {
154		compatible = "ti,tps65219";
155		reg = <0x30>;
156		buck1-supply = <&vcc_3v3_sys>;
157		buck2-supply = <&vcc_3v3_sys>;
158		buck3-supply = <&vcc_3v3_sys>;
159		ldo1-supply = <&vcc_3v3_sys>;
160		ldo2-supply = <&buck2_reg>;
161		ldo3-supply = <&vcc_3v3_sys>;
162		ldo4-supply = <&vcc_3v3_sys>;
163
164		pinctrl-names = "default";
165		pinctrl-0 = <&pmic_irq_pins_default>;
166
167		interrupt-parent = <&gic500>;
168		interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
169
170		regulators {
171			buck1_reg: buck1 {
172				regulator-name = "VDD_CORE";
173				regulator-min-microvolt = <750000>;
174				regulator-max-microvolt = <750000>;
175				regulator-boot-on;
176				regulator-always-on;
177			};
178
179			buck2_reg: buck2 {
180				regulator-name = "VCC1V8_SYS";
181				regulator-min-microvolt = <1800000>;
182				regulator-max-microvolt = <1800000>;
183				regulator-boot-on;
184				regulator-always-on;
185			};
186
187			buck3_reg: buck3 {
188				regulator-name = "VDD_LPDDR4";
189				regulator-min-microvolt = <1100000>;
190				regulator-max-microvolt = <1100000>;
191				regulator-boot-on;
192				regulator-always-on;
193			};
194
195			ldo1_reg: ldo1 {
196				regulator-name = "VDDSHV_SDIO";
197				regulator-min-microvolt = <3300000>;
198				regulator-max-microvolt = <3300000>;
199			};
200
201			ldo2_reg: ldo2 {
202				regulator-name = "VDDAR_CORE";
203				regulator-min-microvolt = <850000>;
204				regulator-max-microvolt = <850000>;
205				regulator-boot-on;
206				regulator-always-on;
207			};
208
209			ldo3_reg: ldo3 {
210				regulator-name = "VDDA_1V8";
211				regulator-min-microvolt = <1800000>;
212				regulator-max-microvolt = <1800000>;
213				regulator-boot-on;
214				regulator-always-on;
215			};
216
217			ldo4_reg: ldo4 {
218				regulator-name = "VDD_1V2";
219				regulator-min-microvolt = <1200000>;
220				regulator-max-microvolt = <1200000>;
221				regulator-boot-on;
222				regulator-always-on;
223			};
224		};
225	};
226};
227
228&tlv320aic3106 {
229	DVDD-supply = <&buck2_reg>;
230};
231
232&gpmc0 {
233	ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */
234};
235