1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/regulator/st,stm32mp25-regulator.h> 11#include "stm32mp257.dtsi" 12#include "stm32mp25xf.dtsi" 13#include "stm32mp25-pinctrl.dtsi" 14#include "stm32mp25xxai-pinctrl.dtsi" 15 16/ { 17 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board"; 18 compatible = "st,stm32mp257f-ev1", "st,stm32mp257"; 19 20 aliases { 21 ethernet0 = ðernet2; 22 ethernet1 = ðernet1; 23 serial0 = &usart2; 24 serial1 = &usart6; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 clocks { 32 clk_ext_camera: clk-ext-camera { 33 #clock-cells = <0>; 34 compatible = "fixed-clock"; 35 clock-frequency = <24000000>; 36 }; 37 38 pad_clk: pad-clk { 39 #clock-cells = <0>; 40 compatible = "fixed-clock"; 41 clock-frequency = <100000000>; 42 }; 43 }; 44 45 imx335_2v9: regulator-2v9 { 46 compatible = "regulator-fixed"; 47 regulator-name = "imx335-avdd"; 48 regulator-min-microvolt = <2900000>; 49 regulator-max-microvolt = <2900000>; 50 regulator-always-on; 51 }; 52 53 imx335_1v8: regulator-1v8 { 54 compatible = "regulator-fixed"; 55 regulator-name = "imx335-ovdd"; 56 regulator-min-microvolt = <1800000>; 57 regulator-max-microvolt = <1800000>; 58 regulator-always-on; 59 }; 60 61 imx335_1v2: regulator-1v2 { 62 compatible = "regulator-fixed"; 63 regulator-name = "imx335-dvdd"; 64 regulator-min-microvolt = <1200000>; 65 regulator-max-microvolt = <1200000>; 66 regulator-always-on; 67 }; 68 69 memory@80000000 { 70 device_type = "memory"; 71 reg = <0x0 0x80000000 0x1 0x0>; 72 }; 73 74 panel_lvds: display { 75 compatible = "edt,etml0700z9ndha", "panel-lvds"; 76 enable-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>; 77 backlight = <&panel_lvds_backlight>; 78 power-supply = <&scmi_v3v3>; 79 width-mm = <156>; 80 height-mm = <92>; 81 data-mapping = "vesa-24"; 82 status = "okay"; 83 84 panel-timing { 85 clock-frequency = <54000000>; 86 hactive = <1024>; 87 vactive = <600>; 88 hfront-porch = <150>; 89 hback-porch = <150>; 90 hsync-len = <21>; 91 vfront-porch = <24>; 92 vback-porch = <24>; 93 vsync-len = <21>; 94 }; 95 96 port { 97 lvds_panel_in: endpoint { 98 remote-endpoint = <&lvds_out0>; 99 }; 100 }; 101 }; 102 103 panel_lvds_backlight: backlight { 104 compatible = "gpio-backlight"; 105 gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>; 106 default-on; 107 status = "okay"; 108 }; 109 110 reserved-memory { 111 #address-cells = <2>; 112 #size-cells = <2>; 113 ranges; 114 115 fw@80000000 { 116 compatible = "shared-dma-pool"; 117 reg = <0x0 0x80000000 0x0 0x4000000>; 118 no-map; 119 }; 120 121 mm_ospi1: mm-ospi@60000000 { 122 reg = <0x0 0x60000000 0x0 0x10000000>; 123 no-map; 124 }; 125 }; 126}; 127 128&arm_wdt { 129 timeout-sec = <32>; 130 status = "okay"; 131}; 132 133&combophy { 134 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>; 135 clock-names = "apb", "ker", "pad"; 136 status = "okay"; 137}; 138 139&csi { 140 vdd-supply = <&scmi_vddcore>; 141 vdda18-supply = <&scmi_v1v8>; 142 status = "okay"; 143 ports { 144 #address-cells = <1>; 145 #size-cells = <0>; 146 port@0 { 147 reg = <0>; 148 csi_sink: endpoint { 149 remote-endpoint = <&imx335_ep>; 150 data-lanes = <1 2>; 151 bus-type = <4>; 152 }; 153 }; 154 port@1 { 155 reg = <1>; 156 csi_source: endpoint { 157 remote-endpoint = <&dcmipp_0>; 158 }; 159 }; 160 }; 161}; 162 163&dcmipp { 164 status = "okay"; 165 port { 166 dcmipp_0: endpoint { 167 remote-endpoint = <&csi_source>; 168 bus-type = <4>; 169 }; 170 }; 171}; 172 173ðernet1 { 174 pinctrl-0 = <ð1_rgmii_pins_a ð1_mdio_pins_a>; 175 pinctrl-1 = <ð1_rgmii_sleep_pins_a ð1_mdio_sleep_pins_a>; 176 pinctrl-names = "default", "sleep"; 177 phy-handle = <&phy1_eth1>; 178 phy-mode = "rgmii-id"; 179 st,ext-phyclk; 180 status = "okay"; 181 182 mdio { 183 #address-cells = <1>; 184 #size-cells = <0>; 185 compatible = "snps,dwmac-mdio"; 186 phy1_eth1: ethernet-phy@4 { 187 compatible = "ethernet-phy-id001c.c916"; 188 reg = <4>; 189 reset-gpios = <&gpioj 9 GPIO_ACTIVE_LOW>; 190 reset-assert-us = <10000>; 191 reset-deassert-us = <80000>; 192 }; 193 }; 194}; 195 196ðernet2 { 197 pinctrl-names = "default", "sleep"; 198 pinctrl-0 = <ð2_rgmii_pins_a>; 199 pinctrl-1 = <ð2_rgmii_sleep_pins_a>; 200 max-speed = <1000>; 201 phy-handle = <&phy0_eth2>; 202 phy-mode = "rgmii-id"; 203 status = "okay"; 204 205 mdio { 206 #address-cells = <1>; 207 #size-cells = <0>; 208 compatible = "snps,dwmac-mdio"; 209 phy0_eth2: ethernet-phy@1 { 210 compatible = "ethernet-phy-id001c.c916"; 211 reg = <1>; 212 reset-assert-us = <10000>; 213 reset-deassert-us = <300>; 214 reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; 215 }; 216 }; 217}; 218 219&i2c2 { 220 pinctrl-names = "default", "sleep"; 221 pinctrl-0 = <&i2c2_pins_a>; 222 pinctrl-1 = <&i2c2_sleep_pins_a>; 223 i2c-scl-rising-time-ns = <100>; 224 i2c-scl-falling-time-ns = <13>; 225 clock-frequency = <400000>; 226 status = "okay"; 227 228 imx335: camera@1a { 229 compatible = "sony,imx335"; 230 reg = <0x1a>; 231 clocks = <&clk_ext_camera>; 232 avdd-supply = <&imx335_2v9>; 233 ovdd-supply = <&imx335_1v8>; 234 dvdd-supply = <&imx335_1v2>; 235 reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; 236 237 port { 238 imx335_ep: endpoint { 239 remote-endpoint = <&csi_sink>; 240 clock-lanes = <0>; 241 data-lanes = <1 2>; 242 link-frequencies = /bits/ 64 <594000000>; 243 }; 244 }; 245 }; 246 247 ili2511: ili2511@41 { 248 compatible = "ilitek,ili251x"; 249 reg = <0x41>; 250 interrupt-parent = <&gpioi>; 251 interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 252 reset-gpios = <&gpiog 14 GPIO_ACTIVE_LOW>; 253 status = "okay"; 254 }; 255}; 256 257&i2c8 { 258 pinctrl-names = "default", "sleep"; 259 pinctrl-0 = <&i2c8_pins_a>; 260 pinctrl-1 = <&i2c8_sleep_pins_a>; 261 i2c-scl-rising-time-ns = <57>; 262 i2c-scl-falling-time-ns = <7>; 263 clock-frequency = <400000>; 264 status = "disabled"; 265}; 266 267&ommanager { 268 memory-region = <&mm_ospi1>; 269 pinctrl-0 = <&ospi_port1_clk_pins_a 270 &ospi_port1_io03_pins_a 271 &ospi_port1_cs0_pins_a>; 272 pinctrl-1 = <&ospi_port1_clk_sleep_pins_a 273 &ospi_port1_io03_sleep_pins_a 274 &ospi_port1_cs0_sleep_pins_a>; 275 pinctrl-names = "default", "sleep"; 276 status = "okay"; 277 278 spi@0 { 279 #address-cells = <1>; 280 #size-cells = <0>; 281 memory-region = <&mm_ospi1>; 282 status = "okay"; 283 284 flash0: flash@0 { 285 compatible = "jedec,spi-nor"; 286 reg = <0>; 287 spi-rx-bus-width = <4>; 288 spi-tx-bus-width = <4>; 289 spi-max-frequency = <50000000>; 290 }; 291 }; 292}; 293 294/* use LPTIMER with tick broadcast for suspend mode */ 295&lptimer3 { 296 status = "okay"; 297 timer { 298 status = "okay"; 299 }; 300}; 301 302<dc { 303 status = "okay"; 304 port { 305 ltdc_ep0_out: endpoint { 306 remote-endpoint = <&lvds_in>; 307 }; 308 }; 309}; 310 311&lvds { 312 status = "okay"; 313 ports { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 317 port@0 { 318 reg = <0>; 319 lvds_in: endpoint { 320 remote-endpoint = <<dc_ep0_out>; 321 }; 322 }; 323 324 port@1 { 325 reg = <1>; 326 lvds_out0: endpoint { 327 remote-endpoint = <&lvds_panel_in>; 328 }; 329 }; 330 }; 331}; 332 333&pcie_ep { 334 pinctrl-names = "default", "init"; 335 pinctrl-0 = <&pcie_pins_a>; 336 pinctrl-1 = <&pcie_init_pins_a>; 337 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; 338 status = "disabled"; 339}; 340 341&pcie_rc { 342 pinctrl-names = "default", "init", "sleep"; 343 pinctrl-0 = <&pcie_pins_a>; 344 pinctrl-1 = <&pcie_init_pins_a>; 345 pinctrl-2 = <&pcie_sleep_pins_a>; 346 status = "okay"; 347 348 pcie@0,0 { 349 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; 350 wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 351 }; 352}; 353 354&rtc { 355 status = "okay"; 356}; 357 358&scmi_regu { 359 scmi_vddio1: regulator@0 { 360 regulator-min-microvolt = <1800000>; 361 regulator-max-microvolt = <3300000>; 362 }; 363 scmi_vddcore: regulator@11 { 364 reg = <VOLTD_SCMI_STPMIC2_BUCK2>; 365 regulator-name = "vddcore"; 366 }; 367 scmi_v1v8: regulator@14 { 368 reg = <VOLTD_SCMI_STPMIC2_BUCK5>; 369 regulator-name = "v1v8"; 370 }; 371 scmi_v3v3: regulator@16 { 372 reg = <VOLTD_SCMI_STPMIC2_BUCK7>; 373 regulator-name = "v3v3"; 374 }; 375 scmi_vdd_emmc: regulator@18 { 376 reg = <VOLTD_SCMI_STPMIC2_LDO2>; 377 regulator-name = "vdd_emmc"; 378 }; 379 scmi_vdd3v3_usb: regulator@20 { 380 reg = <VOLTD_SCMI_STPMIC2_LDO4>; 381 regulator-name = "vdd3v3_usb"; 382 }; 383 scmi_vdd_sdcard: regulator@23 { 384 reg = <VOLTD_SCMI_STPMIC2_LDO7>; 385 regulator-name = "vdd_sdcard"; 386 }; 387}; 388 389&sdmmc1 { 390 pinctrl-names = "default", "opendrain", "sleep"; 391 pinctrl-0 = <&sdmmc1_b4_pins_a>; 392 pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 393 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 394 cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 395 disable-wp; 396 st,neg-edge; 397 bus-width = <4>; 398 vmmc-supply = <&scmi_vdd_sdcard>; 399 vqmmc-supply = <&scmi_vddio1>; 400 status = "okay"; 401}; 402 403&spi3 { 404 pinctrl-names = "default", "sleep"; 405 pinctrl-0 = <&spi3_pins_a>; 406 pinctrl-1 = <&spi3_sleep_pins_a>; 407 status = "disabled"; 408}; 409 410&spi8 { 411 pinctrl-names = "default", "sleep"; 412 pinctrl-0 = <&spi8_pins_a>; 413 pinctrl-1 = <&spi8_sleep_pins_a>; 414 status = "disabled"; 415}; 416 417&timers3 { 418 status = "disabled"; 419 counter { 420 status = "okay"; 421 }; 422 pwm { 423 pinctrl-0 = <&pwm3_pins_a>; 424 pinctrl-1 = <&pwm3_sleep_pins_a>; 425 pinctrl-names = "default", "sleep"; 426 status = "okay"; 427 }; 428 timer@2 { 429 status = "okay"; 430 }; 431}; 432 433&timers8 { 434 status = "disabled"; 435 counter { 436 status = "okay"; 437 }; 438 pwm { 439 pinctrl-0 = <&pwm8_pins_a>; 440 pinctrl-1 = <&pwm8_sleep_pins_a>; 441 pinctrl-names = "default", "sleep"; 442 status = "okay"; 443 }; 444 timer@7 { 445 status = "okay"; 446 }; 447}; 448 449&timers10 { 450 status = "disabled"; 451 counter { 452 pinctrl-0 = <&tim10_counter_pins_a>; 453 pinctrl-1 = <&tim10_counter_sleep_pins_a>; 454 pinctrl-names = "default", "sleep"; 455 status = "okay"; 456 }; 457}; 458 459&timers12 { 460 status = "disabled"; 461 counter { 462 status = "okay"; 463 }; 464 pwm { 465 pinctrl-0 = <&pwm12_pins_a>; 466 pinctrl-1 = <&pwm12_sleep_pins_a>; 467 pinctrl-names = "default", "sleep"; 468 status = "okay"; 469 }; 470 timer@11 { 471 status = "okay"; 472 }; 473}; 474 475&usart2 { 476 pinctrl-names = "default", "idle", "sleep"; 477 pinctrl-0 = <&usart2_pins_a>; 478 pinctrl-1 = <&usart2_idle_pins_a>; 479 pinctrl-2 = <&usart2_sleep_pins_a>; 480 /delete-property/dmas; 481 /delete-property/dma-names; 482 status = "okay"; 483}; 484 485&usart6 { 486 pinctrl-names = "default", "idle", "sleep"; 487 pinctrl-0 = <&usart6_pins_a>; 488 pinctrl-1 = <&usart6_idle_pins_a>; 489 pinctrl-2 = <&usart6_sleep_pins_a>; 490 uart-has-rtscts; 491 status = "disabled"; 492}; 493