1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/regulator/st,stm32mp25-regulator.h> 11#include "stm32mp257.dtsi" 12#include "stm32mp25xf.dtsi" 13#include "stm32mp25-pinctrl.dtsi" 14#include "stm32mp25xxai-pinctrl.dtsi" 15 16/ { 17 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board"; 18 compatible = "st,stm32mp257f-ev1", "st,stm32mp257"; 19 20 aliases { 21 ethernet0 = ðernet2; 22 serial0 = &usart2; 23 serial1 = &usart6; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 memory@80000000 { 31 device_type = "memory"; 32 reg = <0x0 0x80000000 0x1 0x0>; 33 }; 34 35 reserved-memory { 36 #address-cells = <2>; 37 #size-cells = <2>; 38 ranges; 39 40 fw@80000000 { 41 compatible = "shared-dma-pool"; 42 reg = <0x0 0x80000000 0x0 0x4000000>; 43 no-map; 44 }; 45 }; 46}; 47 48&arm_wdt { 49 timeout-sec = <32>; 50 status = "okay"; 51}; 52 53ðernet2 { 54 pinctrl-names = "default", "sleep"; 55 pinctrl-0 = <ð2_rgmii_pins_a>; 56 pinctrl-1 = <ð2_rgmii_sleep_pins_a>; 57 max-speed = <1000>; 58 phy-handle = <&phy0_eth2>; 59 phy-mode = "rgmii-id"; 60 status = "okay"; 61 62 mdio { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 compatible = "snps,dwmac-mdio"; 66 phy0_eth2: ethernet-phy@1 { 67 compatible = "ethernet-phy-id001c.c916"; 68 reg = <1>; 69 reset-assert-us = <10000>; 70 reset-deassert-us = <300>; 71 reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; 72 }; 73 }; 74}; 75 76&i2c2 { 77 pinctrl-names = "default", "sleep"; 78 pinctrl-0 = <&i2c2_pins_a>; 79 pinctrl-1 = <&i2c2_sleep_pins_a>; 80 i2c-scl-rising-time-ns = <100>; 81 i2c-scl-falling-time-ns = <13>; 82 clock-frequency = <400000>; 83 status = "okay"; 84}; 85 86&i2c8 { 87 pinctrl-names = "default", "sleep"; 88 pinctrl-0 = <&i2c8_pins_a>; 89 pinctrl-1 = <&i2c8_sleep_pins_a>; 90 i2c-scl-rising-time-ns = <57>; 91 i2c-scl-falling-time-ns = <7>; 92 clock-frequency = <400000>; 93 status = "disabled"; 94}; 95 96&scmi_regu { 97 scmi_vddio1: regulator@0 { 98 regulator-min-microvolt = <1800000>; 99 regulator-max-microvolt = <3300000>; 100 }; 101 scmi_vddcore: regulator@11 { 102 reg = <VOLTD_SCMI_STPMIC2_BUCK2>; 103 regulator-name = "vddcore"; 104 }; 105 scmi_v1v8: regulator@14 { 106 reg = <VOLTD_SCMI_STPMIC2_BUCK5>; 107 regulator-name = "v1v8"; 108 }; 109 scmi_v3v3: regulator@16 { 110 reg = <VOLTD_SCMI_STPMIC2_BUCK7>; 111 regulator-name = "v3v3"; 112 }; 113 scmi_vdd_emmc: regulator@18 { 114 reg = <VOLTD_SCMI_STPMIC2_LDO2>; 115 regulator-name = "vdd_emmc"; 116 }; 117 scmi_vdd3v3_usb: regulator@20 { 118 reg = <VOLTD_SCMI_STPMIC2_LDO4>; 119 regulator-name = "vdd3v3_usb"; 120 }; 121 scmi_vdd_sdcard: regulator@23 { 122 reg = <VOLTD_SCMI_STPMIC2_LDO7>; 123 regulator-name = "vdd_sdcard"; 124 }; 125}; 126 127&sdmmc1 { 128 pinctrl-names = "default", "opendrain", "sleep"; 129 pinctrl-0 = <&sdmmc1_b4_pins_a>; 130 pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 131 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 132 cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 133 disable-wp; 134 st,neg-edge; 135 bus-width = <4>; 136 vmmc-supply = <&scmi_vdd_sdcard>; 137 vqmmc-supply = <&scmi_vddio1>; 138 status = "okay"; 139}; 140 141&spi3 { 142 pinctrl-names = "default", "sleep"; 143 pinctrl-0 = <&spi3_pins_a>; 144 pinctrl-1 = <&spi3_sleep_pins_a>; 145 status = "disabled"; 146}; 147 148&spi8 { 149 pinctrl-names = "default", "sleep"; 150 pinctrl-0 = <&spi8_pins_a>; 151 pinctrl-1 = <&spi8_sleep_pins_a>; 152 status = "disabled"; 153}; 154 155&usart2 { 156 pinctrl-names = "default", "idle", "sleep"; 157 pinctrl-0 = <&usart2_pins_a>; 158 pinctrl-1 = <&usart2_idle_pins_a>; 159 pinctrl-2 = <&usart2_sleep_pins_a>; 160 status = "okay"; 161}; 162 163&usart6 { 164 pinctrl-names = "default", "idle", "sleep"; 165 pinctrl-0 = <&usart6_pins_a>; 166 pinctrl-1 = <&usart6_idle_pins_a>; 167 pinctrl-2 = <&usart6_sleep_pins_a>; 168 uart-has-rtscts; 169 status = "disabled"; 170}; 171