xref: /linux/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi (revision 8e1bb4a41aa78d6105e59186af3dcd545fc66e70) 
1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9	eth2_rgmii_pins_a: eth2-rgmii-0 {
10		pins1 {
11			pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
12				 <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */
13				 <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
14				 <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */
15				 <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */
16			bias-disable;
17			drive-push-pull;
18			slew-rate = <3>;
19		};
20		pins2 {
21			pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
22				 <STM32_PINMUX('F', 7, AF10)>, /* ETH_RGMII_GTX_CLK */
23				 <STM32_PINMUX('C', 6, AF10)>; /* ETH_MDC */
24			bias-disable;
25			drive-push-pull;
26			slew-rate = <3>;
27		};
28		pins3 {
29			pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
30			bias-disable;
31			drive-push-pull;
32			slew-rate = <0>;
33		};
34		pins4 {
35			pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
36				 <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */
37				 <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
38				 <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
39				 <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
40			bias-disable;
41		};
42		pins5 {
43			pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
44			bias-disable;
45		};
46	};
47
48	eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
49		pins {
50			pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
51				 <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */
52				 <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
53				 <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */
54				 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */
55				 <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */
56				 <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */
57				 <STM32_PINMUX('C', 6, ANALOG)>, /* ETH_MDC */
58				 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_MDIO */
59				 <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
60				 <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */
61				 <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
62				 <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */
63				 <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */
64				 <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */
65		};
66	};
67
68	i2c2_pins_a: i2c2-0 {
69		pins {
70			pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */
71				 <STM32_PINMUX('B', 4, AF9)>; /* I2C2_SDA */
72			bias-disable;
73			drive-open-drain;
74			slew-rate = <0>;
75		};
76	};
77
78	i2c2_sleep_pins_a: i2c2-sleep-0 {
79		pins {
80			pinmux = <STM32_PINMUX('B', 5, ANALOG)>, /* I2C2_SCL */
81				 <STM32_PINMUX('B', 4, ANALOG)>; /* I2C2_SDA */
82		};
83	};
84
85	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
86		pins1 {
87			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
88				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
89				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
90				 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
91				 <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
92			slew-rate = <2>;
93			drive-push-pull;
94			bias-disable;
95		};
96		pins2 {
97			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
98			slew-rate = <3>;
99			drive-push-pull;
100			bias-disable;
101		};
102	};
103
104	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
105		pins1 {
106			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
107				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
108				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
109				 <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */
110			slew-rate = <2>;
111			drive-push-pull;
112			bias-disable;
113		};
114		pins2 {
115			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
116			slew-rate = <3>;
117			drive-push-pull;
118			bias-disable;
119		};
120		pins3 {
121			pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
122			slew-rate = <2>;
123			drive-open-drain;
124			bias-disable;
125		};
126	};
127
128	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
129		pins {
130			pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */
131				 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC1_D1 */
132				 <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */
133				 <STM32_PINMUX('E', 1, ANALOG)>, /* SDMMC1_D3 */
134				 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC1_CK */
135				 <STM32_PINMUX('E', 2, ANALOG)>; /* SDMMC1_CMD */
136		};
137	};
138
139	spi3_pins_a: spi3-0 {
140		pins1 {
141			pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */
142				 <STM32_PINMUX('B', 8, AF1)>; /* SPI3_MOSI */
143			drive-push-pull;
144			bias-disable;
145			slew-rate = <1>;
146		};
147		pins2 {
148			pinmux = <STM32_PINMUX('B', 10, AF1)>; /* SPI3_MISO */
149			bias-disable;
150		};
151	};
152
153	spi3_sleep_pins_a: spi3-sleep-0 {
154		pins1 {
155			pinmux = <STM32_PINMUX('B', 7, ANALOG)>, /* SPI3_SCK */
156				 <STM32_PINMUX('B', 8, ANALOG)>, /* SPI3_MOSI */
157				 <STM32_PINMUX('B', 10, ANALOG)>; /* SPI3_MISO */
158		};
159	};
160
161	usart2_pins_a: usart2-0 {
162		pins1 {
163			pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
164			bias-disable;
165			drive-push-pull;
166			slew-rate = <0>;
167		};
168		pins2 {
169			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
170			bias-disable;
171		};
172	};
173
174	usart2_idle_pins_a: usart2-idle-0 {
175		pins1 {
176			pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
177		};
178		pins2 {
179			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
180			bias-disable;
181		};
182	};
183
184	usart2_sleep_pins_a: usart2-sleep-0 {
185		pins {
186			pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
187				 <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
188		};
189	};
190
191	usart6_pins_a: usart6-0 {
192		pins1 {
193			pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */
194				 <STM32_PINMUX('G', 5, AF3)>;  /* USART6_RTS */
195			bias-disable;
196			drive-push-pull;
197			slew-rate = <0>;
198		};
199		pins2 {
200			pinmux = <STM32_PINMUX('F', 14, AF3)>, /* USART6_RX */
201				 <STM32_PINMUX('F', 15, AF3)>; /* USART6_CTS_NSS */
202			bias-pull-up;
203		};
204	};
205
206	usart6_idle_pins_a: usart6-idle-0 {
207		pins1 {
208			pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
209				 <STM32_PINMUX('F', 15, ANALOG)>; /* USART6_CTS_NSS */
210		};
211		pins2 {
212			pinmux = <STM32_PINMUX('G', 5, AF3)>; /* USART6_RTS */
213			bias-disable;
214			drive-push-pull;
215			slew-rate = <0>;
216		};
217		pins3 {
218			pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */
219			bias-pull-up;
220		};
221	};
222
223	usart6_sleep_pins_a: usart6-sleep-0 {
224		pins {
225			pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
226				 <STM32_PINMUX('G', 5, ANALOG)>,  /* USART6_RTS */
227				 <STM32_PINMUX('F', 15, ANALOG)>, /* USART6_CTS_NSS */
228				 <STM32_PINMUX('F', 14, ANALOG)>; /* USART6_RX */
229		};
230	};
231};
232
233&pinctrl_z {
234	i2c8_pins_a: i2c8-0 {
235		pins {
236			pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */
237				 <STM32_PINMUX('Z', 3, AF8)>; /* I2C8_SDA */
238			bias-disable;
239			drive-open-drain;
240			slew-rate = <0>;
241		};
242	};
243
244	i2c8_sleep_pins_a: i2c8-sleep-0 {
245		pins {
246			pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */
247				 <STM32_PINMUX('Z', 3, ANALOG)>; /* I2C8_SDA */
248		};
249	};
250};
251
252&pinctrl_z {
253	spi8_pins_a: spi8-0 {
254		pins1 {
255			pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
256				 <STM32_PINMUX('Z', 0, AF3)>; /* SPI8_MOSI */
257			drive-push-pull;
258			bias-disable;
259			slew-rate = <1>;
260		};
261		pins2 {
262			pinmux = <STM32_PINMUX('Z', 1, AF3)>; /* SPI8_MISO */
263			bias-disable;
264		};
265	};
266
267	spi8_sleep_pins_a: spi8-sleep-0 {
268		pins1 {
269			pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */
270				 <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI8_MOSI */
271				 <STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */
272		};
273	};
274};
275