xref: /linux/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi (revision 6e9a12f85a7567bb9a41d5230468886bd6a27b20) 
1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9	eth2_rgmii_pins_a: eth2-rgmii-0 {
10		pins1 {
11			pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
12				 <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */
13				 <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
14				 <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */
15				 <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */
16			bias-disable;
17			drive-push-pull;
18			slew-rate = <3>;
19		};
20		pins2 {
21			pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
22				 <STM32_PINMUX('F', 7, AF10)>, /* ETH_RGMII_GTX_CLK */
23				 <STM32_PINMUX('C', 6, AF10)>; /* ETH_MDC */
24			bias-disable;
25			drive-push-pull;
26			slew-rate = <3>;
27		};
28		pins3 {
29			pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
30			bias-disable;
31			drive-push-pull;
32			slew-rate = <0>;
33		};
34		pins4 {
35			pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
36				 <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */
37				 <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
38				 <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
39				 <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
40			bias-disable;
41		};
42		pins5 {
43			pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
44			bias-disable;
45		};
46	};
47
48	eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
49		pins {
50			pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
51				 <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */
52				 <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
53				 <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */
54				 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */
55				 <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */
56				 <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */
57				 <STM32_PINMUX('C', 6, ANALOG)>, /* ETH_MDC */
58				 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_MDIO */
59				 <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
60				 <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */
61				 <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
62				 <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */
63				 <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */
64				 <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */
65		};
66	};
67
68	i2c2_pins_a: i2c2-0 {
69		pins {
70			pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */
71				 <STM32_PINMUX('B', 4, AF9)>; /* I2C2_SDA */
72			bias-disable;
73			drive-open-drain;
74			slew-rate = <0>;
75		};
76	};
77
78	i2c2_sleep_pins_a: i2c2-sleep-0 {
79		pins {
80			pinmux = <STM32_PINMUX('B', 5, ANALOG)>, /* I2C2_SCL */
81				 <STM32_PINMUX('B', 4, ANALOG)>; /* I2C2_SDA */
82		};
83	};
84
85	ospi_port1_clk_pins_a: ospi-port1-clk-0 {
86		pins {
87			pinmux = <STM32_PINMUX('D', 0, AF10)>; /* OSPI1_CLK */
88			bias-disable;
89			drive-push-pull;
90			slew-rate = <2>;
91		};
92	};
93
94	ospi_port1_clk_sleep_pins_a: ospi-port1-clk-sleep-0 {
95		pins {
96			pinmux = <STM32_PINMUX('D', 0, ANALOG)>; /* OSPI1_CLK */
97		};
98	};
99
100	ospi_port1_cs0_pins_a: ospi-port1-cs0-0 {
101		pins {
102			pinmux = <STM32_PINMUX('D', 3, AF10)>; /* OSPI_NCS0 */
103			bias-pull-up;
104			drive-push-pull;
105			slew-rate = <0>;
106		};
107	};
108
109	ospi_port1_cs0_sleep_pins_a: ospi-port1-cs0-sleep-0 {
110		pins {
111			pinmux = <STM32_PINMUX('D', 3, ANALOG)>; /* OSPI_NCS0 */
112		};
113	};
114
115	ospi_port1_io03_pins_a: ospi-port1-io03-0 {
116		pins {
117			pinmux = <STM32_PINMUX('D', 4, AF10)>, /* OSPI_IO0 */
118				 <STM32_PINMUX('D', 5, AF10)>, /* OSPI_IO1 */
119				 <STM32_PINMUX('D', 6, AF10)>, /* OSPI_IO2 */
120				 <STM32_PINMUX('D', 7, AF10)>; /* OSPI_IO3 */
121			bias-disable;
122			drive-push-pull;
123			slew-rate = <0>;
124		};
125	};
126
127	ospi_port1_io03_sleep_pins_a: ospi-port1-io03-sleep-0 {
128		pins {
129			pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* OSPI_IO0 */
130				 <STM32_PINMUX('D', 5, ANALOG)>, /* OSPI_IO1 */
131				 <STM32_PINMUX('D', 6, ANALOG)>, /* OSPI_IO2 */
132				 <STM32_PINMUX('D', 7, ANALOG)>; /* OSPI_IO3 */
133		};
134	};
135
136	pwm3_pins_a: pwm3-0 {
137		pins {
138			pinmux = <STM32_PINMUX('B', 15, AF7)>; /* TIM3_CH2 */
139			bias-pull-down;
140			drive-push-pull;
141			slew-rate = <0>;
142		};
143	};
144
145	pwm3_sleep_pins_a: pwm3-sleep-0 {
146		pins {
147			pinmux = <STM32_PINMUX('B', 15, ANALOG)>; /* TIM3_CH2 */
148		};
149	};
150
151	pwm8_pins_a: pwm8-0 {
152		pins {
153			pinmux = <STM32_PINMUX('J', 5, AF8)>, /* TIM8_CH1 */
154				 <STM32_PINMUX('J', 4, AF8)>; /* TIM8_CH4 */
155			bias-pull-down;
156			drive-push-pull;
157			slew-rate = <0>;
158		};
159	};
160
161	pwm8_sleep_pins_a: pwm8-sleep-0 {
162		pins {
163			pinmux = <STM32_PINMUX('J', 5, ANALOG)>, /* TIM8_CH1 */
164				 <STM32_PINMUX('J', 4, ANALOG)>; /* TIM8_CH4 */
165		};
166	};
167
168	pwm12_pins_a: pwm12-0 {
169		pins {
170			pinmux = <STM32_PINMUX('B', 11, AF9)>; /* TIM12_CH2 */
171			bias-pull-down;
172			drive-push-pull;
173			slew-rate = <0>;
174		};
175	};
176
177	pwm12_sleep_pins_a: pwm12-sleep-0 {
178		pins {
179			pinmux = <STM32_PINMUX('B', 11, ANALOG)>; /* TIM12_CH2 */
180		};
181	};
182
183	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
184		pins1 {
185			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
186				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
187				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
188				 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
189				 <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
190			slew-rate = <2>;
191			drive-push-pull;
192			bias-disable;
193		};
194		pins2 {
195			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
196			slew-rate = <3>;
197			drive-push-pull;
198			bias-disable;
199		};
200	};
201
202	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
203		pins1 {
204			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
205				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
206				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
207				 <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */
208			slew-rate = <2>;
209			drive-push-pull;
210			bias-disable;
211		};
212		pins2 {
213			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
214			slew-rate = <3>;
215			drive-push-pull;
216			bias-disable;
217		};
218		pins3 {
219			pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
220			slew-rate = <2>;
221			drive-open-drain;
222			bias-disable;
223		};
224	};
225
226	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
227		pins {
228			pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */
229				 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC1_D1 */
230				 <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */
231				 <STM32_PINMUX('E', 1, ANALOG)>, /* SDMMC1_D3 */
232				 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC1_CK */
233				 <STM32_PINMUX('E', 2, ANALOG)>; /* SDMMC1_CMD */
234		};
235	};
236
237	spi3_pins_a: spi3-0 {
238		pins1 {
239			pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */
240				 <STM32_PINMUX('B', 8, AF1)>; /* SPI3_MOSI */
241			drive-push-pull;
242			bias-disable;
243			slew-rate = <1>;
244		};
245		pins2 {
246			pinmux = <STM32_PINMUX('B', 10, AF1)>; /* SPI3_MISO */
247			bias-disable;
248		};
249	};
250
251	spi3_sleep_pins_a: spi3-sleep-0 {
252		pins1 {
253			pinmux = <STM32_PINMUX('B', 7, ANALOG)>, /* SPI3_SCK */
254				 <STM32_PINMUX('B', 8, ANALOG)>, /* SPI3_MOSI */
255				 <STM32_PINMUX('B', 10, ANALOG)>; /* SPI3_MISO */
256		};
257	};
258
259	tim10_counter_pins_a: tim10-counter-0 {
260		pins {
261			pinmux = <STM32_PINMUX('B', 9, AF9)>; /* TIM10_CH1 */
262			bias-disable;
263		};
264	};
265
266	tim10_counter_sleep_pins_a: tim10-counter-sleep-0 {
267		pins {
268			pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* TIM10_CH1 */
269			bias-disable;
270		};
271	};
272
273	usart2_pins_a: usart2-0 {
274		pins1 {
275			pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
276			bias-disable;
277			drive-push-pull;
278			slew-rate = <0>;
279		};
280		pins2 {
281			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
282			bias-disable;
283		};
284	};
285
286	usart2_idle_pins_a: usart2-idle-0 {
287		pins1 {
288			pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
289		};
290		pins2 {
291			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
292			bias-disable;
293		};
294	};
295
296	usart2_sleep_pins_a: usart2-sleep-0 {
297		pins {
298			pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
299				 <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
300		};
301	};
302
303	usart6_pins_a: usart6-0 {
304		pins1 {
305			pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */
306				 <STM32_PINMUX('G', 5, AF3)>;  /* USART6_RTS */
307			bias-disable;
308			drive-push-pull;
309			slew-rate = <0>;
310		};
311		pins2 {
312			pinmux = <STM32_PINMUX('F', 14, AF3)>, /* USART6_RX */
313				 <STM32_PINMUX('F', 15, AF3)>; /* USART6_CTS_NSS */
314			bias-pull-up;
315		};
316	};
317
318	usart6_idle_pins_a: usart6-idle-0 {
319		pins1 {
320			pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
321				 <STM32_PINMUX('F', 15, ANALOG)>; /* USART6_CTS_NSS */
322		};
323		pins2 {
324			pinmux = <STM32_PINMUX('G', 5, AF3)>; /* USART6_RTS */
325			bias-disable;
326			drive-push-pull;
327			slew-rate = <0>;
328		};
329		pins3 {
330			pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */
331			bias-pull-up;
332		};
333	};
334
335	usart6_sleep_pins_a: usart6-sleep-0 {
336		pins {
337			pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
338				 <STM32_PINMUX('G', 5, ANALOG)>,  /* USART6_RTS */
339				 <STM32_PINMUX('F', 15, ANALOG)>, /* USART6_CTS_NSS */
340				 <STM32_PINMUX('F', 14, ANALOG)>; /* USART6_RX */
341		};
342	};
343};
344
345&pinctrl_z {
346	i2c8_pins_a: i2c8-0 {
347		pins {
348			pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */
349				 <STM32_PINMUX('Z', 3, AF8)>; /* I2C8_SDA */
350			bias-disable;
351			drive-open-drain;
352			slew-rate = <0>;
353		};
354	};
355
356	i2c8_sleep_pins_a: i2c8-sleep-0 {
357		pins {
358			pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */
359				 <STM32_PINMUX('Z', 3, ANALOG)>; /* I2C8_SDA */
360		};
361	};
362};
363
364&pinctrl_z {
365	spi8_pins_a: spi8-0 {
366		pins1 {
367			pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
368				 <STM32_PINMUX('Z', 0, AF3)>; /* SPI8_MOSI */
369			drive-push-pull;
370			bias-disable;
371			slew-rate = <1>;
372		};
373		pins2 {
374			pinmux = <STM32_PINMUX('Z', 1, AF3)>; /* SPI8_MISO */
375			bias-disable;
376		};
377	};
378
379	spi8_sleep_pins_a: spi8-sleep-0 {
380		pins1 {
381			pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */
382				 <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI8_MOSI */
383				 <STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */
384		};
385	};
386};
387