1*bb8551c1SChunyan Zhang// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*bb8551c1SChunyan Zhang/* 3*bb8551c1SChunyan Zhang * Unisoc UMS9620-2h10 board DTS file 4*bb8551c1SChunyan Zhang * 5*bb8551c1SChunyan Zhang * Copyright (C) 2023, Unisoc Inc. 6*bb8551c1SChunyan Zhang */ 7*bb8551c1SChunyan Zhang 8*bb8551c1SChunyan Zhang/dts-v1/; 9*bb8551c1SChunyan Zhang 10*bb8551c1SChunyan Zhang#include "ums9620.dtsi" 11*bb8551c1SChunyan Zhang 12*bb8551c1SChunyan Zhang/ { 13*bb8551c1SChunyan Zhang model = "Unisoc UMS9620-2H10 Board"; 14*bb8551c1SChunyan Zhang 15*bb8551c1SChunyan Zhang compatible = "sprd,ums9620-2h10", "sprd,ums9620"; 16*bb8551c1SChunyan Zhang 17*bb8551c1SChunyan Zhang aliases { 18*bb8551c1SChunyan Zhang serial0 = &uart0; 19*bb8551c1SChunyan Zhang serial1 = &uart1; 20*bb8551c1SChunyan Zhang }; 21*bb8551c1SChunyan Zhang 22*bb8551c1SChunyan Zhang memory@80000000 { 23*bb8551c1SChunyan Zhang device_type = "memory"; 24*bb8551c1SChunyan Zhang reg = <0x0 0x80000000 0x2 0x00000000>; 25*bb8551c1SChunyan Zhang }; 26*bb8551c1SChunyan Zhang 27*bb8551c1SChunyan Zhang chosen { 28*bb8551c1SChunyan Zhang stdout-path = "serial1:921600n8"; 29*bb8551c1SChunyan Zhang }; 30*bb8551c1SChunyan Zhang}; 31*bb8551c1SChunyan Zhang 32*bb8551c1SChunyan Zhang&uart0 { 33*bb8551c1SChunyan Zhang status = "okay"; 34*bb8551c1SChunyan Zhang}; 35*bb8551c1SChunyan Zhang 36*bb8551c1SChunyan Zhang&uart1 { 37*bb8551c1SChunyan Zhang status = "okay"; 38*bb8551c1SChunyan Zhang}; 39