1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device tree definitions for the Turing RK1 SoM. 4 * 5 * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com> 6 * 7 * Based on RK3588-EVB1 devicetree 8 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 9 */ 10 11/dts-v1/; 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/pinctrl/rockchip.h> 14#include "rk3588.dtsi" 15 16/ { 17 compatible = "turing,rk1", "rockchip,rk3588"; 18 19 aliases { 20 ethernet0 = &gmac1; 21 mmc0 = &sdhci; 22 }; 23 24 fan: pwm-fan { 25 compatible = "pwm-fan"; 26 cooling-levels = <0 25 95 145 195 255>; 27 fan-supply = <&vcc5v0_sys>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pwm0m2_pins &fan_int>; 30 interrupt-parent = <&gpio0>; 31 interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>; 32 pwms = <&pwm0 0 50000 0>; 33 #cooling-cells = <2>; 34 }; 35 36 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 37 compatible = "regulator-fixed"; 38 regulator-name = "vcc3v3_pcie30"; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 enable-active-high; 42 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&vcc3v3_pcie30_en>; 45 startup-delay-us = <5000>; 46 }; 47 48 vcc5v0_sys: regulator-vcc5v0-sys { 49 compatible = "regulator-fixed"; 50 regulator-name = "vcc5v0_sys"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <5000000>; 54 regulator-max-microvolt = <5000000>; 55 }; 56 57 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc_1v1_nldo_s3"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <1100000>; 63 regulator-max-microvolt = <1100000>; 64 vin-supply = <&vcc5v0_sys>; 65 }; 66}; 67 68&combphy2_psu { 69 status = "okay"; 70}; 71 72&cpu_b0 { 73 cpu-supply = <&vdd_cpu_big0_s0>; 74}; 75 76&cpu_b1 { 77 cpu-supply = <&vdd_cpu_big0_s0>; 78}; 79 80&cpu_b2 { 81 cpu-supply = <&vdd_cpu_big1_s0>; 82}; 83 84&cpu_b3 { 85 cpu-supply = <&vdd_cpu_big1_s0>; 86}; 87 88&cpu_l0 { 89 cpu-supply = <&vdd_cpu_lit_s0>; 90}; 91 92&cpu_l1 { 93 cpu-supply = <&vdd_cpu_lit_s0>; 94}; 95 96&cpu_l2 { 97 cpu-supply = <&vdd_cpu_lit_s0>; 98}; 99 100&cpu_l3 { 101 cpu-supply = <&vdd_cpu_lit_s0>; 102}; 103 104&gmac1 { 105 clock_in_out = "output"; 106 phy-handle = <&rgmii_phy>; 107 phy-mode = "rgmii-rxid"; 108 pinctrl-0 = <&gmac1_miim 109 &gmac1_tx_bus2 110 &gmac1_rx_bus2 111 &gmac1_rgmii_clk 112 &gmac1_rgmii_bus>; 113 pinctrl-names = "default"; 114 rx_delay = <0x00>; 115 tx_delay = <0x43>; 116 status = "okay"; 117}; 118 119&gpu { 120 mali-supply = <&vdd_gpu_s0>; 121 status = "okay"; 122}; 123 124&i2c0 { 125 pinctrl-names = "default"; 126 pinctrl-0 = <&i2c0m2_xfer>; 127 status = "okay"; 128 129 vdd_cpu_big0_s0: regulator@42 { 130 compatible = "rockchip,rk8602"; 131 reg = <0x42>; 132 fcs,suspend-voltage-selector = <1>; 133 regulator-name = "vdd_cpu_big0_s0"; 134 regulator-always-on; 135 regulator-boot-on; 136 regulator-min-microvolt = <550000>; 137 regulator-max-microvolt = <1050000>; 138 regulator-ramp-delay = <2300>; 139 vin-supply = <&vcc5v0_sys>; 140 141 regulator-state-mem { 142 regulator-off-in-suspend; 143 }; 144 }; 145 146 vdd_cpu_big1_s0: regulator@43 { 147 compatible = "rockchip,rk8603", "rockchip,rk8602"; 148 reg = <0x43>; 149 fcs,suspend-voltage-selector = <1>; 150 regulator-name = "vdd_cpu_big1_s0"; 151 regulator-always-on; 152 regulator-boot-on; 153 regulator-min-microvolt = <550000>; 154 regulator-max-microvolt = <1050000>; 155 regulator-ramp-delay = <2300>; 156 vin-supply = <&vcc5v0_sys>; 157 158 regulator-state-mem { 159 regulator-off-in-suspend; 160 }; 161 }; 162}; 163 164&i2c1 { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&i2c1m2_xfer>; 167 status = "okay"; 168 169 vdd_npu_s0: regulator@42 { 170 compatible = "rockchip,rk8602"; 171 reg = <0x42>; 172 fcs,suspend-voltage-selector = <1>; 173 regulator-name = "vdd_npu_s0"; 174 regulator-always-on; 175 regulator-boot-on; 176 regulator-min-microvolt = <550000>; 177 regulator-max-microvolt = <950000>; 178 regulator-ramp-delay = <2300>; 179 vin-supply = <&vcc5v0_sys>; 180 181 regulator-state-mem { 182 regulator-off-in-suspend; 183 }; 184 }; 185}; 186 187&i2c6 { 188 status = "okay"; 189 190 hym8563: rtc@51 { 191 compatible = "haoyu,hym8563"; 192 reg = <0x51>; 193 #clock-cells = <0>; 194 clock-output-names = "hym8563"; 195 pinctrl-names = "default"; 196 pinctrl-0 = <&hym8563_int>; 197 interrupt-parent = <&gpio0>; 198 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 199 wakeup-source; 200 }; 201}; 202 203&mdio1 { 204 rgmii_phy: ethernet-phy@1 { 205 /* RTL8211F */ 206 compatible = "ethernet-phy-id001c.c916"; 207 reg = <0x1>; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&rtl8211f_rst>; 210 reset-assert-us = <15000>; 211 reset-deassert-us = <50000>; 212 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 213 }; 214}; 215 216&package_thermal { 217 trips { 218 package_active1: trip-active1 { 219 temperature = <45000>; 220 hysteresis = <5000>; 221 type = "active"; 222 }; 223 package_active2: trip-active2 { 224 temperature = <50000>; 225 hysteresis = <5000>; 226 type = "active"; 227 }; 228 package_active3: trip-active3 { 229 temperature = <60000>; 230 hysteresis = <5000>; 231 type = "active"; 232 }; 233 package_active4: trip-active4 { 234 temperature = <70000>; 235 hysteresis = <5000>; 236 type = "active"; 237 }; 238 package_active5: trip-active5 { 239 temperature = <80000>; 240 hysteresis = <5000>; 241 type = "active"; 242 }; 243 }; 244 245 cooling-maps { 246 map1 { 247 trip = <&package_active1>; 248 cooling-device = <&fan 1 1>; 249 }; 250 map2 { 251 trip = <&package_active2>; 252 cooling-device = <&fan 2 2>; 253 }; 254 map3 { 255 trip = <&package_active3>; 256 cooling-device = <&fan 3 3>; 257 }; 258 map4 { 259 trip = <&package_active4>; 260 cooling-device = <&fan 4 4>; 261 }; 262 map5 { 263 trip = <&package_active5>; 264 cooling-device = <&fan 5 5>; 265 }; 266 }; 267}; 268 269&pcie2x1l1 { 270 linux,pci-domain = <1>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pcie2_reset>, <&pcie30x1m1_0_clkreqn>, <&pcie30x1m1_0_waken>; 273 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 274 status = "okay"; 275}; 276 277&pcie30phy { 278 status = "okay"; 279}; 280 281&pcie3x4 { 282 linux,pci-domain = <0>; 283 pinctrl-names = "default"; 284 pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>, <&pcie30x4m1_waken>; 285 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 286 vpcie3v3-supply = <&vcc3v3_pcie30>; 287 status = "okay"; 288}; 289 290&pinctrl { 291 fan { 292 fan_int: fan-int { 293 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 294 }; 295 }; 296 297 hym8563 { 298 hym8563_int: hym8563-int { 299 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 300 }; 301 }; 302 303 pcie2 { 304 pcie2_reset: pcie2-reset { 305 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 306 }; 307 }; 308 309 pcie3 { 310 pcie3_reset: pcie3-reset { 311 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 312 }; 313 314 vcc3v3_pcie30_en: pcie3-reg { 315 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 316 }; 317 }; 318 319 rtl8211f { 320 rtl8211f_rst: rtl8211f-rst { 321 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 322 }; 323 }; 324}; 325 326&pwm0 { 327 status = "okay"; 328}; 329 330&sdhci { 331 bus-width = <8>; 332 no-sdio; 333 no-sd; 334 non-removable; 335 mmc-hs400-1_8v; 336 mmc-hs400-enhanced-strobe; 337 status = "okay"; 338}; 339 340&spi2 { 341 status = "okay"; 342 pinctrl-names = "default"; 343 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 344 num-cs = <1>; 345 346 pmic@0 { 347 compatible = "rockchip,rk806"; 348 spi-max-frequency = <1000000>; 349 reg = <0x0>; 350 351 interrupt-parent = <&gpio0>; 352 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 353 354 pinctrl-names = "default"; 355 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 356 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 357 system-power-controller; 358 359 vcc1-supply = <&vcc5v0_sys>; 360 vcc2-supply = <&vcc5v0_sys>; 361 vcc3-supply = <&vcc5v0_sys>; 362 vcc4-supply = <&vcc5v0_sys>; 363 vcc5-supply = <&vcc5v0_sys>; 364 vcc6-supply = <&vcc5v0_sys>; 365 vcc7-supply = <&vcc5v0_sys>; 366 vcc8-supply = <&vcc5v0_sys>; 367 vcc9-supply = <&vcc5v0_sys>; 368 vcc10-supply = <&vcc5v0_sys>; 369 vcc11-supply = <&vcc_2v0_pldo_s3>; 370 vcc12-supply = <&vcc5v0_sys>; 371 vcc13-supply = <&vcc_1v1_nldo_s3>; 372 vcc14-supply = <&vcc_1v1_nldo_s3>; 373 vcca-supply = <&vcc5v0_sys>; 374 375 gpio-controller; 376 #gpio-cells = <2>; 377 378 rk806_dvs1_null: dvs1-null-pins { 379 pins = "gpio_pwrctrl1"; 380 function = "pin_fun0"; 381 }; 382 383 rk806_dvs2_null: dvs2-null-pins { 384 pins = "gpio_pwrctrl2"; 385 function = "pin_fun0"; 386 }; 387 388 rk806_dvs3_null: dvs3-null-pins { 389 pins = "gpio_pwrctrl3"; 390 function = "pin_fun0"; 391 }; 392 393 regulators { 394 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 395 /* 396 * RK3588's GPU power domain cannot be enabled 397 * without this regulator active, but it 398 * doesn't have to be on when the GPU PD is 399 * disabled. Because the PD binding does not 400 * currently allow us to express this 401 * relationship, we have no choice but to do 402 * this instead: 403 */ 404 regulator-always-on; 405 406 regulator-boot-on; 407 regulator-min-microvolt = <550000>; 408 regulator-max-microvolt = <950000>; 409 regulator-ramp-delay = <12500>; 410 regulator-name = "vdd_gpu_s0"; 411 regulator-enable-ramp-delay = <400>; 412 413 regulator-state-mem { 414 regulator-off-in-suspend; 415 }; 416 }; 417 418 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 419 regulator-always-on; 420 regulator-boot-on; 421 regulator-min-microvolt = <550000>; 422 regulator-max-microvolt = <950000>; 423 regulator-ramp-delay = <12500>; 424 regulator-name = "vdd_cpu_lit_s0"; 425 426 regulator-state-mem { 427 regulator-off-in-suspend; 428 }; 429 }; 430 431 vdd_log_s0: dcdc-reg3 { 432 regulator-always-on; 433 regulator-boot-on; 434 regulator-min-microvolt = <675000>; 435 regulator-max-microvolt = <750000>; 436 regulator-ramp-delay = <12500>; 437 regulator-name = "vdd_log_s0"; 438 439 regulator-state-mem { 440 regulator-off-in-suspend; 441 regulator-suspend-microvolt = <750000>; 442 }; 443 }; 444 445 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 446 regulator-always-on; 447 regulator-boot-on; 448 regulator-min-microvolt = <550000>; 449 regulator-max-microvolt = <950000>; 450 regulator-ramp-delay = <12500>; 451 regulator-name = "vdd_vdenc_s0"; 452 453 regulator-state-mem { 454 regulator-off-in-suspend; 455 }; 456 }; 457 458 vdd_ddr_s0: dcdc-reg5 { 459 regulator-always-on; 460 regulator-boot-on; 461 regulator-min-microvolt = <675000>; 462 regulator-max-microvolt = <900000>; 463 regulator-ramp-delay = <12500>; 464 regulator-name = "vdd_ddr_s0"; 465 466 regulator-state-mem { 467 regulator-off-in-suspend; 468 regulator-suspend-microvolt = <850000>; 469 }; 470 }; 471 472 vdd2_ddr_s3: dcdc-reg6 { 473 regulator-always-on; 474 regulator-boot-on; 475 regulator-name = "vdd2_ddr_s3"; 476 477 regulator-state-mem { 478 regulator-on-in-suspend; 479 }; 480 }; 481 482 vcc_2v0_pldo_s3: dcdc-reg7 { 483 regulator-always-on; 484 regulator-boot-on; 485 regulator-min-microvolt = <2000000>; 486 regulator-max-microvolt = <2000000>; 487 regulator-ramp-delay = <12500>; 488 regulator-name = "vdd_2v0_pldo_s3"; 489 490 regulator-state-mem { 491 regulator-on-in-suspend; 492 regulator-suspend-microvolt = <2000000>; 493 }; 494 }; 495 496 vcc_3v3_s3: dcdc-reg8 { 497 regulator-always-on; 498 regulator-boot-on; 499 regulator-min-microvolt = <3300000>; 500 regulator-max-microvolt = <3300000>; 501 regulator-name = "vcc_3v3_s3"; 502 503 regulator-state-mem { 504 regulator-on-in-suspend; 505 regulator-suspend-microvolt = <3300000>; 506 }; 507 }; 508 509 vddq_ddr_s0: dcdc-reg9 { 510 regulator-always-on; 511 regulator-boot-on; 512 regulator-name = "vddq_ddr_s0"; 513 514 regulator-state-mem { 515 regulator-off-in-suspend; 516 }; 517 }; 518 519 vcc_1v8_s3: dcdc-reg10 { 520 regulator-always-on; 521 regulator-boot-on; 522 regulator-min-microvolt = <1800000>; 523 regulator-max-microvolt = <1800000>; 524 regulator-name = "vcc_1v8_s3"; 525 526 regulator-state-mem { 527 regulator-on-in-suspend; 528 regulator-suspend-microvolt = <1800000>; 529 }; 530 }; 531 532 avcc_1v8_s0: pldo-reg1 { 533 regulator-always-on; 534 regulator-boot-on; 535 regulator-min-microvolt = <1800000>; 536 regulator-max-microvolt = <1800000>; 537 regulator-name = "avcc_1v8_s0"; 538 539 regulator-state-mem { 540 regulator-off-in-suspend; 541 }; 542 }; 543 544 vcc_1v8_s0: pldo-reg2 { 545 regulator-always-on; 546 regulator-boot-on; 547 regulator-min-microvolt = <1800000>; 548 regulator-max-microvolt = <1800000>; 549 regulator-name = "vcc_1v8_s0"; 550 551 regulator-state-mem { 552 regulator-off-in-suspend; 553 regulator-suspend-microvolt = <1800000>; 554 }; 555 }; 556 557 avdd_1v2_s0: pldo-reg3 { 558 regulator-always-on; 559 regulator-boot-on; 560 regulator-min-microvolt = <1200000>; 561 regulator-max-microvolt = <1200000>; 562 regulator-name = "avdd_1v2_s0"; 563 564 regulator-state-mem { 565 regulator-off-in-suspend; 566 }; 567 }; 568 569 vcc_3v3_s0: pldo-reg4 { 570 regulator-always-on; 571 regulator-boot-on; 572 regulator-min-microvolt = <3300000>; 573 regulator-max-microvolt = <3300000>; 574 regulator-ramp-delay = <12500>; 575 regulator-name = "vcc_3v3_s0"; 576 577 regulator-state-mem { 578 regulator-off-in-suspend; 579 }; 580 }; 581 582 vccio_sd_s0: pldo-reg5 { 583 regulator-always-on; 584 regulator-boot-on; 585 regulator-min-microvolt = <1800000>; 586 regulator-max-microvolt = <3300000>; 587 regulator-ramp-delay = <12500>; 588 regulator-name = "vccio_sd_s0"; 589 590 regulator-state-mem { 591 regulator-off-in-suspend; 592 }; 593 }; 594 595 pldo6_s3: pldo-reg6 { 596 regulator-always-on; 597 regulator-boot-on; 598 regulator-min-microvolt = <1800000>; 599 regulator-max-microvolt = <1800000>; 600 regulator-name = "pldo6_s3"; 601 602 regulator-state-mem { 603 regulator-on-in-suspend; 604 regulator-suspend-microvolt = <1800000>; 605 }; 606 }; 607 608 vdd_0v75_s3: nldo-reg1 { 609 regulator-always-on; 610 regulator-boot-on; 611 regulator-min-microvolt = <750000>; 612 regulator-max-microvolt = <750000>; 613 regulator-name = "vdd_0v75_s3"; 614 615 regulator-state-mem { 616 regulator-on-in-suspend; 617 regulator-suspend-microvolt = <750000>; 618 }; 619 }; 620 621 vdd_ddr_pll_s0: nldo-reg2 { 622 regulator-always-on; 623 regulator-boot-on; 624 regulator-min-microvolt = <850000>; 625 regulator-max-microvolt = <850000>; 626 regulator-name = "vdd_ddr_pll_s0"; 627 628 regulator-state-mem { 629 regulator-off-in-suspend; 630 regulator-suspend-microvolt = <850000>; 631 }; 632 }; 633 634 avdd_0v75_s0: nldo-reg3 { 635 regulator-always-on; 636 regulator-boot-on; 637 regulator-min-microvolt = <750000>; 638 regulator-max-microvolt = <750000>; 639 regulator-name = "avdd_0v75_s0"; 640 641 regulator-state-mem { 642 regulator-off-in-suspend; 643 }; 644 }; 645 646 vdd_0v85_s0: nldo-reg4 { 647 regulator-always-on; 648 regulator-boot-on; 649 regulator-min-microvolt = <850000>; 650 regulator-max-microvolt = <850000>; 651 regulator-name = "vdd_0v85_s0"; 652 653 regulator-state-mem { 654 regulator-off-in-suspend; 655 }; 656 }; 657 658 vdd_0v75_s0: nldo-reg5 { 659 regulator-always-on; 660 regulator-boot-on; 661 regulator-min-microvolt = <750000>; 662 regulator-max-microvolt = <750000>; 663 regulator-name = "vdd_0v75_s0"; 664 665 regulator-state-mem { 666 regulator-off-in-suspend; 667 }; 668 }; 669 }; 670 }; 671}; 672 673&tsadc { 674 status = "okay"; 675}; 676 677&uart2 { 678 pinctrl-0 = <&uart2m0_xfer>; 679 status = "okay"; 680}; 681 682&uart9 { 683 pinctrl-0 = <&uart9m0_xfer>; 684 status = "okay"; 685}; 686 687/* USB 0: USB 2.0 only, OTG-capable */ 688&u2phy0 { 689 status = "okay"; 690}; 691 692&u2phy0_otg { 693 status = "okay"; 694}; 695 696&usbdp_phy0 { 697 /* 698 * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not 699 * involved in this USB2-only bus. The bus controller (below) needs to 700 * know that it doesn't have a USB3 port so it can ignore any 701 * USB3-related signals. This is handled in hardware by updating the 702 * GRFs corresponding to that bus controller. Alas, Linux currently 703 * puts the code to do that in the USBDP driver, so USBDP0 must be 704 * enabled for now. 705 */ 706 rockchip,dp-lane-mux = <0 1 2 3>; /* "No USB lanes" */ 707 status = "okay"; 708}; 709 710&usb_host0_xhci { 711 extcon = <&u2phy0>; 712 maximum-speed = "high-speed"; 713 status = "okay"; 714}; 715 716/* USB 1: USB 3.0, host only */ 717&u2phy1 { 718 status = "okay"; 719}; 720 721&u2phy1_otg { 722 status = "okay"; 723}; 724 725&usbdp_phy1 { 726 status = "okay"; 727}; 728 729&usb_host1_xhci { 730 dr_mode = "host"; 731 extcon = <&u2phy1>; 732 status = "okay"; 733}; 734 735/* USB 2: USB 2.0, host only */ 736&u2phy2 { 737 status = "okay"; 738}; 739 740&u2phy2_host { 741 status = "okay"; 742}; 743 744&usb_host0_ehci { 745 status = "okay"; 746}; 747 748&usb_host0_ohci { 749 status = "okay"; 750}; 751