1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2024 Radxa Limited 4 * Copyright (c) 2024 Heiko Stuebner <heiko@sntech.de> 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/pwm/pwm.h> 14#include <dt-bindings/soc/rockchip,vop2.h> 15#include "dt-bindings/usb/pd.h" 16#include "rk3588.dtsi" 17 18/ { 19 model = "Radxa ROCK 5 ITX"; 20 compatible = "radxa,rock-5-itx", "rockchip,rk3588"; 21 22 aliases { 23 mmc0 = &sdhci; 24 mmc1 = &sdmmc; 25 mmc2 = &sdio; 26 }; 27 28 chosen { 29 stdout-path = "serial2:1500000n8"; 30 }; 31 32 adc_keys: adc-keys { 33 compatible = "adc-keys"; 34 io-channels = <&saradc 0>; 35 io-channel-names = "buttons"; 36 keyup-threshold-microvolt = <1800000>; 37 poll-interval = <100>; 38 39 button-maskrom { 40 label = "Mask Rom"; 41 linux,code = <KEY_SETUP>; 42 press-threshold-microvolt = <1750>; 43 }; 44 }; 45 46 analog-sound { 47 compatible = "audio-graph-card"; 48 label = "rk3588-es8316"; 49 dais = <&i2s0_8ch_p0>; 50 hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 51 pinctrl-names = "default"; 52 pinctrl-0 = <&hp_detect>; 53 routing = "MIC2", "Mic Jack", 54 "Headphones", "HPOL", 55 "Headphones", "HPOR"; 56 widgets = "Microphone", "Mic Jack", 57 "Headphone", "Headphones"; 58 }; 59 60 bridge { 61 compatible = "radxa,ra620"; 62 63 ports { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 port@0 { 68 reg = <0>; 69 70 hdmi_bridge_in: endpoint { 71 remote-endpoint = <&dp1_out_con>; 72 }; 73 }; 74 75 port@1 { 76 reg = <1>; 77 78 hdmi_bridge_out: endpoint { 79 remote-endpoint = <&hdmi_con_in>; 80 }; 81 }; 82 }; 83 }; 84 85 gpio-leds { 86 compatible = "gpio-leds"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&led_pins>; 89 90 power-led1 { 91 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 92 linux,default-trigger = "default-on"; 93 }; 94 95 hdd-led2 { 96 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 97 linux,default-trigger = "disk-activity"; 98 }; 99 }; 100 101 hdmi0-con { 102 compatible = "hdmi-connector"; 103 type = "a"; 104 105 port { 106 hdmi_con_in: endpoint { 107 remote-endpoint = <&hdmi_bridge_out>; 108 }; 109 }; 110 }; 111 112 hdmi1-con { 113 compatible = "hdmi-connector"; 114 type = "a"; 115 116 port { 117 hdmi1_con_in: endpoint { 118 remote-endpoint = <&hdmi1_out_con>; 119 }; 120 }; 121 }; 122 123 /* Unnamed gated oscillator: 100MHz,3.3V,3225 */ 124 pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator { 125 compatible = "gated-fixed-clock"; 126 #clock-cells = <0>; 127 clock-frequency = <100000000>; 128 clock-output-names = "pcie30_refclk"; 129 vdd-supply = <&vcc3v3_pi6c_05>; 130 }; 131 132 fan0: pwm-fan { 133 compatible = "pwm-fan"; 134 #cooling-cells = <2>; 135 cooling-levels = <0 64 128 192 255>; 136 fan-supply = <&vcc12v_dcin>; 137 pwms = <&pwm14 0 10000 0>; 138 }; 139 140 /* M.2 E-KEY */ 141 sdio_pwrseq: sdio-pwrseq { 142 compatible = "mmc-pwrseq-simple"; 143 clocks = <&hym8563>; 144 clock-names = "ext_clock"; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&wifi_enable_h>; 147 reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 148 }; 149 150 typec_vin: regulator-typec-vin { 151 compatible = "regulator-fixed"; 152 enable-active-high; 153 gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&vbus5v0_typec_en>; 156 regulator-name = "typec_vin"; 157 regulator-min-microvolt = <5000000>; 158 regulator-max-microvolt = <5000000>; 159 vin-supply = <&vcc5v0_sys>; 160 }; 161 162 vcc12v_dcin: regulator-vcc12v-dcin { 163 compatible = "regulator-fixed"; 164 regulator-name = "vcc12v_dcin"; 165 regulator-always-on; 166 regulator-boot-on; 167 regulator-min-microvolt = <12000000>; 168 regulator-max-microvolt = <12000000>; 169 }; 170 171 vcc33_io64: regulator-vcc33-io64 { 172 compatible = "regulator-fixed"; 173 regulator-name = "vcc33_io64"; 174 regulator-always-on; 175 regulator-boot-on; 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 vin-supply = <&vcc12v_dcin>; 179 }; 180 181 vcc3v3_ekey: regulator-vcc3v3-ekey { 182 compatible = "regulator-fixed"; 183 enable-active-high; 184 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&ekey_en>; 187 regulator-name = "vcc3v3_ekey"; 188 regulator-always-on; 189 regulator-boot-on; 190 regulator-min-microvolt = <3300000>; 191 regulator-max-microvolt = <3300000>; 192 startup-delay-us = <50000>; 193 vin-supply = <&vcc5v0_sys>; 194 }; 195 196 vcc3v3_lan: vcc3v3_lan_phy2: regulator-vcc3v3-lan { 197 compatible = "regulator-fixed"; 198 regulator-name = "vcc3v3_lan"; 199 regulator-always-on; 200 regulator-boot-on; 201 regulator-min-microvolt = <3300000>; 202 regulator-max-microvolt = <3300000>; 203 vin-supply = <&vcc_3v3_s3>; 204 }; 205 206 /* The PCIE30x4_PWREN_H controls two regulators */ 207 vcc3v3_mkey: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 { 208 compatible = "regulator-fixed"; 209 enable-active-high; 210 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pcie30x4_pwren_h>; 213 regulator-name = "vcc3v3_pi6c_05"; 214 regulator-min-microvolt = <3300000>; 215 regulator-max-microvolt = <3300000>; 216 startup-delay-us = <5000>; 217 vin-supply = <&vcc5v0_sys>; 218 }; 219 220 vcc3v3_sys: regulator-vcc3v3-sys { 221 compatible = "regulator-fixed"; 222 regulator-name = "vcc3v3_sys"; 223 regulator-always-on; 224 regulator-boot-on; 225 regulator-min-microvolt = <3300000>; 226 regulator-max-microvolt = <3300000>; 227 vin-supply = <&vcc12v_dcin>; 228 }; 229 230 vcc5v0_sys: regulator-vcc5v0-sys { 231 compatible = "regulator-fixed"; 232 regulator-name = "vcc5v0_sys"; 233 regulator-always-on; 234 regulator-boot-on; 235 regulator-min-microvolt = <5000000>; 236 regulator-max-microvolt = <5000000>; 237 vin-supply = <&vcc12v_dcin>; 238 }; 239 240 vcc5v0_usb20: vcc5v0_usb12: vcc5v0_usb34: regulator-vcc5v0-usb { 241 compatible = "regulator-fixed"; 242 enable-active-high; 243 gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 244 pinctrl-names = "default"; 245 pinctrl-0 = <&usb_host_pwren_h>; 246 regulator-name = "vcc5v0_usb"; 247 regulator-min-microvolt = <5000000>; 248 regulator-max-microvolt = <5000000>; 249 vin-supply = <&vcc5v0_sys>; 250 }; 251 252 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 253 compatible = "regulator-fixed"; 254 regulator-name = "vcc_1v1_nldo_s3"; 255 regulator-always-on; 256 regulator-boot-on; 257 regulator-min-microvolt = <1100000>; 258 regulator-max-microvolt = <1100000>; 259 vin-supply = <&vcc5v0_sys>; 260 }; 261}; 262 263&combphy0_ps { 264 status = "okay"; 265}; 266 267&combphy1_ps { 268 status = "okay"; 269}; 270 271&combphy2_psu { 272 status = "okay"; 273}; 274 275&cpu_b0 { 276 cpu-supply = <&vdd_cpu_big0_s0>; 277}; 278 279&cpu_b1 { 280 cpu-supply = <&vdd_cpu_big0_s0>; 281}; 282 283&cpu_b2 { 284 cpu-supply = <&vdd_cpu_big1_s0>; 285}; 286 287&cpu_b3 { 288 cpu-supply = <&vdd_cpu_big1_s0>; 289}; 290 291&cpu_l0 { 292 cpu-supply = <&vdd_cpu_lit_s0>; 293}; 294 295&cpu_l1 { 296 cpu-supply = <&vdd_cpu_lit_s0>; 297}; 298 299&cpu_l2 { 300 cpu-supply = <&vdd_cpu_lit_s0>; 301}; 302 303&cpu_l3 { 304 cpu-supply = <&vdd_cpu_lit_s0>; 305}; 306 307&dp1 { 308 status = "okay"; 309 pinctrl-names = "default"; 310 pinctrl-0 = <&dp1m0_pins>; 311}; 312 313&dp1_in { 314 dp1_in_vp2: endpoint { 315 remote-endpoint = <&vp2_out_dp1>; 316 }; 317}; 318 319&dp1_out { 320 dp1_out_con: endpoint { 321 remote-endpoint = <&hdmi_bridge_in>; 322 }; 323}; 324 325&gpu { 326 mali-supply = <&vdd_gpu_s0>; 327 status = "okay"; 328}; 329 330&hdmi1 { 331 pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd 332 &hdmim1_tx1_scl &hdmim1_tx1_sda>; 333 status = "okay"; 334}; 335 336&hdmi1_in { 337 hdmi1_in_vp1: endpoint { 338 remote-endpoint = <&vp1_out_hdmi1>; 339 }; 340}; 341 342&hdmi1_out { 343 hdmi1_out_con: endpoint { 344 remote-endpoint = <&hdmi1_con_in>; 345 }; 346}; 347 348&hdptxphy1 { 349 status = "okay"; 350}; 351 352&i2c0 { 353 pinctrl-names = "default"; 354 pinctrl-0 = <&i2c0m2_xfer>; 355 status = "okay"; 356 357 vdd_cpu_big0_s0: regulator@42 { 358 compatible = "rockchip,rk8602"; 359 reg = <0x42>; 360 fcs,suspend-voltage-selector = <1>; 361 regulator-name = "vdd_cpu_big0_s0"; 362 regulator-always-on; 363 regulator-boot-on; 364 regulator-min-microvolt = <550000>; 365 regulator-max-microvolt = <1050000>; 366 regulator-ramp-delay = <2300>; 367 vin-supply = <&vcc5v0_sys>; 368 369 regulator-state-mem { 370 regulator-off-in-suspend; 371 }; 372 }; 373 374 vdd_cpu_big1_s0: regulator@43 { 375 compatible = "rockchip,rk8603", "rockchip,rk8602"; 376 reg = <0x43>; 377 fcs,suspend-voltage-selector = <1>; 378 regulator-name = "vdd_cpu_big1_s0"; 379 regulator-always-on; 380 regulator-boot-on; 381 regulator-min-microvolt = <550000>; 382 regulator-max-microvolt = <1050000>; 383 regulator-ramp-delay = <2300>; 384 vin-supply = <&vcc5v0_sys>; 385 386 regulator-state-mem { 387 regulator-off-in-suspend; 388 }; 389 }; 390}; 391 392&i2c1 { 393 pinctrl-names = "default"; 394 pinctrl-0 = <&i2c1m2_xfer>; 395 status = "okay"; 396 397 vdd_npu_s0: regulator@42 { 398 compatible = "rockchip,rk8602"; 399 reg = <0x42>; 400 fcs,suspend-voltage-selector = <1>; 401 regulator-name = "vdd_npu_s0"; 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <550000>; 405 regulator-max-microvolt = <950000>; 406 regulator-ramp-delay = <2300>; 407 vin-supply = <&vcc5v0_sys>; 408 409 regulator-state-mem { 410 regulator-off-in-suspend; 411 }; 412 }; 413}; 414 415/* CAM0 connector */ 416&i2c3 { 417 pinctrl-names = "default"; 418 pinctrl-0 = <&i2c3m0_xfer>; 419}; 420 421/* M.2 E-key */ 422&i2c4 { 423 pinctrl-names = "default"; 424 pinctrl-0 = <&i2c4m1_xfer>; 425}; 426 427/* RTC and LCD0 connector */ 428&i2c6 { 429 pinctrl-names = "default"; 430 pinctrl-0 = <&i2c6m0_xfer>; 431 status = "okay"; 432 433 hym8563: rtc@51 { 434 compatible = "haoyu,hym8563"; 435 reg = <0x51>; 436 #clock-cells = <0>; 437 clock-output-names = "wifi_32kout"; 438 interrupt-parent = <&gpio0>; 439 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 440 pinctrl-names = "default"; 441 pinctrl-0 = <&rtc_int>; 442 }; 443}; 444 445/* Audio codec and CAM1 connector */ 446&i2c7 { 447 pinctrl-names = "default"; 448 pinctrl-0 = <&i2c7m0_xfer>; 449 status = "okay"; 450 451 es8316: audio-codec@11 { 452 compatible = "everest,es8316"; 453 reg = <0x11>; 454 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 455 assigned-clock-rates = <12288000>; 456 clocks = <&cru I2S0_8CH_MCLKOUT>; 457 clock-names = "mclk"; 458 #sound-dai-cells = <0>; 459 460 port { 461 es8316_p0_0: endpoint { 462 remote-endpoint = <&i2s0_8ch_p0_0>; 463 }; 464 }; 465 }; 466}; 467 468/* FUSB302 and LCD1 connector */ 469&i2c8 { 470 pinctrl-names = "default"; 471 pinctrl-0 = <&i2c8m4_xfer>; 472 status = "okay"; 473 474 usbc0: usb-typec@22 { 475 compatible = "fcs,fusb302"; 476 reg = <0x22>; 477 interrupt-parent = <&gpio3>; 478 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; 479 pinctrl-names = "default"; 480 pinctrl-0 = <&usbc0_int>; 481 vbus-supply = <&typec_vin>; 482 483 usb_con: connector { 484 compatible = "usb-c-connector"; 485 data-role = "dual"; 486 label = "USB-C"; 487 power-role = "source"; 488 source-pdos = 489 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 490 491 ports { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 495 port@0 { 496 reg = <0>; 497 498 usbc0_orien_sw: endpoint { 499 remote-endpoint = <&usbdp_phy0_orientation_switch>; 500 }; 501 }; 502 503 port@1 { 504 reg = <1>; 505 506 usbc0_role_sw: endpoint { 507 remote-endpoint = <&dwc3_0_role_switch>; 508 }; 509 }; 510 511 port@2 { 512 reg = <2>; 513 514 dp_altmode_mux: endpoint { 515 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 516 }; 517 }; 518 }; 519 }; 520 }; 521}; 522 523&i2c8m4_xfer { 524 rockchip,pins = 525 /* i2c8_scl_m4 */ 526 <3 RK_PC2 9 &pcfg_pull_up_drv_level_6>, 527 /* i2c8_sda_m4 */ 528 <3 RK_PC3 9 &pcfg_pull_up_drv_level_6>; 529}; 530 531&i2s0_8ch { 532 pinctrl-names = "default"; 533 pinctrl-0 = <&i2s0_lrck 534 &i2s0_mclk 535 &i2s0_sclk 536 &i2s0_sdi0 537 &i2s0_sdo0>; 538 status = "okay"; 539 540 i2s0_8ch_p0: port { 541 i2s0_8ch_p0_0: endpoint { 542 dai-format = "i2s"; 543 mclk-fs = <256>; 544 remote-endpoint = <&es8316_p0_0>; 545 }; 546 }; 547}; 548 549&package_thermal { 550 polling-delay = <1000>; 551 552 trips { 553 package_fan0: package-fan0 { 554 hysteresis = <2000>; 555 temperature = <50000>; 556 type = "active"; 557 }; 558 559 package_fan1: package-fan1 { 560 hysteresis = <2000>; 561 temperature = <65000>; 562 type = "active"; 563 }; 564 }; 565 566 cooling-maps { 567 map0 { 568 cooling-device = <&fan0 THERMAL_NO_LIMIT 1>; 569 trip = <&package_fan0>; 570 }; 571 map1 { 572 cooling-device = <&fan0 2 THERMAL_NO_LIMIT>; 573 trip = <&package_fan1>; 574 }; 575 }; 576}; 577 578/* M.2 E-key */ 579&pcie2x1l0 { 580 pinctrl-names = "default"; 581 pinctrl-0 = <&pcie30x1_0_perstn_m1_l>; 582 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 583 vpcie3v3-supply = <&vcc3v3_ekey>; 584 status = "okay"; 585}; 586 587/* RTL8125B_1 */ 588&pcie2x1l1 { 589 pinctrl-names = "default"; 590 pinctrl-0 = <&pcie30x1_1_perstn>; 591 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 592 vpcie3v3-supply = <&vcc3v3_lan>; 593 status = "okay"; 594}; 595 596/* RTL8125B_2 */ 597&pcie2x1l2 { 598 pinctrl-names = "default"; 599 pinctrl-0 = <&pcie20x1_2_perstn>; 600 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 601 vpcie3v3-supply = <&vcc3v3_lan_phy2>; 602 status = "okay"; 603}; 604 605&pcie30phy { 606 data-lanes = <1 1 2 2>; 607 /* separate clock lines from the clock generator to phy and devices */ 608 rockchip,rx-common-refclk-mode = <0 0 0 0>; 609 status = "okay"; 610}; 611 612/* ASMedia ASM1164 Sata controller */ 613&pcie3x2 { 614 /* 615 * The board has a "pcie_refclk" oscillator that needs enabling, 616 * so add it to the list of clocks. 617 */ 618 clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>, 619 <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>, 620 <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>, 621 <&pcie30_port1_refclk>; 622 clock-names = "aclk_mst", "aclk_slv", 623 "aclk_dbi", "pclk", 624 "aux", "pipe", 625 "ref"; 626 pinctrl-names = "default"; 627 pinctrl-0 = <&pcie30x2_perstn_m1_l>; 628 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 629 vpcie3v3-supply = <&vcc33_io64>; 630 status = "okay"; 631}; 632 633/* M.2 M.key */ 634&pcie3x4 { 635 /* 636 * The board has a "pcie_refclk" oscillator that needs enabling, 637 * so add it to the list of clocks. 638 */ 639 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 640 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 641 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 642 <&pcie30_port0_refclk>; 643 clock-names = "aclk_mst", "aclk_slv", 644 "aclk_dbi", "pclk", 645 "aux", "pipe", 646 "ref"; 647 num-lanes = <2>; 648 pinctrl-names = "default"; 649 pinctrl-0 = <&pcie30x4_perstn_m1_l>; 650 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 651 vpcie3v3-supply = <&vcc3v3_mkey>; 652 status = "okay"; 653}; 654 655&pd_gpu { 656 domain-supply = <&vdd_gpu_s0>; 657}; 658 659&pinctrl { 660 hym8563 { 661 rtc_int: rtc-int { 662 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 663 }; 664 }; 665 666 leds { 667 led_pins: led-pins { 668 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, 669 <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 670 }; 671 }; 672 673 pcie { 674 pcie20x1_2_perstn: pcie20x1-2-perstn { 675 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 676 }; 677 678 pcie30x1_0_perstn_m1_l: pcie30x1-0-perstn-m1-l { 679 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 680 }; 681 682 pcie30x1_1_perstn: pcie30x1-1-perstn { 683 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 684 }; 685 686 pcie30x2_perstn_m1_l: pcie30x2-perstn-m1-l { 687 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 688 }; 689 690 pcie30x4_perstn_m1_l: pcie30x4-perstn-m1-l { 691 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 692 }; 693 694 ekey_en: ekey-en { 695 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>; 696 }; 697 698 pcie30x4_pwren_h: pcie30x4-pwren-h { 699 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; 700 }; 701 }; 702 703 sound { 704 hp_detect: hp-detect { 705 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; 706 }; 707 }; 708 709 usb { 710 usb_host_pwren_h: usb-host-pwren-h { 711 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 712 }; 713 714 vcc5v0_otg_en: vcc5v0-otg-en { 715 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 716 }; 717 718 gl3523_reset: rl3523-reset { 719 rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 720 }; 721 }; 722 723 usb-typec { 724 usbc0_int: usbc0-int { 725 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 726 }; 727 728 vbus5v0_typec_en: vbus5v0-typec-en { 729 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 730 }; 731 }; 732 733 hdmirx { 734 hdmirx_det: hdmirx-det { 735 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 736 }; 737 }; 738 739 sdio-pwrseq { 740 wifi_enable_h: wifi-enable-h { 741 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 742 }; 743 }; 744 745 wireless-wlan { 746 wifi_host_wake_irq: wifi-host-wake-irq { 747 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 748 }; 749 }; 750 751 bt { 752 bt_enable_h: bt-enable-h { 753 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 754 }; 755 756 bt_host_wake_l: bt-host-wake-l { 757 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 758 }; 759 760 bt_wake_l: bt-wake-l { 761 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 762 }; 763 }; 764 765 dp { 766 dp1_hpd: dp1-hpd { 767 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 768 }; 769 }; 770}; 771 772&pwm14 { 773 pinctrl-names = "default"; 774 pinctrl-0 = <&pwm14m1_pins>; 775 status = "okay"; 776}; 777 778&saradc { 779 vref-supply = <&avcc_1v8_s0>; 780 status = "okay"; 781}; 782 783&sdhci { 784 bus-width = <8>; 785 max-frequency = <150000000>; 786 mmc-hs400-1_8v; 787 mmc-hs400-enhanced-strobe; 788 no-sdio; 789 no-sd; 790 non-removable; 791 status = "okay"; 792}; 793 794&sdmmc { 795 bus-width = <4>; 796 cap-mmc-highspeed; 797 cap-sd-highspeed; 798 disable-wp; 799 max-frequency = <200000000>; 800 no-sdio; 801 no-mmc; 802 pinctrl-names = "default"; 803 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; 804 sd-uhs-sdr104; 805 vmmc-supply = <&vcc_3v3_s3>; 806 vqmmc-supply = <&vccio_sd_s0>; 807 status = "okay"; 808}; 809 810/* M.2 E-KEY */ 811&sdio { 812 broken-cd; 813 bus-width = <4>; 814 cap-sdio-irq; 815 keep-power-in-suspend; 816 max-frequency = <150000000>; 817 mmc-pwrseq = <&sdio_pwrseq>; 818 no-sd; 819 no-mmc; 820 non-removable; 821 pinctrl-names = "default"; 822 pinctrl-0 = <&sdiom0_pins>; 823 sd-uhs-sdr104; 824 vmmc-supply = <&vcc3v3_ekey>; 825 status = "okay"; 826}; 827 828&sfc { 829 pinctrl-names = "default"; 830 pinctrl-0 = <&fspim2_pins>; 831 status = "okay"; 832 833 spi_flash: flash@0 { 834 compatible = "jedec,spi-nor"; 835 reg = <0x0>; 836 spi-max-frequency = <50000000>; 837 spi-rx-bus-width = <4>; 838 spi-tx-bus-width = <1>; 839 }; 840}; 841 842&spi2 { 843 status = "okay"; 844 assigned-clocks = <&cru CLK_SPI2>; 845 assigned-clock-rates = <200000000>; 846 num-cs = <1>; 847 pinctrl-names = "default"; 848 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 849 850 pmic@0 { 851 compatible = "rockchip,rk806"; 852 reg = <0x0>; 853 gpio-controller; 854 #gpio-cells = <2>; 855 interrupt-parent = <&gpio0>; 856 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 857 pinctrl-names = "default"; 858 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 859 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 860 spi-max-frequency = <1000000>; 861 system-power-controller; 862 863 vcc1-supply = <&vcc5v0_sys>; 864 vcc2-supply = <&vcc5v0_sys>; 865 vcc3-supply = <&vcc5v0_sys>; 866 vcc4-supply = <&vcc5v0_sys>; 867 vcc5-supply = <&vcc5v0_sys>; 868 vcc6-supply = <&vcc5v0_sys>; 869 vcc7-supply = <&vcc5v0_sys>; 870 vcc8-supply = <&vcc5v0_sys>; 871 vcc9-supply = <&vcc5v0_sys>; 872 vcc10-supply = <&vcc5v0_sys>; 873 vcc11-supply = <&vcc_2v0_pldo_s3>; 874 vcc12-supply = <&vcc5v0_sys>; 875 vcc13-supply = <&vcc_1v1_nldo_s3>; 876 vcc14-supply = <&vcc_1v1_nldo_s3>; 877 vcca-supply = <&vcc5v0_sys>; 878 879 rk806_dvs1_null: dvs1-null-pins { 880 pins = "gpio_pwrctrl1"; 881 function = "pin_fun0"; 882 }; 883 884 rk806_dvs2_null: dvs2-null-pins { 885 pins = "gpio_pwrctrl2"; 886 function = "pin_fun0"; 887 }; 888 889 rk806_dvs3_null: dvs3-null-pins { 890 pins = "gpio_pwrctrl3"; 891 function = "pin_fun0"; 892 }; 893 894 regulators { 895 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 896 regulator-boot-on; 897 regulator-min-microvolt = <550000>; 898 regulator-max-microvolt = <950000>; 899 regulator-ramp-delay = <12500>; 900 regulator-name = "vdd_gpu_s0"; 901 regulator-enable-ramp-delay = <400>; 902 903 regulator-state-mem { 904 regulator-off-in-suspend; 905 }; 906 }; 907 908 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 909 regulator-always-on; 910 regulator-boot-on; 911 regulator-min-microvolt = <550000>; 912 regulator-max-microvolt = <950000>; 913 regulator-ramp-delay = <12500>; 914 regulator-name = "vdd_cpu_lit_s0"; 915 916 regulator-state-mem { 917 regulator-off-in-suspend; 918 }; 919 }; 920 921 vdd_log_s0: dcdc-reg3 { 922 regulator-always-on; 923 regulator-boot-on; 924 regulator-min-microvolt = <675000>; 925 regulator-max-microvolt = <750000>; 926 regulator-ramp-delay = <12500>; 927 regulator-name = "vdd_log_s0"; 928 929 regulator-state-mem { 930 regulator-on-in-suspend; 931 regulator-suspend-microvolt = <750000>; 932 }; 933 }; 934 935 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 936 regulator-always-on; 937 regulator-boot-on; 938 regulator-min-microvolt = <550000>; 939 regulator-max-microvolt = <950000>; 940 regulator-ramp-delay = <12500>; 941 regulator-name = "vdd_vdenc_s0"; 942 943 regulator-state-mem { 944 regulator-off-in-suspend; 945 }; 946 }; 947 948 vdd_ddr_s0: dcdc-reg5 { 949 regulator-always-on; 950 regulator-boot-on; 951 regulator-min-microvolt = <675000>; 952 regulator-max-microvolt = <900000>; 953 regulator-ramp-delay = <12500>; 954 regulator-name = "vdd_ddr_s0"; 955 956 regulator-state-mem { 957 regulator-off-in-suspend; 958 regulator-suspend-microvolt = <850000>; 959 }; 960 }; 961 962 vdd2_ddr_s3: dcdc-reg6 { 963 regulator-always-on; 964 regulator-boot-on; 965 regulator-name = "vdd2_ddr_s3"; 966 967 regulator-state-mem { 968 regulator-on-in-suspend; 969 }; 970 }; 971 972 vcc_2v0_pldo_s3: dcdc-reg7 { 973 regulator-always-on; 974 regulator-boot-on; 975 regulator-min-microvolt = <2000000>; 976 regulator-max-microvolt = <2000000>; 977 regulator-ramp-delay = <12500>; 978 regulator-name = "vdd_2v0_pldo_s3"; 979 980 regulator-state-mem { 981 regulator-on-in-suspend; 982 regulator-suspend-microvolt = <2000000>; 983 }; 984 }; 985 986 vcc_3v3_s3: dcdc-reg8 { 987 regulator-always-on; 988 regulator-boot-on; 989 regulator-min-microvolt = <3300000>; 990 regulator-max-microvolt = <3300000>; 991 regulator-name = "vcc_3v3_s3"; 992 993 regulator-state-mem { 994 regulator-on-in-suspend; 995 regulator-suspend-microvolt = <3300000>; 996 }; 997 }; 998 999 vddq_ddr_s0: dcdc-reg9 { 1000 regulator-always-on; 1001 regulator-boot-on; 1002 regulator-name = "vddq_ddr_s0"; 1003 1004 regulator-state-mem { 1005 regulator-off-in-suspend; 1006 }; 1007 }; 1008 1009 vcc_1v8_s3: dcdc-reg10 { 1010 regulator-always-on; 1011 regulator-boot-on; 1012 regulator-min-microvolt = <1800000>; 1013 regulator-max-microvolt = <1800000>; 1014 regulator-name = "vcc_1v8_s3"; 1015 1016 regulator-state-mem { 1017 regulator-on-in-suspend; 1018 regulator-suspend-microvolt = <1800000>; 1019 }; 1020 }; 1021 1022 avcc_1v8_s0: pldo-reg1 { 1023 regulator-always-on; 1024 regulator-boot-on; 1025 regulator-min-microvolt = <1800000>; 1026 regulator-max-microvolt = <1800000>; 1027 regulator-name = "avcc_1v8_s0"; 1028 1029 regulator-state-mem { 1030 regulator-on-in-suspend; 1031 regulator-suspend-microvolt = <1800000>; 1032 }; 1033 }; 1034 1035 vcc_1v8_s0: pldo-reg2 { 1036 regulator-always-on; 1037 regulator-boot-on; 1038 regulator-min-microvolt = <1800000>; 1039 regulator-max-microvolt = <1800000>; 1040 regulator-name = "vcc_1v8_s0"; 1041 1042 regulator-state-mem { 1043 regulator-on-in-suspend; 1044 regulator-suspend-microvolt = <1800000>; 1045 }; 1046 }; 1047 1048 avdd_1v2_s0: pldo-reg3 { 1049 regulator-always-on; 1050 regulator-boot-on; 1051 regulator-min-microvolt = <1200000>; 1052 regulator-max-microvolt = <1200000>; 1053 regulator-name = "avdd_1v2_s0"; 1054 1055 regulator-state-mem { 1056 regulator-off-in-suspend; 1057 }; 1058 }; 1059 1060 vcc_3v3_s0: pldo-reg4 { 1061 regulator-always-on; 1062 regulator-boot-on; 1063 regulator-min-microvolt = <3300000>; 1064 regulator-max-microvolt = <3300000>; 1065 regulator-ramp-delay = <12500>; 1066 regulator-name = "vcc_3v3_s0"; 1067 1068 regulator-state-mem { 1069 regulator-on-in-suspend; 1070 regulator-suspend-microvolt = <3300000>; 1071 }; 1072 }; 1073 1074 vccio_sd_s0: pldo-reg5 { 1075 regulator-always-on; 1076 regulator-boot-on; 1077 regulator-min-microvolt = <1800000>; 1078 regulator-max-microvolt = <3300000>; 1079 regulator-ramp-delay = <12500>; 1080 regulator-name = "vccio_sd_s0"; 1081 1082 regulator-state-mem { 1083 regulator-off-in-suspend; 1084 }; 1085 }; 1086 1087 pldo6_s3: pldo-reg6 { 1088 regulator-always-on; 1089 regulator-boot-on; 1090 regulator-min-microvolt = <1800000>; 1091 regulator-max-microvolt = <1800000>; 1092 regulator-name = "pldo6_s3"; 1093 1094 regulator-state-mem { 1095 regulator-on-in-suspend; 1096 regulator-suspend-microvolt = <1800000>; 1097 }; 1098 }; 1099 1100 vdd_0v75_s3: nldo-reg1 { 1101 regulator-always-on; 1102 regulator-boot-on; 1103 regulator-min-microvolt = <750000>; 1104 regulator-max-microvolt = <750000>; 1105 regulator-name = "vdd_0v75_s3"; 1106 1107 regulator-state-mem { 1108 regulator-on-in-suspend; 1109 regulator-suspend-microvolt = <750000>; 1110 }; 1111 }; 1112 1113 vdd_ddr_pll_s0: nldo-reg2 { 1114 regulator-always-on; 1115 regulator-boot-on; 1116 regulator-min-microvolt = <850000>; 1117 regulator-max-microvolt = <850000>; 1118 regulator-name = "vdd_ddr_pll_s0"; 1119 1120 regulator-state-mem { 1121 regulator-on-in-suspend; 1122 regulator-suspend-microvolt = <850000>; 1123 }; 1124 }; 1125 1126 avdd_0v75_s0: nldo-reg3 { 1127 regulator-always-on; 1128 regulator-boot-on; 1129 regulator-min-microvolt = <750000>; 1130 regulator-max-microvolt = <750000>; 1131 regulator-name = "avdd_0v75_s0"; 1132 1133 regulator-state-mem { 1134 regulator-off-in-suspend; 1135 }; 1136 }; 1137 1138 vdd_0v85_s0: nldo-reg4 { 1139 regulator-always-on; 1140 regulator-boot-on; 1141 regulator-min-microvolt = <850000>; 1142 regulator-max-microvolt = <850000>; 1143 regulator-name = "vdd_0v85_s0"; 1144 1145 regulator-state-mem { 1146 regulator-on-in-suspend; 1147 regulator-suspend-microvolt = <837500>; 1148 }; 1149 }; 1150 1151 vdd_0v75_s0: nldo-reg5 { 1152 regulator-always-on; 1153 regulator-boot-on; 1154 regulator-min-microvolt = <750000>; 1155 regulator-max-microvolt = <750000>; 1156 regulator-name = "vdd_0v75_s0"; 1157 1158 regulator-state-mem { 1159 regulator-on-in-suspend; 1160 regulator-suspend-microvolt = <750000>; 1161 }; 1162 }; 1163 }; 1164 }; 1165}; 1166 1167&tsadc { 1168 status = "okay"; 1169}; 1170 1171&uart2 { 1172 pinctrl-0 = <&uart2m0_xfer>; 1173 status = "okay"; 1174}; 1175 1176/* Connected to M.2 E-key */ 1177&uart6 { 1178 pinctrl-names = "default"; 1179 pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; 1180 status = "okay"; 1181}; 1182 1183&u2phy0 { 1184 status = "okay"; 1185}; 1186 1187&u2phy0_otg { 1188 status = "okay"; 1189}; 1190 1191&u2phy1 { 1192 status = "okay"; 1193}; 1194 1195&u2phy1_otg { 1196 /* connected to USB3 hub, which is powered by vcc5v0_usb12 */ 1197 phy-supply = <&vcc5v0_usb12>; 1198 status = "okay"; 1199}; 1200 1201&u2phy2 { 1202 status = "okay"; 1203}; 1204 1205&u2phy2_host { 1206 /* connected to USB2 hub, which is powered by vcc5v0_usb20 */ 1207 phy-supply = <&vcc5v0_usb20>; 1208 status = "okay"; 1209}; 1210 1211&u2phy3 { 1212 status = "okay"; 1213}; 1214 1215&u2phy3_host { 1216 phy-supply = <&vcc5v0_usb20>; 1217 status = "okay"; 1218}; 1219 1220&usb_host0_ehci { 1221 status = "okay"; 1222}; 1223 1224&usb_host0_ohci { 1225 status = "okay"; 1226}; 1227 1228&usb_host1_ehci { 1229 status = "okay"; 1230}; 1231 1232&usb_host1_ohci { 1233 status = "okay"; 1234}; 1235 1236&usb_host0_xhci { 1237 usb-role-switch; 1238 status = "okay"; 1239 1240 port { 1241 #address-cells = <1>; 1242 #size-cells = <0>; 1243 1244 dwc3_0_role_switch: endpoint@0 { 1245 reg = <0>; 1246 remote-endpoint = <&usbc0_role_sw>; 1247 }; 1248 }; 1249}; 1250 1251&usb_host1_xhci { 1252 dr_mode = "host"; 1253 #address-cells = <1>; 1254 #size-cells = <0>; 1255 status = "okay"; 1256 1257 /* 2.0 hub on port 1 */ 1258 hub_2_0: hub@1 { 1259 compatible = "usb5e3,610"; 1260 reg = <1>; 1261 peer-hub = <&hub_3_0>; 1262 vdd-supply = <&vcc_3v3_s3>; 1263 }; 1264 1265 /* 3.0 hub on port 4 */ 1266 hub_3_0: hub@2 { 1267 compatible = "usb5e3,620"; 1268 reg = <2>; 1269 peer-hub = <&hub_2_0>; 1270 pinctrl-names = "default"; 1271 pinctrl-0 = <&gl3523_reset>; 1272 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 1273 vdd-supply = <&vcc_3v3_s3>; 1274 }; 1275}; 1276 1277&usbdp_phy0 { 1278 mode-switch; 1279 orientation-switch; 1280 sbu1-dc-gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>; 1281 sbu2-dc-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; 1282 status = "okay"; 1283 1284 port { 1285 #address-cells = <1>; 1286 #size-cells = <0>; 1287 usbdp_phy0_orientation_switch: endpoint@0 { 1288 reg = <0>; 1289 remote-endpoint = <&usbc0_orien_sw>; 1290 }; 1291 1292 usbdp_phy0_dp_altmode_mux: endpoint@1 { 1293 reg = <1>; 1294 remote-endpoint = <&dp_altmode_mux>; 1295 }; 1296 }; 1297}; 1298 1299&usbdp_phy1 { 1300 rockchip,dp-lane-mux = <2 3>; 1301 status = "okay"; 1302}; 1303 1304&vop { 1305 status = "okay"; 1306}; 1307 1308&vop_mmu { 1309 status = "okay"; 1310}; 1311 1312&vp1 { 1313 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 1314 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 1315 remote-endpoint = <&hdmi1_in_vp1>; 1316 }; 1317}; 1318 1319&vp2 { 1320 vp2_out_dp1: endpoint@b { 1321 reg = <ROCKCHIP_VOP2_EP_DP1>; 1322 remote-endpoint = <&dp1_in_vp2>; 1323 }; 1324}; 1325