1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2023 Thomas McKahan 5 * 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/usb/pd.h> 14#include "rk3588.dtsi" 15 16/ { 17 model = "FriendlyElec NanoPC-T6"; 18 compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; 19 20 aliases { 21 mmc0 = &sdhci; 22 mmc1 = &sdmmc; 23 }; 24 25 adc-keys-0 { 26 compatible = "adc-keys"; 27 io-channels = <&saradc 0>; 28 io-channel-names = "buttons"; 29 keyup-threshold-microvolt = <1800000>; 30 poll-interval = <100>; 31 32 button-maskrom { 33 label = "Mask Rom"; 34 linux,code = <KEY_SETUP>; 35 press-threshold-microvolt = <2000>; 36 }; 37 }; 38 39 chosen { 40 stdout-path = "serial2:1500000n8"; 41 }; 42 43 ir-receiver { 44 compatible = "gpio-ir-receiver"; 45 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; 46 pinctrl-names = "default"; 47 pinctrl-0 = <&ir_receiver_pin>; 48 }; 49 50 leds { 51 compatible = "gpio-leds"; 52 53 sys_led: led-0 { 54 gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 55 label = "system-led"; 56 linux,default-trigger = "heartbeat"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&sys_led_pin>; 59 }; 60 61 usr_led: led-1 { 62 gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 63 label = "user-led"; 64 pinctrl-names = "default"; 65 pinctrl-0 = <&usr_led_pin>; 66 }; 67 }; 68 69 sound { 70 compatible = "simple-audio-card"; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&hp_det>; 73 74 simple-audio-card,name = "realtek,rt5616-codec"; 75 simple-audio-card,format = "i2s"; 76 simple-audio-card,mclk-fs = <256>; 77 78 simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; 79 80 simple-audio-card,widgets = 81 "Headphone", "Headphones", 82 "Microphone", "Microphone Jack"; 83 simple-audio-card,routing = 84 "Headphones", "HPOL", 85 "Headphones", "HPOR", 86 "MIC1", "Microphone Jack", 87 "Microphone Jack", "micbias1"; 88 89 simple-audio-card,cpu { 90 sound-dai = <&i2s0_8ch>; 91 }; 92 simple-audio-card,codec { 93 sound-dai = <&rt5616>; 94 }; 95 }; 96 97 vcc12v_dcin: vcc12v-dcin-regulator { 98 compatible = "regulator-fixed"; 99 regulator-name = "vcc12v_dcin"; 100 regulator-always-on; 101 regulator-boot-on; 102 regulator-min-microvolt = <12000000>; 103 regulator-max-microvolt = <12000000>; 104 }; 105 106 /* vcc5v0_sys powers peripherals */ 107 vcc5v0_sys: vcc5v0-sys-regulator { 108 compatible = "regulator-fixed"; 109 regulator-name = "vcc5v0_sys"; 110 regulator-always-on; 111 regulator-boot-on; 112 regulator-min-microvolt = <5000000>; 113 regulator-max-microvolt = <5000000>; 114 vin-supply = <&vcc12v_dcin>; 115 }; 116 117 /* vcc4v0_sys powers the RK806, RK860's */ 118 vcc4v0_sys: vcc4v0-sys-regulator { 119 compatible = "regulator-fixed"; 120 regulator-name = "vcc4v0_sys"; 121 regulator-always-on; 122 regulator-boot-on; 123 regulator-min-microvolt = <4000000>; 124 regulator-max-microvolt = <4000000>; 125 vin-supply = <&vcc12v_dcin>; 126 }; 127 128 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { 129 compatible = "regulator-fixed"; 130 regulator-name = "vcc-1v1-nldo-s3"; 131 regulator-always-on; 132 regulator-boot-on; 133 regulator-min-microvolt = <1100000>; 134 regulator-max-microvolt = <1100000>; 135 vin-supply = <&vcc4v0_sys>; 136 }; 137 138 vcc_3v3_pcie20: vcc3v3-pcie20-regulator { 139 compatible = "regulator-fixed"; 140 regulator-name = "vcc_3v3_pcie20"; 141 regulator-always-on; 142 regulator-boot-on; 143 regulator-min-microvolt = <3300000>; 144 regulator-max-microvolt = <3300000>; 145 vin-supply = <&vcc_3v3_s3>; 146 }; 147 148 vbus5v0_typec: vbus5v0-typec-regulator { 149 compatible = "regulator-fixed"; 150 enable-active-high; 151 gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&typec5v_pwren>; 154 regulator-always-on; 155 regulator-boot-on; 156 regulator-name = "vbus5v0_typec"; 157 regulator-min-microvolt = <5000000>; 158 regulator-max-microvolt = <5000000>; 159 vin-supply = <&vcc5v0_sys>; 160 }; 161 162 vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { 163 compatible = "regulator-fixed"; 164 enable-active-high; 165 gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pcie_m2_1_pwren>; 168 regulator-name = "vcc3v3_pcie2x1l0"; 169 regulator-min-microvolt = <3300000>; 170 regulator-max-microvolt = <3300000>; 171 vin-supply = <&vcc5v0_sys>; 172 }; 173 174 vcc3v3_pcie30: vcc3v3-pcie30-regulator { 175 compatible = "regulator-fixed"; 176 enable-active-high; 177 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 178 pinctrl-names = "default"; 179 pinctrl-0 = <&pcie_m2_0_pwren>; 180 regulator-name = "vcc3v3_pcie30"; 181 regulator-min-microvolt = <3300000>; 182 regulator-max-microvolt = <3300000>; 183 vin-supply = <&vcc5v0_sys>; 184 }; 185 186 vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { 187 compatible = "regulator-fixed"; 188 gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; 189 regulator-boot-on; 190 regulator-max-microvolt = <3300000>; 191 regulator-min-microvolt = <3300000>; 192 regulator-name = "vcc3v3_sd_s0"; 193 vin-supply = <&vcc_3v3_s3>; 194 }; 195}; 196 197&combphy0_ps { 198 status = "okay"; 199}; 200 201&combphy1_ps { 202 status = "okay"; 203}; 204 205&combphy2_psu { 206 status = "okay"; 207}; 208 209&cpu_l0 { 210 cpu-supply = <&vdd_cpu_lit_s0>; 211}; 212 213&cpu_l1 { 214 cpu-supply = <&vdd_cpu_lit_s0>; 215}; 216 217&cpu_l2 { 218 cpu-supply = <&vdd_cpu_lit_s0>; 219}; 220 221&cpu_l3 { 222 cpu-supply = <&vdd_cpu_lit_s0>; 223}; 224 225&cpu_b0 { 226 cpu-supply = <&vdd_cpu_big0_s0>; 227}; 228 229&cpu_b1 { 230 cpu-supply = <&vdd_cpu_big0_s0>; 231}; 232 233&cpu_b2 { 234 cpu-supply = <&vdd_cpu_big1_s0>; 235}; 236 237&cpu_b3 { 238 cpu-supply = <&vdd_cpu_big1_s0>; 239}; 240 241&gpio0 { 242 gpio-line-names = /* GPIO0 A0-A7 */ 243 "", "", "", "", 244 "", "", "", "", 245 /* GPIO0 B0-B7 */ 246 "", "", "", "", 247 "", "", "", "", 248 /* GPIO0 C0-C7 */ 249 "", "", "", "", 250 "HEADER_10", "HEADER_08", "HEADER_32", "", 251 /* GPIO0 D0-D7 */ 252 "", "", "", "", 253 "IR receiver [PWM3_IR_M0]", "", "", ""; 254}; 255 256&gpio1 { 257 gpio-line-names = /* GPIO1 A0-A7 */ 258 "HEADER_27", "HEADER_28", "", "", 259 "", "", "", "HEADER_15", 260 /* GPIO1 B0-B7 */ 261 "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", 262 "HEADER_24", "HEADER_22", "", "", 263 /* GPIO1 C0-C7 */ 264 "", "", "", "", 265 "", "", "", "", 266 /* GPIO1 D0-D7 */ 267 "", "", "", "", 268 "", "", "HEADER_05", "HEADER_03"; 269}; 270 271&gpio2 { 272 gpio-line-names = /* GPIO2 A0-A7 */ 273 "", "", "", "", 274 "", "", "", "", 275 /* GPIO2 B0-B7 */ 276 "", "", "", "", 277 "", "", "", "", 278 /* GPIO2 C0-C7 */ 279 "", "CSI1_11", "CSI1_12", "", 280 "", "", "", "", 281 /* GPIO2 D0-D7 */ 282 "", "", "", "", 283 "", "", "", ""; 284}; 285 286&gpio3 { 287 gpio-line-names = /* GPIO3 A0-A7 */ 288 "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", 289 "HEADER_37", "", "DSI0_12", "", 290 /* GPIO3 B0-B7 */ 291 "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", 292 "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", 293 /* GPIO3 C0-C7 */ 294 "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", 295 "", "", "", "", 296 /* GPIO3 D0-D7 */ 297 "", "", "", "", 298 "", "DSI1_10", "", ""; 299}; 300 301&gpio4 { 302 gpio-line-names = /* GPIO4 A0-A7 */ 303 "DSI1_08", "DSI1_14", "", "DSI1_12", 304 "", "", "", "", 305 /* GPIO4 B0-B7 */ 306 "", "", "", "", 307 "", "", "", "", 308 /* GPIO4 C0-C7 */ 309 "", "", "", "", 310 "CSI0_11", "CSI0_12", "", "", 311 /* GPIO4 D0-D7 */ 312 "", "", "", "", 313 "", "", "", ""; 314}; 315 316&gpu { 317 mali-supply = <&vdd_gpu_s0>; 318 status = "okay"; 319}; 320 321&i2c0 { 322 pinctrl-names = "default"; 323 pinctrl-0 = <&i2c0m2_xfer>; 324 status = "okay"; 325 326 vdd_cpu_big0_s0: regulator@42 { 327 compatible = "rockchip,rk8602"; 328 reg = <0x42>; 329 fcs,suspend-voltage-selector = <1>; 330 regulator-name = "vdd_cpu_big0_s0"; 331 regulator-always-on; 332 regulator-boot-on; 333 regulator-min-microvolt = <550000>; 334 regulator-max-microvolt = <1050000>; 335 regulator-ramp-delay = <2300>; 336 vin-supply = <&vcc4v0_sys>; 337 338 regulator-state-mem { 339 regulator-off-in-suspend; 340 }; 341 }; 342 343 vdd_cpu_big1_s0: regulator@43 { 344 compatible = "rockchip,rk8603", "rockchip,rk8602"; 345 reg = <0x43>; 346 fcs,suspend-voltage-selector = <1>; 347 regulator-name = "vdd_cpu_big1_s0"; 348 regulator-always-on; 349 regulator-boot-on; 350 regulator-min-microvolt = <550000>; 351 regulator-max-microvolt = <1050000>; 352 regulator-ramp-delay = <2300>; 353 vin-supply = <&vcc4v0_sys>; 354 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359}; 360 361&i2c2 { 362 status = "okay"; 363 364 vdd_npu_s0: regulator@42 { 365 compatible = "rockchip,rk8602"; 366 reg = <0x42>; 367 fcs,suspend-voltage-selector = <1>; 368 regulator-name = "vdd_npu_s0"; 369 regulator-always-on; 370 regulator-boot-on; 371 regulator-min-microvolt = <550000>; 372 regulator-max-microvolt = <950000>; 373 regulator-ramp-delay = <2300>; 374 vin-supply = <&vcc4v0_sys>; 375 376 regulator-state-mem { 377 regulator-off-in-suspend; 378 }; 379 }; 380}; 381 382&i2c6 { 383 clock-frequency = <200000>; 384 status = "okay"; 385 386 fusb302: typec-portc@22 { 387 compatible = "fcs,fusb302"; 388 reg = <0x22>; 389 interrupt-parent = <&gpio0>; 390 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 391 pinctrl-0 = <&usbc0_int>; 392 pinctrl-names = "default"; 393 vbus-supply = <&vbus5v0_typec>; 394 395 connector { 396 compatible = "usb-c-connector"; 397 data-role = "dual"; 398 label = "USB-C"; 399 power-role = "source"; 400 source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; 401 402 ports { 403 #address-cells = <1>; 404 #size-cells = <0>; 405 406 port@0 { 407 reg = <0>; 408 usbc0_hs: endpoint { 409 remote-endpoint = <&usb_host0_xhci_drd_sw>; 410 }; 411 }; 412 413 port@1 { 414 reg = <1>; 415 usbc0_ss: endpoint { 416 remote-endpoint = <&usbdp_phy0_typec_ss>; 417 }; 418 }; 419 420 port@2 { 421 reg = <2>; 422 usbc0_sbu: endpoint { 423 remote-endpoint = <&usbdp_phy0_typec_sbu>; 424 }; 425 }; 426 }; 427 }; 428 }; 429 430 hym8563: rtc@51 { 431 compatible = "haoyu,hym8563"; 432 reg = <0x51>; 433 #clock-cells = <0>; 434 clock-output-names = "hym8563"; 435 pinctrl-names = "default"; 436 pinctrl-0 = <&hym8563_int>; 437 interrupt-parent = <&gpio0>; 438 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 439 wakeup-source; 440 }; 441}; 442 443&i2c7 { 444 clock-frequency = <200000>; 445 status = "okay"; 446 447 rt5616: codec@1b { 448 compatible = "realtek,rt5616"; 449 reg = <0x1b>; 450 clocks = <&cru I2S0_8CH_MCLKOUT>; 451 clock-names = "mclk"; 452 #sound-dai-cells = <0>; 453 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 454 assigned-clock-rates = <12288000>; 455 456 port { 457 rt5616_p0_0: endpoint { 458 remote-endpoint = <&i2s0_8ch_p0_0>; 459 }; 460 }; 461 }; 462 463 /* connected with MIPI-CSI1 */ 464}; 465 466&i2c8 { 467 pinctrl-0 = <&i2c8m2_xfer>; 468}; 469 470&i2s0_8ch { 471 pinctrl-names = "default"; 472 pinctrl-0 = <&i2s0_lrck 473 &i2s0_mclk 474 &i2s0_sclk 475 &i2s0_sdi0 476 &i2s0_sdo0>; 477 status = "okay"; 478 479 i2s0_8ch_p0: port { 480 i2s0_8ch_p0_0: endpoint { 481 dai-format = "i2s"; 482 mclk-fs = <256>; 483 remote-endpoint = <&rt5616_p0_0>; 484 }; 485 }; 486}; 487 488&pcie2x1l0 { 489 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; 490 vpcie3v3-supply = <&vcc_3v3_pcie20>; 491 pinctrl-names = "default"; 492 pinctrl-0 = <&pcie2_0_rst>; 493 status = "okay"; 494}; 495 496&pcie2x1l1 { 497 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 498 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; 499 pinctrl-names = "default"; 500 pinctrl-0 = <&pcie2_1_rst>; 501 status = "okay"; 502}; 503 504&pcie2x1l2 { 505 reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; 506 vpcie3v3-supply = <&vcc_3v3_pcie20>; 507 pinctrl-names = "default"; 508 pinctrl-0 = <&pcie2_2_rst>; 509 status = "okay"; 510}; 511 512&pcie30phy { 513 status = "okay"; 514}; 515 516&pcie3x4 { 517 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 518 vpcie3v3-supply = <&vcc3v3_pcie30>; 519 status = "okay"; 520}; 521 522&pinctrl { 523 gpio-leds { 524 sys_led_pin: sys-led-pin { 525 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 526 }; 527 528 usr_led_pin: usr-led-pin { 529 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 530 }; 531 }; 532 533 headphone { 534 hp_det: hp-det { 535 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 536 }; 537 }; 538 539 hym8563 { 540 hym8563_int: hym8563-int { 541 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 542 }; 543 }; 544 545 ir-receiver { 546 ir_receiver_pin: ir-receiver-pin { 547 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 548 }; 549 }; 550 551 pcie { 552 pcie2_0_rst: pcie2-0-rst { 553 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 554 }; 555 556 pcie2_1_rst: pcie2-1-rst { 557 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 558 }; 559 560 pcie2_2_rst: pcie2-2-rst { 561 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 562 }; 563 564 pcie_m2_0_pwren: pcie-m20-pwren { 565 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 568 pcie_m2_1_pwren: pcie-m21-pwren { 569 rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 570 }; 571 }; 572 573 usb { 574 typec5v_pwren: typec5v-pwren { 575 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 576 }; 577 578 usbc0_int: usbc0-int { 579 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 580 }; 581 }; 582}; 583 584&pwm1 { 585 pinctrl-0 = <&pwm1m1_pins>; 586 status = "okay"; 587}; 588 589&saradc { 590 vref-supply = <&avcc_1v8_s0>; 591 status = "okay"; 592}; 593 594&sdhci { 595 bus-width = <8>; 596 no-sdio; 597 no-sd; 598 non-removable; 599 max-frequency = <200000000>; 600 mmc-hs400-1_8v; 601 mmc-hs400-enhanced-strobe; 602 status = "okay"; 603}; 604 605&sdmmc { 606 bus-width = <4>; 607 cap-mmc-highspeed; 608 cap-sd-highspeed; 609 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 610 disable-wp; 611 no-mmc; 612 no-sdio; 613 sd-uhs-sdr104; 614 vmmc-supply = <&vcc3v3_sd_s0>; 615 vqmmc-supply = <&vccio_sd_s0>; 616 status = "okay"; 617}; 618 619/* optional on non-LTS, populated on LTS version */ 620&sfc { 621 pinctrl-names = "default"; 622 pinctrl-0 = <&fspim1_pins>; 623 status = "okay"; 624 625 flash@0 { 626 compatible = "jedec,spi-nor"; 627 reg = <0>; 628 spi-max-frequency = <104000000>; 629 spi-rx-bus-width = <4>; 630 spi-tx-bus-width = <1>; 631 }; 632}; 633 634&spi2 { 635 status = "okay"; 636 assigned-clocks = <&cru CLK_SPI2>; 637 assigned-clock-rates = <200000000>; 638 pinctrl-names = "default"; 639 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 640 num-cs = <1>; 641 642 pmic@0 { 643 compatible = "rockchip,rk806"; 644 spi-max-frequency = <1000000>; 645 reg = <0x0>; 646 647 interrupt-parent = <&gpio0>; 648 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 649 650 pinctrl-names = "default"; 651 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 652 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 653 654 system-power-controller; 655 656 vcc1-supply = <&vcc4v0_sys>; 657 vcc2-supply = <&vcc4v0_sys>; 658 vcc3-supply = <&vcc4v0_sys>; 659 vcc4-supply = <&vcc4v0_sys>; 660 vcc5-supply = <&vcc4v0_sys>; 661 vcc6-supply = <&vcc4v0_sys>; 662 vcc7-supply = <&vcc4v0_sys>; 663 vcc8-supply = <&vcc4v0_sys>; 664 vcc9-supply = <&vcc4v0_sys>; 665 vcc10-supply = <&vcc4v0_sys>; 666 vcc11-supply = <&vcc_2v0_pldo_s3>; 667 vcc12-supply = <&vcc4v0_sys>; 668 vcc13-supply = <&vcc_1v1_nldo_s3>; 669 vcc14-supply = <&vcc_1v1_nldo_s3>; 670 vcca-supply = <&vcc4v0_sys>; 671 672 gpio-controller; 673 #gpio-cells = <2>; 674 675 rk806_dvs1_null: dvs1-null-pins { 676 pins = "gpio_pwrctrl1"; 677 function = "pin_fun0"; 678 }; 679 680 rk806_dvs2_null: dvs2-null-pins { 681 pins = "gpio_pwrctrl2"; 682 function = "pin_fun0"; 683 }; 684 685 rk806_dvs3_null: dvs3-null-pins { 686 pins = "gpio_pwrctrl3"; 687 function = "pin_fun0"; 688 }; 689 690 regulators { 691 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 692 regulator-boot-on; 693 regulator-min-microvolt = <550000>; 694 regulator-max-microvolt = <950000>; 695 regulator-ramp-delay = <12500>; 696 regulator-name = "vdd_gpu_s0"; 697 regulator-enable-ramp-delay = <400>; 698 699 regulator-state-mem { 700 regulator-off-in-suspend; 701 }; 702 }; 703 704 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 705 regulator-always-on; 706 regulator-boot-on; 707 regulator-min-microvolt = <550000>; 708 regulator-max-microvolt = <950000>; 709 regulator-ramp-delay = <12500>; 710 regulator-name = "vdd_cpu_lit_s0"; 711 712 regulator-state-mem { 713 regulator-off-in-suspend; 714 }; 715 }; 716 717 vdd_log_s0: dcdc-reg3 { 718 regulator-always-on; 719 regulator-boot-on; 720 regulator-min-microvolt = <675000>; 721 regulator-max-microvolt = <750000>; 722 regulator-ramp-delay = <12500>; 723 regulator-name = "vdd_log_s0"; 724 725 regulator-state-mem { 726 regulator-off-in-suspend; 727 regulator-suspend-microvolt = <750000>; 728 }; 729 }; 730 731 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 732 regulator-always-on; 733 regulator-boot-on; 734 regulator-min-microvolt = <550000>; 735 regulator-max-microvolt = <950000>; 736 regulator-ramp-delay = <12500>; 737 regulator-name = "vdd_vdenc_s0"; 738 739 regulator-state-mem { 740 regulator-off-in-suspend; 741 }; 742 }; 743 744 vdd_ddr_s0: dcdc-reg5 { 745 regulator-always-on; 746 regulator-boot-on; 747 regulator-min-microvolt = <675000>; 748 regulator-max-microvolt = <900000>; 749 regulator-ramp-delay = <12500>; 750 regulator-name = "vdd_ddr_s0"; 751 752 regulator-state-mem { 753 regulator-off-in-suspend; 754 regulator-suspend-microvolt = <850000>; 755 }; 756 }; 757 758 vdd2_ddr_s3: dcdc-reg6 { 759 regulator-always-on; 760 regulator-boot-on; 761 regulator-name = "vdd2_ddr_s3"; 762 763 regulator-state-mem { 764 regulator-on-in-suspend; 765 }; 766 }; 767 768 vcc_2v0_pldo_s3: dcdc-reg7 { 769 regulator-always-on; 770 regulator-boot-on; 771 regulator-min-microvolt = <2000000>; 772 regulator-max-microvolt = <2000000>; 773 regulator-ramp-delay = <12500>; 774 regulator-name = "vdd_2v0_pldo_s3"; 775 776 regulator-state-mem { 777 regulator-on-in-suspend; 778 regulator-suspend-microvolt = <2000000>; 779 }; 780 }; 781 782 vcc_3v3_s3: dcdc-reg8 { 783 regulator-always-on; 784 regulator-boot-on; 785 regulator-min-microvolt = <3300000>; 786 regulator-max-microvolt = <3300000>; 787 regulator-name = "vcc_3v3_s3"; 788 789 regulator-state-mem { 790 regulator-on-in-suspend; 791 regulator-suspend-microvolt = <3300000>; 792 }; 793 }; 794 795 vddq_ddr_s0: dcdc-reg9 { 796 regulator-always-on; 797 regulator-boot-on; 798 regulator-name = "vddq_ddr_s0"; 799 800 regulator-state-mem { 801 regulator-off-in-suspend; 802 }; 803 }; 804 805 vcc_1v8_s3: dcdc-reg10 { 806 regulator-always-on; 807 regulator-boot-on; 808 regulator-min-microvolt = <1800000>; 809 regulator-max-microvolt = <1800000>; 810 regulator-name = "vcc_1v8_s3"; 811 812 regulator-state-mem { 813 regulator-on-in-suspend; 814 regulator-suspend-microvolt = <1800000>; 815 }; 816 }; 817 818 avcc_1v8_s0: pldo-reg1 { 819 regulator-always-on; 820 regulator-boot-on; 821 regulator-min-microvolt = <1800000>; 822 regulator-max-microvolt = <1800000>; 823 regulator-name = "avcc_1v8_s0"; 824 825 regulator-state-mem { 826 regulator-off-in-suspend; 827 }; 828 }; 829 830 vcc_1v8_s0: pldo-reg2 { 831 regulator-always-on; 832 regulator-boot-on; 833 regulator-min-microvolt = <1800000>; 834 regulator-max-microvolt = <1800000>; 835 regulator-name = "vcc_1v8_s0"; 836 837 regulator-state-mem { 838 regulator-off-in-suspend; 839 regulator-suspend-microvolt = <1800000>; 840 }; 841 }; 842 843 avdd_1v2_s0: pldo-reg3 { 844 regulator-always-on; 845 regulator-boot-on; 846 regulator-min-microvolt = <1200000>; 847 regulator-max-microvolt = <1200000>; 848 regulator-name = "avdd_1v2_s0"; 849 850 regulator-state-mem { 851 regulator-off-in-suspend; 852 }; 853 }; 854 855 vcc_3v3_s0: pldo-reg4 { 856 regulator-always-on; 857 regulator-boot-on; 858 regulator-min-microvolt = <3300000>; 859 regulator-max-microvolt = <3300000>; 860 regulator-ramp-delay = <12500>; 861 regulator-name = "vcc_3v3_s0"; 862 863 regulator-state-mem { 864 regulator-off-in-suspend; 865 }; 866 }; 867 868 vccio_sd_s0: pldo-reg5 { 869 regulator-always-on; 870 regulator-boot-on; 871 regulator-min-microvolt = <1800000>; 872 regulator-max-microvolt = <3300000>; 873 regulator-ramp-delay = <12500>; 874 regulator-name = "vccio_sd_s0"; 875 876 regulator-state-mem { 877 regulator-off-in-suspend; 878 }; 879 }; 880 881 pldo6_s3: pldo-reg6 { 882 regulator-always-on; 883 regulator-boot-on; 884 regulator-min-microvolt = <1800000>; 885 regulator-max-microvolt = <1800000>; 886 regulator-name = "pldo6_s3"; 887 888 regulator-state-mem { 889 regulator-on-in-suspend; 890 regulator-suspend-microvolt = <1800000>; 891 }; 892 }; 893 894 vdd_0v75_s3: nldo-reg1 { 895 regulator-always-on; 896 regulator-boot-on; 897 regulator-min-microvolt = <750000>; 898 regulator-max-microvolt = <750000>; 899 regulator-name = "vdd_0v75_s3"; 900 901 regulator-state-mem { 902 regulator-on-in-suspend; 903 regulator-suspend-microvolt = <750000>; 904 }; 905 }; 906 907 vdd_ddr_pll_s0: nldo-reg2 { 908 regulator-always-on; 909 regulator-boot-on; 910 regulator-min-microvolt = <850000>; 911 regulator-max-microvolt = <850000>; 912 regulator-name = "vdd_ddr_pll_s0"; 913 914 regulator-state-mem { 915 regulator-off-in-suspend; 916 regulator-suspend-microvolt = <850000>; 917 }; 918 }; 919 920 avdd_0v75_s0: nldo-reg3 { 921 regulator-always-on; 922 regulator-boot-on; 923 regulator-min-microvolt = <750000>; 924 regulator-max-microvolt = <750000>; 925 regulator-name = "avdd_0v75_s0"; 926 927 regulator-state-mem { 928 regulator-off-in-suspend; 929 }; 930 }; 931 932 vdd_0v85_s0: nldo-reg4 { 933 regulator-always-on; 934 regulator-boot-on; 935 regulator-min-microvolt = <850000>; 936 regulator-max-microvolt = <850000>; 937 regulator-name = "vdd_0v85_s0"; 938 939 regulator-state-mem { 940 regulator-off-in-suspend; 941 }; 942 }; 943 944 vdd_0v75_s0: nldo-reg5 { 945 regulator-always-on; 946 regulator-boot-on; 947 regulator-min-microvolt = <750000>; 948 regulator-max-microvolt = <750000>; 949 regulator-name = "vdd_0v75_s0"; 950 951 regulator-state-mem { 952 regulator-off-in-suspend; 953 }; 954 }; 955 }; 956 }; 957}; 958 959&tsadc { 960 status = "okay"; 961}; 962 963&uart2 { 964 pinctrl-0 = <&uart2m0_xfer>; 965 status = "okay"; 966}; 967 968&u2phy0 { 969 status = "okay"; 970}; 971 972&u2phy0_otg { 973 status = "okay"; 974}; 975 976&u2phy2_host { 977 status = "okay"; 978}; 979 980&u2phy3_host { 981 status = "okay"; 982}; 983 984&u2phy2 { 985 status = "okay"; 986}; 987 988&u2phy3 { 989 status = "okay"; 990}; 991 992&usbdp_phy0 { 993 mode-switch; 994 orientation-switch; 995 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 996 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 997 status = "okay"; 998 999 port { 1000 #address-cells = <1>; 1001 #size-cells = <0>; 1002 1003 usbdp_phy0_typec_ss: endpoint@0 { 1004 reg = <0>; 1005 remote-endpoint = <&usbc0_ss>; 1006 }; 1007 1008 usbdp_phy0_typec_sbu: endpoint@1 { 1009 reg = <1>; 1010 remote-endpoint = <&usbc0_sbu>; 1011 }; 1012 }; 1013}; 1014 1015&usb_host0_ehci { 1016 status = "okay"; 1017}; 1018 1019&usb_host0_ohci { 1020 status = "okay"; 1021}; 1022 1023&usb_host0_xhci { 1024 dr_mode = "host"; 1025 status = "okay"; 1026 usb-role-switch; 1027 1028 port { 1029 usb_host0_xhci_drd_sw: endpoint { 1030 remote-endpoint = <&usbc0_hs>; 1031 }; 1032 }; 1033}; 1034 1035&usb_host1_ehci { 1036 status = "okay"; 1037}; 1038 1039&usb_host1_ohci { 1040 status = "okay"; 1041}; 1042