1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2023 Thomas McKahan 5 * Copyright (c) 2024 Sebastian Kropatsch 6 * 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/pinctrl/rockchip.h> 14#include <dt-bindings/soc/rockchip,vop2.h> 15#include <dt-bindings/usb/pd.h> 16#include "rk3588-friendlyelec-cm3588.dtsi" 17 18/ { 19 model = "FriendlyElec CM3588 NAS"; 20 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588"; 21 22 adc_key_recovery: adc-key-recovery { 23 compatible = "adc-keys"; 24 io-channels = <&saradc 1>; 25 io-channel-names = "buttons"; 26 keyup-threshold-microvolt = <1800000>; 27 poll-interval = <100>; 28 29 button-recovery { 30 label = "Recovery"; 31 linux,code = <KEY_VENDOR>; 32 press-threshold-microvolt = <17000>; 33 }; 34 }; 35 36 analog-sound { 37 compatible = "simple-audio-card"; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&headphone_detect>; 40 41 simple-audio-card,format = "i2s"; 42 simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; 43 simple-audio-card,mclk-fs = <256>; 44 simple-audio-card,name = "realtek,rt5616-codec"; 45 46 simple-audio-card,routing = 47 "Headphones", "HPOL", 48 "Headphones", "HPOR", 49 "MIC1", "Microphone Jack", 50 "Microphone Jack", "micbias1"; 51 simple-audio-card,widgets = 52 "Headphone", "Headphones", 53 "Microphone", "Microphone Jack"; 54 55 simple-audio-card,cpu { 56 sound-dai = <&i2s0_8ch>; 57 }; 58 59 simple-audio-card,codec { 60 sound-dai = <&rt5616>; 61 }; 62 }; 63 64 buzzer: pwm-beeper { 65 compatible = "pwm-beeper"; 66 amp-supply = <&vcc_5v0_sys>; 67 beeper-hz = <500>; 68 pwms = <&pwm8 0 500000 0>; 69 }; 70 71 fan: pwm-fan { 72 compatible = "pwm-fan"; 73 #cooling-cells = <2>; 74 cooling-levels = <0 50 80 120 160 220>; 75 fan-supply = <&vcc_5v0_sys>; 76 pwms = <&pwm1 0 50000 0>; 77 }; 78 79 gpio_keys: gpio-keys { 80 compatible = "gpio-keys"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&key1_pin>; 83 84 button-user { 85 debounce-interval = <50>; 86 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; 87 label = "User Button"; 88 linux,code = <BTN_1>; 89 wakeup-source; 90 }; 91 }; 92 93 hdmi0-con { 94 compatible = "hdmi-connector"; 95 type = "a"; 96 97 port { 98 hdmi0_con_in: endpoint { 99 remote-endpoint = <&hdmi0_out_con>; 100 }; 101 }; 102 }; 103 104 ir-receiver { 105 compatible = "gpio-ir-receiver"; 106 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; 107 }; 108 109 vcc_12v_dcin: regulator-vcc-12v-dcin { 110 compatible = "regulator-fixed"; 111 regulator-name = "vcc_12v_dcin"; 112 regulator-always-on; 113 regulator-boot-on; 114 regulator-min-microvolt = <12000000>; 115 regulator-max-microvolt = <12000000>; 116 }; 117 118 vcc_3v3_m2_a: regulator-vcc-3v3-m2-a { 119 compatible = "regulator-fixed"; 120 regulator-name = "vcc_3v3_m2_a"; 121 regulator-always-on; 122 regulator-boot-on; 123 regulator-min-microvolt = <3300000>; 124 regulator-max-microvolt = <3300000>; 125 vin-supply = <&vcc_12v_dcin>; 126 }; 127 128 vcc_3v3_m2_b: regulator-vcc-3v3-m2-b { 129 compatible = "regulator-fixed"; 130 regulator-name = "vcc_3v3_m2_b"; 131 regulator-always-on; 132 regulator-boot-on; 133 regulator-min-microvolt = <3300000>; 134 regulator-max-microvolt = <3300000>; 135 vin-supply = <&vcc_12v_dcin>; 136 }; 137 138 vcc_3v3_m2_c: regulator-vcc-3v3-m2-c { 139 compatible = "regulator-fixed"; 140 regulator-name = "vcc_3v3_m2_c"; 141 regulator-always-on; 142 regulator-boot-on; 143 regulator-min-microvolt = <3300000>; 144 regulator-max-microvolt = <3300000>; 145 vin-supply = <&vcc_12v_dcin>; 146 }; 147 148 vcc_3v3_m2_d: regulator-vcc-3v3-m2-d { 149 compatible = "regulator-fixed"; 150 regulator-name = "vcc_3v3_m2_d"; 151 regulator-always-on; 152 regulator-boot-on; 153 regulator-min-microvolt = <3300000>; 154 regulator-max-microvolt = <3300000>; 155 vin-supply = <&vcc_12v_dcin>; 156 }; 157 158 /* vcc_5v0_sys powers the peripherals */ 159 vcc_5v0_sys: regulator-vcc-5v0-sys { 160 compatible = "regulator-fixed"; 161 regulator-name = "vcc_5v0_sys"; 162 regulator-always-on; 163 regulator-boot-on; 164 regulator-min-microvolt = <5000000>; 165 regulator-max-microvolt = <5000000>; 166 vin-supply = <&vcc_12v_dcin>; 167 }; 168 169 /* SY6280AAC power switch (U14 in schematics) */ 170 vcc_5v0_host_20: regulator-vcc-5v0-host-20 { 171 compatible = "regulator-fixed"; 172 enable-active-high; 173 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&vcc_5v0_host20_en>; 176 regulator-name = "vcc_5v0_host_20"; 177 regulator-min-microvolt = <5000000>; 178 regulator-max-microvolt = <5000000>; 179 vin-supply = <&vcc_5v0_sys>; 180 }; 181 182 /* SY6280AAC power switch (U8 in schematics) */ 183 vcc_5v0_host_30_p1: regulator-vcc-5v0-host-30-p1 { 184 compatible = "regulator-fixed"; 185 enable-active-high; 186 gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&vcc_5v0_host30p1_en>; 189 regulator-name = "vcc_5v0_host_30_p1"; 190 regulator-min-microvolt = <5000000>; 191 regulator-max-microvolt = <5000000>; 192 vin-supply = <&vcc_5v0_sys>; 193 }; 194 195 /* SY6280AAC power switch (U9 in schematics) */ 196 vcc_5v0_host_30_p2: regulator-vcc-5v0-host-30-p2 { 197 compatible = "regulator-fixed"; 198 enable-active-high; 199 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; 200 pinctrl-names = "default"; 201 pinctrl-0 = <&vcc_5v0_host30p2_en>; 202 regulator-name = "vcc_5v0_host_30_p2"; 203 regulator-min-microvolt = <5000000>; 204 regulator-max-microvolt = <5000000>; 205 vin-supply = <&vcc_5v0_sys>; 206 }; 207 208 /* SY6280AAC power switch (U10 in schematics) */ 209 vbus_5v0_typec: regulator-vbus-5v0-typec { 210 compatible = "regulator-fixed"; 211 enable-active-high; 212 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&typec_5v_pwr_en>; 215 regulator-name = "vbus_5v0_typec"; 216 regulator-min-microvolt = <5000000>; 217 regulator-max-microvolt = <5000000>; 218 vin-supply = <&vcc_5v0_sys>; 219 }; 220}; 221 222/* vcc_4v0_sys powers the RK806 and RK860's */ 223&vcc_4v0_sys { 224 vin-supply = <&vcc_12v_dcin>; 225}; 226 227/* Combo PHY 1 is configured to act as as PCIe 2.0 PHY */ 228/* Used by PCIe controller 2 (pcie2x1l0) */ 229&combphy1_ps { 230 status = "okay"; 231}; 232 233/* Combo PHY 2 is configured to act as USB3 PHY */ 234/* Used by USB 3.0 OTG 2 controller (USB 3.0 Type-A port 2) */ 235/* CM3588 USB Controller Config Table: USB30 HOST2 */ 236&combphy2_psu { 237 status = "okay"; 238}; 239 240/* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */ 241/* Signal labels match the official CM3588 NAS SDK schematic revision 2309 */ 242&gpio0 { 243 gpio-line-names = 244 /* GPIO0 A0-A7 */ 245 "", "", "", "", 246 "MicroSD detect [SDMMC_DET_L]", "", "", "", 247 /* GPIO0 B0-B7 */ 248 "", "", "", "", 249 "", "", "", "", 250 /* GPIO0 C0-C7 */ 251 "", "", "", "", 252 "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "", 253 /* GPIO0 D0-D7 */ 254 "", "", "", "USB3 Type-C [CC_INT_L]", 255 "IR receiver [PWM3_IR_M0]", "User Button", "", ""; 256}; 257 258&gpio1 { 259 gpio-line-names = 260 /* GPIO1 A0-A7 */ 261 "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "", 262 "USB2 Type-A [USB2_PWREN]", "", "", "Pin 15", 263 /* GPIO1 B0-B7 */ 264 "Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4_TX_M2]", 265 "Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2_CLKOUT]", 266 /* GPIO1 C0-C7 */ 267 "", "", "", "", 268 "Headphone detect [HP_DET_L]", "", "", "", 269 /* GPIO1 D0-D7 */ 270 "", "", "USB3 Type-C [TYPEC5V_PWREN_H]", "5V Fan [PWM1_M1]", 271 "", "HDMI-in detect [HDMIIRX_DET_L]", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]"; 272}; 273 274&gpio2 { 275 gpio-line-names = 276 /* GPIO2 A0-A7 */ 277 "", "", "", "", 278 "", "", "SPI NOR Flash [FSPI_D0_M1]", "SPI NOR Flash [FSPI_D1_M1]", 279 /* GPIO2 B0-B7 */ 280 "SPI NOR Flash [FSPI_D2_M1]", "SPI NOR Flash [FSPI_D3_M1]", "", "SPI NOR Flash [FSPI_CLK_M1]", 281 "SPI NOR Flash [FSPI_CSN0_M1]", "", "", "", 282 /* GPIO2 C0-C7 */ 283 "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "", 284 "", "", "", "", 285 /* GPIO2 D0-D7 */ 286 "", "", "", "", 287 "", "", "", ""; 288}; 289 290&gpio3 { 291 gpio-line-names = 292 /* GPIO3 A0-A7 */ 293 "Pin 35 [SPI4_MISO_M1/PWM10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pin 36 [SPI4_CS0_M1/UART8_RX_M1]", 294 "Pin 37 [SPI4_CS1_M1]", "USB3-A #2 [USB3_2_PWREN]", "DSI-Pin 12 [LCD_RST]", "Buzzer [PWM8_M0]", 295 /* GPIO3 B0-B7 */ 296 "Pin 33 [PWM9_M0]", "DSI-Pin 10 [PWM2_M1/LCD_BL]", "Pin 07", "Pin 16", 297 "Pin 18", "Pin 29 [UART3_TX_M1/PWM12_M0]", "Pin 31 [UART3_RX_M1/PWM13_M0]", "Pin 12", 298 /* GPIO3 C0-C7 */ 299 "DSI-Pin 08 [TP_INT_L]", "DSI-Pin 14 [TP_RST_L]", "Pin 11 [PWM14_M0]", "Pin 13 [PWM15_IR_M0]", 300 "", "", "", "DSI-Pin 06 [I2C5_SCL_M0_TP]", 301 /* GPIO3 D0-D7 */ 302 "DSI-Pin 05 [I2C5_SDA_M0_TP]", "", "", "", 303 "", "", "", ""; 304}; 305 306&gpio4 { 307 gpio-line-names = 308 /* GPIO4 A0-A7 */ 309 "", "", "M.2 M-Key Slot4 [M2_D_PERST_L]", "", 310 "", "", "", "", 311 /* GPIO4 B0-B7 */ 312 "USB3-A #1 [USB3_TYPEC1_PWREN]", "", "", "M.2 M-Key Slot3 [M2_C_PERST_L]", 313 "M.2 M-Key Slot2 [M2_B_PERST_L]", "M.2 M-Key Slot1 [M2_A_CLKREQ_L]", "M.2 M-Key Slot1 [M2_A_PERST_L]", "", 314 /* GPIO4 C0-C7 */ 315 "", "", "", "", 316 "", "", "", "", 317 /* GPIO4 D0-D7 */ 318 "", "", "", "", 319 "", "", "", ""; 320}; 321 322&hdmi0 { 323 status = "okay"; 324}; 325 326&hdmi0_in { 327 hdmi0_in_vp0: endpoint { 328 remote-endpoint = <&vp0_out_hdmi0>; 329 }; 330}; 331 332&hdmi0_out { 333 hdmi0_out_con: endpoint { 334 remote-endpoint = <&hdmi0_con_in>; 335 }; 336}; 337 338&hdptxphy_hdmi0 { 339 status = "okay"; 340}; 341 342/* Connected to MIPI-DSI0 */ 343&i2c5 { 344 pinctrl-names = "default"; 345 pinctrl-0 = <&i2c5m0_xfer>; 346 status = "disabled"; 347}; 348 349&i2c6 { 350 fusb302: typec-portc@22 { 351 compatible = "fcs,fusb302"; 352 reg = <0x22>; 353 interrupt-parent = <&gpio0>; 354 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 355 pinctrl-names = "default"; 356 pinctrl-0 = <&usbc0_int>; 357 vbus-supply = <&vbus_5v0_typec>; 358 359 usb_con: connector { 360 compatible = "usb-c-connector"; 361 data-role = "dual"; 362 label = "USB-C"; 363 power-role = "source"; 364 source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; 365 try-power-role = "source"; 366 vbus-supply = <&vbus_5v0_typec>; 367 368 ports { 369 #address-cells = <1>; 370 #size-cells = <0>; 371 372 port@0 { 373 reg = <0>; 374 375 usbc0_orien_sw: endpoint { 376 remote-endpoint = <&usbdp_phy0_orientation_switch>; 377 }; 378 }; 379 380 port@1 { 381 reg = <1>; 382 383 usbc0_role_sw: endpoint { 384 remote-endpoint = <&dwc3_0_role_switch>; 385 }; 386 }; 387 388 port@2 { 389 reg = <2>; 390 391 dp_altmode_mux: endpoint { 392 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 393 }; 394 }; 395 }; 396 }; 397 }; 398}; 399 400/* Connected to MIPI-CSI1 */ 401/* &i2c7 */ 402 403/* GPIO Connector, connected to 40-pin GPIO header */ 404&i2c8 { 405 pinctrl-names = "default"; 406 pinctrl-0 = <&i2c8m2_xfer>; 407 status = "okay"; 408}; 409 410&pcie2x1l0 { 411 /* 2. M.2 socket, CON14: pcie30phy port0 lane1, @fe170000 */ 412 max-link-speed = <3>; 413 num-lanes = <1>; 414 phys = <&pcie30phy>; 415 pinctrl-names = "default"; 416 pinctrl-0 = <&pcie2_0_rst>; 417 reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; 418 vpcie3v3-supply = <&vcc_3v3_m2_b>; 419 status = "okay"; 420}; 421 422&pcie2x1l1 { 423 /* 4. M.2 socket, CON16: pcie30phy port1 lane1, @fe180000 */ 424 max-link-speed = <3>; 425 num-lanes = <1>; 426 phys = <&pcie30phy>; 427 pinctrl-names = "default"; 428 pinctrl-0 = <&pcie2_1_rst>; 429 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 430 vpcie3v3-supply = <&vcc_3v3_m2_d>; 431 status = "okay"; 432}; 433 434&pcie30phy { 435 /* 436 * Data lane mapping <1 3 2 4> = x1x1 x1x1 (bifurcation of both ports) 437 * port 0 lane 0 - always mapped to controller 0 (4L) 438 * port 0 lane 1 - map to controller 2 (1L0) 439 * port 1 lane 0 - map to controller 1 (2L) 440 * port 1 lane 1 - map to controller 3 (1L1) 441 */ 442 data-lanes = <1 3 2 4>; 443 status = "okay"; 444}; 445 446&pcie3x4 { 447 /* 1. M.2 socket, CON13: pcie30phy port0 lane0, @fe150000 */ 448 max-link-speed = <3>; 449 num-lanes = <1>; 450 pinctrl-names = "default"; 451 pinctrl-0 = <&pcie3x4_rst>; 452 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 453 vpcie3v3-supply = <&vcc_3v3_m2_a>; 454 status = "okay"; 455}; 456 457&pcie3x2 { 458 /* 3. M.2 socket, CON15: pcie30phy port1 lane0, @fe160000 */ 459 max-link-speed = <3>; 460 num-lanes = <1>; 461 pinctrl-names = "default"; 462 pinctrl-0 = <&pcie3x2_rst>; 463 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; 464 vpcie3v3-supply = <&vcc_3v3_m2_c>; 465 status = "okay"; 466}; 467 468&pinctrl { 469 audio { 470 headphone_detect: headphone-detect { 471 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 472 }; 473 }; 474 475 gpio-key { 476 key1_pin: key1-pin { 477 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; 478 }; 479 }; 480 481 pcie { 482 pcie2_0_rst: pcie2-0-rst { 483 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 484 }; 485 486 pcie2_1_rst: pcie2-1-rst { 487 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 488 }; 489 490 pcie3x2_rst: pcie3x2-rst { 491 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 492 }; 493 494 pcie3x4_rst: pcie3x4-rst { 495 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 496 }; 497 }; 498 499 usb { 500 vcc_5v0_host20_en: vcc-5v0-host20-en { 501 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 502 }; 503 504 vcc_5v0_host30p1_en: vcc-5v0-host30p1-en { 505 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 506 }; 507 508 vcc_5v0_host30p2_en: vcc-5v0-host30p2-en { 509 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 510 }; 511 }; 512 513 usb-typec { 514 usbc0_int: usbc0-int { 515 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 516 }; 517 518 typec_5v_pwr_en: typec-5v-pwr-en { 519 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 520 }; 521 }; 522}; 523 524/* Connected to 5V Fan */ 525&pwm1 { 526 pinctrl-names = "default"; 527 pinctrl-0 = <&pwm1m1_pins>; 528 status = "okay"; 529}; 530 531/* Connected to MIPI-DSI0 */ 532&pwm2 { 533 pinctrl-names = "default"; 534 pinctrl-0 = <&pwm2m1_pins>; 535}; 536 537/* Connected to IR Receiver */ 538&pwm3 { 539 pinctrl-names = "default"; 540 pinctrl-0 = <&pwm3m0_pins>; 541 status = "okay"; 542}; 543 544/* GPIO Connector, connected to 40-pin GPIO header */ 545/* Shared with UART0 */ 546&pwm4 { 547 pinctrl-names = "default"; 548 pinctrl-0 = <&pwm4m1_pins>; 549 status = "disabled"; 550}; 551 552/* GPIO Connector, connected to 40-pin GPIO header */ 553&pwm5 { 554 pinctrl-names = "default"; 555 pinctrl-0 = <&pwm5m1_pins>; 556 status = "okay"; 557}; 558 559/* Connected to Buzzer */ 560&pwm8 { 561 pinctrl-names = "default"; 562 pinctrl-0 = <&pwm8m0_pins>; 563 status = "okay"; 564}; 565 566/* GPIO Connector, connected to 40-pin GPIO header */ 567&pwm9 { 568 pinctrl-names = "default"; 569 pinctrl-0 = <&pwm9m0_pins>; 570 status = "okay"; 571}; 572 573/* GPIO Connector, connected to 40-pin GPIO header */ 574/* Shared with SPI4 */ 575&pwm10 { 576 pinctrl-names = "default"; 577 pinctrl-0 = <&pwm10m0_pins>; 578 status = "disabled"; 579}; 580 581/* GPIO Connector, connected to 40-pin GPIO header */ 582/* Shared with UART3 */ 583&pwm12 { 584 pinctrl-names = "default"; 585 pinctrl-0 = <&pwm12m0_pins>; 586 status = "disabled"; 587}; 588 589/* GPIO Connector, connected to 40-pin GPIO header */ 590/* Shared with UART3 */ 591&pwm13 { 592 pinctrl-names = "default"; 593 pinctrl-0 = <&pwm13m0_pins>; 594 status = "disabled"; 595}; 596 597/* GPIO Connector, connected to 40-pin GPIO header */ 598&pwm14 { 599 pinctrl-names = "default"; 600 pinctrl-0 = <&pwm14m0_pins>; 601 status = "okay"; 602}; 603 604/* GPIO Connector, connected to 40-pin GPIO header */ 605/* Optimized for infrared applications */ 606&pwm15 { 607 pinctrl-names = "default"; 608 pinctrl-0 = <&pwm15m0_pins>; 609 status = "disabled"; 610}; 611 612/* microSD card */ 613&sdmmc { 614 status = "okay"; 615}; 616 617/* GPIO Connector, connected to 40-pin GPIO header */ 618/* Shared with UART4, UART7 and PWM10 */ 619&spi0 { 620 num-cs = <1>; 621 pinctrl-names = "default"; 622 pinctrl-0 = <&spi0m2_cs0 &spi0m2_pins>; 623 status = "disabled"; 624}; 625 626/* GPIO Connector, connected to 40-pin GPIO header */ 627/* Shared with UART8 */ 628&spi4 { 629 num-cs = <1>; 630 pinctrl-names = "default"; 631 pinctrl-0 = <&spi4m1_cs0 &spi4m1_pins>; 632 status = "disabled"; 633}; 634 635/* GPIO Connector, connected to 40-pin GPIO header */ 636/* Shared with PWM4 */ 637&uart0 { 638 pinctrl-names = "default"; 639 pinctrl-0 = <&uart0m0_xfer>; 640 status = "disabled"; 641}; 642 643/* Debug UART */ 644&uart2 { 645 status = "okay"; 646}; 647 648/* GPIO Connector, connected to 40-pin GPIO header */ 649/* Shared with PWM12 and PWM13 */ 650&uart3 { 651 pinctrl-names = "default"; 652 pinctrl-0 = <&uart3m1_xfer>; 653 status = "disabled"; 654}; 655 656/* GPIO Connector, connected to 40-pin GPIO header */ 657/* Shared with SPI0 */ 658&uart4 { 659 pinctrl-names = "default"; 660 pinctrl-0 = <&uart4m2_xfer>; 661 status = "disabled"; 662}; 663 664/* GPIO Connector, connected to 40-pin GPIO header */ 665&uart6 { 666 pinctrl-names = "default"; 667 pinctrl-0 = <&uart6m1_xfer>; 668 status = "okay"; 669}; 670 671/* GPIO Connector, connected to 40-pin GPIO header */ 672/* Shared with SPI0 */ 673&uart7 { 674 pinctrl-names = "default"; 675 pinctrl-0 = <&uart7m2_xfer>; 676 status = "disabled"; 677}; 678 679/* GPIO Connector, connected to 40-pin GPIO header */ 680/* Shared with SPI4 */ 681&uart8 { 682 pinctrl-names = "default"; 683 pinctrl-0 = <&uart8m1_xfer>; 684 status = "disabled"; 685}; 686 687/* USB2 PHY for USB Type-C port */ 688/* CM3588 USB Controller Config Table: USB20 OTG0 */ 689&u2phy0 { 690 status = "okay"; 691}; 692 693&u2phy0_otg { 694 phy-supply = <&vbus_5v0_typec>; 695 status = "okay"; 696}; 697 698/* USB2 PHY for USB 3.0 Type-A port 1 */ 699/* CM3588 USB Controller Config Table: USB20 OTG1 */ 700&u2phy1 { 701 status = "okay"; 702}; 703 704&u2phy1_otg { 705 phy-supply = <&vcc_5v0_host_30_p1>; 706 status = "okay"; 707}; 708 709/* USB2 PHY for USB 2.0 Type-A */ 710/* CM3588 USB Controller Config Table: USB20 HOST0 */ 711&u2phy2 { 712 status = "okay"; 713}; 714 715&u2phy2_host { 716 phy-supply = <&vcc_5v0_host_20>; 717 status = "okay"; 718}; 719 720/* USB2 PHY for USB 3.0 Type-A port 2 */ 721/* CM3588 USB Controller Config Table: USB20 HOST1 */ 722&u2phy3 { 723 status = "okay"; 724}; 725 726&u2phy3_host { 727 phy-supply = <&vcc_5v0_host_30_p2>; 728 status = "okay"; 729}; 730 731/* USB 2.0 Type-A */ 732/* PHY: <&u2phy2_host> */ 733&usb_host0_ehci { 734 status = "okay"; 735}; 736 737/* USB 2.0 Type-A */ 738/* PHY: <&u2phy2_host> */ 739&usb_host0_ohci { 740 status = "okay"; 741}; 742 743/* USB Type-C */ 744/* PHYs: <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3> */ 745&usb_host0_xhci { 746 usb-role-switch; 747 status = "okay"; 748 749 port { 750 dwc3_0_role_switch: endpoint { 751 remote-endpoint = <&usbc0_role_sw>; 752 }; 753 }; 754}; 755 756/* Lower USB 3.0 Type-A (port 2) */ 757/* PHY: <&u2phy3_host> */ 758&usb_host1_ehci { 759 status = "okay"; 760}; 761 762/* Lower USB 3.0 Type-A (port 2) */ 763/* PHY: <&u2phy3_host> */ 764&usb_host1_ohci { 765 status = "okay"; 766}; 767 768/* Upper USB 3.0 Type-A (port 1) */ 769/* PHYs: <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3> */ 770&usb_host1_xhci { 771 dr_mode = "host"; 772 status = "okay"; 773}; 774 775/* Lower USB 3.0 Type-A (port 2) */ 776/* PHYs: <&combphy2_psu PHY_TYPE_USB3> */ 777&usb_host2_xhci { 778 status = "okay"; 779}; 780 781/* USB3 PHY for USB Type-C port */ 782/* CM3588 USB Controller Config Table: USB30 OTG0 */ 783&usbdp_phy0 { 784 mode-switch; 785 orientation-switch; 786 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 787 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 788 status = "okay"; 789 790 port { 791 #address-cells = <1>; 792 #size-cells = <0>; 793 794 usbdp_phy0_orientation_switch: endpoint@0 { 795 reg = <0>; 796 remote-endpoint = <&usbc0_orien_sw>; 797 }; 798 799 usbdp_phy0_dp_altmode_mux: endpoint@1 { 800 reg = <1>; 801 remote-endpoint = <&dp_altmode_mux>; 802 }; 803 }; 804}; 805 806/* USB3 PHY for USB 3.0 Type-A port 1 */ 807/* CM3588 USB Controller Config Table: USB30 OTG1 */ 808&usbdp_phy1 { 809 status = "okay"; 810}; 811 812&vop { 813 status = "okay"; 814}; 815 816&vop_mmu { 817 status = "okay"; 818}; 819 820&vp0 { 821 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 822 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 823 remote-endpoint = <&hdmi0_in_vp0>; 824 }; 825}; 826