1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. 4 * 5 * DT-overlay for Edgeble On-SoM WiFi6/BT M.2 1216 modules, 6 * - AW-XM548NF 7 * - Intel 8260D2W 8 */ 9 10/dts-v1/; 11/plugin/; 12 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/pinctrl/rockchip.h> 15 16&{/} { 17 vcc3v3_pcie2x1l1: vcc3v3-pcie2x1l1-regulator { 18 compatible = "regulator-fixed"; 19 enable-active-high; 20 gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; /* WIFI_3V3_EN */ 21 pinctrl-names = "default"; 22 pinctrl-0 = <&pcie2_1_vcc3v3_en>; 23 regulator-name = "vcc3v3_pcie2x1l1"; 24 regulator-always-on; 25 regulator-boot-on; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; 28 startup-delay-us = <50000>; 29 vin-supply = <&vcc5v0_sys>; 30 }; 31}; 32 33&combphy2_psu { 34 status = "okay"; 35}; 36 37/* WiFi6 */ 38&pcie2x1l1 { 39 pinctrl-names = "default"; 40 pinctrl-0 = <&pcie2_1_rst>; 41 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; /* PCIE20_2_WIFI_PERSTn */ 42 vpcie3v3-supply = <&vcc3v3_pcie2x1l1>; 43 status = "okay"; 44}; 45 46&pinctrl { 47 pcie2 { 48 pcie2_1_rst: pcie2-1-rst { 49 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 50 }; 51 52 pcie2_1_vcc3v3_en: pcie2-1-vcc-en { 53 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 54 }; 55 }; 56}; 57