xref: /linux/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi (revision eb01fe7abbe2d0b38824d2a93fdb4cc3eaf2ccc1)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7
8/ {
9	chosen {
10		stdout-path = "serial2:1500000n8";
11	};
12
13	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
14		compatible = "regulator-fixed";
15		regulator-name = "vcc3v3_pcie2x1l0";
16		regulator-min-microvolt = <3300000>;
17		regulator-max-microvolt = <3300000>;
18		startup-delay-us = <5000>;
19		vin-supply = <&vcc_3v3_s3>;
20	};
21
22	vcc3v3_pcie3x2: vcc3v3-pcie3x2-regulator {
23		compatible = "regulator-fixed";
24		enable-active-high;
25		gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; /* PCIE_4G_PWEN */
26		pinctrl-names = "default";
27		pinctrl-0 = <&pcie3x2_vcc3v3_en>;
28		regulator-name = "vcc3v3_pcie3x2";
29		regulator-min-microvolt = <3300000>;
30		regulator-max-microvolt = <3300000>;
31		startup-delay-us = <5000>;
32		vin-supply = <&vcc5v0_sys>;
33	};
34
35	vcc3v3_pcie3x4: vcc3v3-pcie3x4-regulator {
36		compatible = "regulator-fixed";
37		enable-active-high;
38		gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; /* PCIE30x4_PWREN_H */
39		pinctrl-names = "default";
40		pinctrl-0 = <&pcie3x4_vcc3v3_en>;
41		regulator-name = "vcc3v3_pcie3x4";
42		regulator-min-microvolt = <3300000>;
43		regulator-max-microvolt = <3300000>;
44		startup-delay-us = <5000>;
45		vin-supply = <&vcc5v0_sys>;
46	};
47
48	vcc5v0_host: vcc5v0-host-regulator {
49		compatible = "regulator-fixed";
50		enable-active-high;
51		gpio = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
52		pinctrl-names = "default";
53		pinctrl-0 = <&vcc5v0_host_en>;
54		regulator-name = "vcc5v0_host";
55		regulator-min-microvolt = <5000000>;
56		regulator-max-microvolt = <5000000>;
57		regulator-boot-on;
58		regulator-always-on;
59		vin-supply = <&vcc5v0_sys>;
60	};
61};
62
63&combphy0_ps {
64	status = "okay";
65};
66
67&combphy1_ps {
68	status = "okay";
69};
70
71&i2c6 {
72	status = "okay";
73
74	hym8563: rtc@51 {
75		compatible = "haoyu,hym8563";
76		reg = <0x51>;
77		interrupt-parent = <&gpio0>;
78		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
79		#clock-cells = <0>;
80		clock-output-names = "hym8563";
81		pinctrl-names = "default";
82		pinctrl-0 = <&hym8563_int>;
83		wakeup-source;
84	};
85};
86
87/* ETH */
88&pcie2x1l0 {
89	pinctrl-names = "default";
90	pinctrl-0 = <&pcie2_0_rst>;
91	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; /* PCIE20_1_PERST_L */
92	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
93	status = "okay";
94};
95
96&pcie30phy {
97	status = "okay";
98};
99
100/* B-Key and E-Key */
101&pcie3x2 {
102	pinctrl-names = "default";
103	pinctrl-0 = <&pcie3x2_rst>;
104	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTn_M1_L */
105	vpcie3v3-supply = <&vcc3v3_pcie3x2>;
106	status = "okay";
107};
108
109/* M-Key */
110&pcie3x4 {
111	pinctrl-names = "default";
112	pinctrl-0 = <&pcie3x4_rst>;
113	reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* PCIE30X2_PERSTn_M1_L */
114	vpcie3v3-supply = <&vcc3v3_pcie3x4>;
115	status = "okay";
116};
117
118&pinctrl {
119	pcie2 {
120		pcie2_0_rst: pcie2-0-rst {
121			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
122		};
123	};
124
125	pcie3 {
126		pcie3x2_rst: pcie3x2-rst {
127			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
128		};
129
130		pcie3x2_vcc3v3_en: pcie3x2-vcc3v3-en {
131			rockchip,pins = <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
132		};
133
134		pcie3x4_rst: pcie3x4-rst {
135			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
136		};
137
138		pcie3x4_vcc3v3_en: pcie3x4-vcc3v3-en {
139			rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
140		};
141	};
142
143	hym8563 {
144		hym8563_int: hym8563-int {
145			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
146		};
147	};
148
149	usb {
150		vcc5v0_host_en: vcc5v0-host-en {
151			rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
152		};
153	};
154};
155
156/* FAN */
157&pwm2 {
158	pinctrl-0 = <&pwm2m1_pins>;
159	pinctrl-names = "default";
160	status = "okay";
161};
162
163&sata0 {
164	status = "okay";
165};
166
167&sdmmc {
168	bus-width = <4>;
169	cap-mmc-highspeed;
170	cap-sd-highspeed;
171	disable-wp;
172	no-sdio;
173	no-mmc;
174	sd-uhs-sdr104;
175	vmmc-supply = <&vcc_3v3_s3>;
176	vqmmc-supply = <&vccio_sd_s0>;
177	status = "okay";
178};
179
180&uart2 {
181	pinctrl-0 = <&uart2m0_xfer>;
182	status = "okay";
183};
184
185/* RS232 */
186&uart6 {
187	pinctrl-0 = <&uart6m0_xfer>;
188	pinctrl-names = "default";
189	status = "okay";
190};
191
192/* RS485 */
193&uart7 {
194	pinctrl-0 = <&uart7m2_xfer>;
195	pinctrl-names = "default";
196	status = "okay";
197};
198
199&u2phy2 {
200	status = "okay";
201};
202
203&u2phy2_host {
204	/* connected to USB hub, which is powered by vcc5v0_sys */
205	phy-supply = <&vcc5v0_sys>;
206	status = "okay";
207};
208
209&u2phy3 {
210	status = "okay";
211};
212
213&u2phy3_host {
214	phy-supply = <&vcc5v0_host>;
215	status = "okay";
216};
217
218&usb_host0_ehci {
219	status = "okay";
220};
221
222&usb_host0_ohci {
223	status = "okay";
224};
225
226&usb_host1_ehci {
227	status = "okay";
228};
229
230&usb_host1_ohci {
231	status = "okay";
232};
233