xref: /linux/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/pwm/pwm.h>
11#include <dt-bindings/pinctrl/rockchip.h>
12#include "rk3588.dtsi"
13
14/ {
15	compatible = "coolpi,pi-cm5", "rockchip,rk3588";
16
17	aliases {
18		mmc0 = &sdhci;
19		mmc1 = &sdmmc;
20		mmc2 = &sdio;
21		serial2 = &uart2;
22	};
23
24	analog-sound {
25		compatible = "audio-graph-card";
26		dais = <&i2s0_8ch_p0>;
27		label = "rk3588-es8316";
28		routing = "MIC2", "Mic Jack",
29			  "Headphones", "HPOL",
30			  "Headphones", "HPOR";
31		widgets = "Microphone", "Mic Jack",
32			  "Headphone", "Headphones";
33	};
34
35	chosen {
36		stdout-path = "serial2:1500000n8";
37	};
38
39	avdd0v85_pcie20: avdd0v85-pcie20-regulator {
40		compatible = "regulator-fixed";
41		regulator-name = "avdd0v85_pcie20";
42		regulator-boot-on;
43		regulator-always-on;
44		regulator-min-microvolt = <850000>;
45		regulator-max-microvolt = <850000>;
46		vin-supply = <&vdd_0v85_s0>;
47	};
48
49	avdd1v8_pcie20: avdd1v8-pcie20-regulator {
50		compatible = "regulator-fixed";
51		regulator-name = "avdd1v8_pcie20";
52		regulator-boot-on;
53		regulator-always-on;
54		regulator-min-microvolt = <1800000>;
55		regulator-max-microvolt = <1800000>;
56		vin-supply = <&avcc_1v8_s0>;
57	};
58
59	avdd0v75_pcie30: avdd0v75-pcie30-regulator {
60		compatible = "regulator-fixed";
61		regulator-name = "avdd0v75_pcie30";
62		regulator-boot-on;
63		regulator-always-on;
64		regulator-min-microvolt = <750000>;
65		regulator-max-microvolt = <750000>;
66		vin-supply = <&avdd_0v75_s0>;
67	};
68
69	pcie30_avdd1v8: avdd1v8-pcie30-regulator {
70		compatible = "regulator-fixed";
71		regulator-name = "pcie30_avdd1v8";
72		regulator-boot-on;
73		regulator-always-on;
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <1800000>;
76		vin-supply = <&avcc_1v8_s0>;
77	};
78};
79
80&combphy0_ps {
81	status = "okay";
82};
83
84&combphy1_ps {
85	status = "okay";
86};
87
88&combphy2_psu {
89	status = "okay";
90};
91
92&cpu_b0 {
93	cpu-supply = <&vdd_cpu_big0_s0>;
94};
95
96&cpu_b1 {
97	cpu-supply = <&vdd_cpu_big0_s0>;
98};
99
100&cpu_b2 {
101	cpu-supply = <&vdd_cpu_big1_s0>;
102};
103
104&cpu_b3 {
105	cpu-supply = <&vdd_cpu_big1_s0>;
106};
107
108&cpu_l0 {
109	cpu-supply = <&vdd_cpu_lit_s0>;
110};
111
112&cpu_l1 {
113	cpu-supply = <&vdd_cpu_lit_s0>;
114};
115
116&cpu_l2 {
117	cpu-supply = <&vdd_cpu_lit_s0>;
118};
119
120&cpu_l3 {
121	cpu-supply = <&vdd_cpu_lit_s0>;
122};
123
124&gmac0 {
125	clock_in_out = "output";
126	phy-handle = <&rgmii_phy>;
127	phy-mode = "rgmii-rxid";
128	pinctrl-0 = <&gmac0_miim
129		     &gmac0_tx_bus2
130		     &gmac0_rx_bus2
131		     &gmac0_rgmii_clk
132		     &gmac0_rgmii_bus>;
133	pinctrl-names = "default";
134	rx_delay = <0x00>;
135	tx_delay = <0x43>;
136	status = "okay";
137};
138
139&gpu {
140	mali-supply = <&vdd_gpu_s0>;
141	status = "okay";
142};
143
144&i2c0 {
145	pinctrl-0 = <&i2c0m2_xfer>;
146	status = "okay";
147
148	vdd_cpu_big0_s0: regulator@42 {
149		compatible = "rockchip,rk8602";
150		reg = <0x42>;
151		fcs,suspend-voltage-selector = <1>;
152		regulator-name = "vdd_cpu_big0_s0";
153		regulator-always-on;
154		regulator-boot-on;
155		regulator-min-microvolt = <550000>;
156		regulator-max-microvolt = <1050000>;
157		regulator-ramp-delay = <2300>;
158		vin-supply = <&vcc5v0_sys>;
159
160		regulator-state-mem {
161			regulator-off-in-suspend;
162		};
163	};
164
165	vdd_cpu_big1_s0: regulator@43 {
166		compatible = "rockchip,rk8603", "rockchip,rk8602";
167		reg = <0x43>;
168		fcs,suspend-voltage-selector = <1>;
169		regulator-name = "vdd_cpu_big1_s0";
170		regulator-always-on;
171		regulator-boot-on;
172		regulator-min-microvolt = <550000>;
173		regulator-max-microvolt = <1050000>;
174		regulator-ramp-delay = <2300>;
175		vin-supply = <&vcc5v0_sys>;
176
177		regulator-state-mem {
178			regulator-off-in-suspend;
179		};
180	};
181};
182
183&i2c2 {
184	status = "okay";
185
186	vdd_npu_s0: regulator@42 {
187		compatible = "rockchip,rk8602";
188		reg = <0x42>;
189		fcs,suspend-voltage-selector = <1>;
190		regulator-name = "vdd_npu_s0";
191		regulator-always-on;
192		regulator-boot-on;
193		regulator-min-microvolt = <550000>;
194		regulator-max-microvolt = <950000>;
195		regulator-ramp-delay = <2300>;
196		vin-supply = <&vcc5v0_sys>;
197
198		regulator-state-mem {
199			regulator-off-in-suspend;
200		};
201	};
202};
203
204&i2c6 {
205	status = "okay";
206
207	hym8563: rtc@51 {
208		compatible = "haoyu,hym8563";
209		reg = <0x51>;
210		interrupt-parent = <&gpio0>;
211		interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
212		#clock-cells = <0>;
213		clock-output-names = "hym8563";
214		pinctrl-names = "default";
215		pinctrl-0 = <&hym8563_int>;
216		wakeup-source;
217	};
218};
219
220&i2c7 {
221	pinctrl-0 = <&i2c7m0_xfer>;
222	status = "okay";
223
224	es8316: audio-codec@10 {
225		compatible = "everest,es8316";
226		reg = <0x10>;
227		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
228		assigned-clock-rates = <12288000>;
229		clocks = <&cru I2S0_8CH_MCLKOUT>;
230		clock-names = "mclk";
231		#sound-dai-cells = <0>;
232
233		port {
234			es8316_p0_0: endpoint {
235				remote-endpoint = <&i2s0_8ch_p0_0>;
236			};
237		};
238	};
239};
240
241&i2s0_8ch {
242	pinctrl-0 = <&i2s0_lrck
243		     &i2s0_mclk
244		     &i2s0_sclk
245		     &i2s0_sdi0
246		     &i2s0_sdo0>;
247	status = "okay";
248
249	i2s0_8ch_p0: port {
250		i2s0_8ch_p0_0: endpoint {
251			dai-format = "i2s";
252			mclk-fs = <256>;
253			remote-endpoint = <&es8316_p0_0>;
254		};
255	};
256};
257
258&mdio0 {
259	rgmii_phy: ethernet-phy@1 {
260		/* YT8531C/H */
261		compatible = "ethernet-phy-ieee802.3-c22";
262		reg = <0x1>;
263		pinctrl-names = "default";
264		pinctrl-0 = <&yt8531_rst>;
265		reset-assert-us = <20000>;
266		reset-deassert-us = <100000>;
267		reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
268	};
269};
270
271/* ethernet */
272&pcie2x1l2 {
273	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
274	vpcie3v3-supply = <&vcc3v3_sys>;
275	pinctrl-names = "default";
276	pinctrl-0 = <&yt6801_isolate>;
277	status = "okay";
278};
279
280&pinctrl {
281	hym8563 {
282		hym8563_int: hym8563-int {
283			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
284		};
285	};
286
287	yt6801 {
288		yt6801_isolate: yt6801-isolate {
289			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
290		};
291	};
292
293	yt8531 {
294		yt8531_rst: yt8531-rst {
295			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
296		};
297	};
298};
299
300&saradc {
301	vref-supply = <&vcc_1v8_s0>;
302	status = "okay";
303};
304
305&sdhci {
306	bus-width = <8>;
307	max-frequency = <200000000>;
308	mmc-hs400-1_8v;
309	mmc-hs400-enhanced-strobe;
310	no-sdio;
311	no-sd;
312	non-removable;
313	status = "okay";
314};
315
316&sdmmc {
317	bus-width = <4>;
318	cap-mmc-highspeed;
319	cap-sd-highspeed;
320	disable-wp;
321	max-frequency = <150000000>;
322	no-sdio;
323	no-mmc;
324	sd-uhs-sdr104;
325	vqmmc-supply = <&vccio_sd_s0>;
326	status = "okay";
327};
328
329&spi2 {
330	assigned-clocks = <&cru CLK_SPI2>;
331	assigned-clock-rates = <200000000>;
332	num-cs = <1>;
333	pinctrl-names = "default";
334	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
335	status = "okay";
336
337	pmic@0 {
338		compatible = "rockchip,rk806";
339		reg = <0x0>;
340		interrupt-parent = <&gpio0>;
341		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
342		gpio-controller;
343		#gpio-cells = <2>;
344		pinctrl-names = "default";
345		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
346			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
347		spi-max-frequency = <1000000>;
348		vcc1-supply = <&vcc5v0_sys>;
349		vcc2-supply = <&vcc5v0_sys>;
350		vcc3-supply = <&vcc5v0_sys>;
351		vcc4-supply = <&vcc5v0_sys>;
352		vcc5-supply = <&vcc5v0_sys>;
353		vcc6-supply = <&vcc5v0_sys>;
354		vcc7-supply = <&vcc5v0_sys>;
355		vcc8-supply = <&vcc5v0_sys>;
356		vcc9-supply = <&vcc5v0_sys>;
357		vcc10-supply = <&vcc5v0_sys>;
358		vcc11-supply = <&vcc_2v0_pldo_s3>;
359		vcc12-supply = <&vcc5v0_sys>;
360		vcc13-supply = <&vcc_2v0_pldo_s3>;
361		vcc14-supply = <&vcc_2v0_pldo_s3>;
362		vcca-supply = <&vcc5v0_sys>;
363
364		rk806_dvs1_null: dvs1-null-pins {
365			pins = "gpio_pwrctrl1";
366			function = "pin_fun0";
367		};
368
369		rk806_dvs2_null: dvs2-null-pins {
370			pins = "gpio_pwrctrl2";
371			function = "pin_fun0";
372		};
373
374		rk806_dvs3_null: dvs3-null-pins {
375			pins = "gpio_pwrctrl3";
376			function = "pin_fun0";
377		};
378
379		regulators {
380			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
381				regulator-boot-on;
382				regulator-min-microvolt = <550000>;
383				regulator-max-microvolt = <950000>;
384				regulator-ramp-delay = <12500>;
385				regulator-name = "vdd_gpu_s0";
386				regulator-enable-ramp-delay = <400>;
387
388				regulator-state-mem {
389					regulator-off-in-suspend;
390				};
391			};
392
393			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
394				regulator-always-on;
395				regulator-boot-on;
396				regulator-min-microvolt = <550000>;
397				regulator-max-microvolt = <950000>;
398				regulator-ramp-delay = <12500>;
399				regulator-name = "vdd_cpu_lit_s0";
400
401				regulator-state-mem {
402					regulator-off-in-suspend;
403				};
404			};
405
406			vdd_log_s0: dcdc-reg3 {
407				regulator-always-on;
408				regulator-boot-on;
409				regulator-min-microvolt = <675000>;
410				regulator-max-microvolt = <750000>;
411				regulator-ramp-delay = <12500>;
412				regulator-name = "vdd_log_s0";
413
414				regulator-state-mem {
415					regulator-off-in-suspend;
416					regulator-suspend-microvolt = <750000>;
417				};
418			};
419
420			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
421				regulator-always-on;
422				regulator-boot-on;
423				regulator-min-microvolt = <550000>;
424				regulator-max-microvolt = <950000>;
425				regulator-ramp-delay = <12500>;
426				regulator-name = "vdd_vdenc_s0";
427
428				regulator-state-mem {
429					regulator-off-in-suspend;
430				};
431			};
432
433			vdd_ddr_s0: dcdc-reg5 {
434				regulator-always-on;
435				regulator-boot-on;
436				regulator-min-microvolt = <675000>;
437				regulator-max-microvolt = <900000>;
438				regulator-ramp-delay = <12500>;
439				regulator-name = "vdd_ddr_s0";
440
441				regulator-state-mem {
442					regulator-off-in-suspend;
443					regulator-suspend-microvolt = <850000>;
444				};
445			};
446
447			vdd2_ddr_s3: dcdc-reg6 {
448				regulator-always-on;
449				regulator-boot-on;
450				regulator-name = "vdd2_ddr_s3";
451
452				regulator-state-mem {
453					regulator-on-in-suspend;
454				};
455			};
456
457			vcc_2v0_pldo_s3: dcdc-reg7 {
458				regulator-always-on;
459				regulator-boot-on;
460				regulator-min-microvolt = <2000000>;
461				regulator-max-microvolt = <2000000>;
462				regulator-ramp-delay = <12500>;
463				regulator-name = "vdd_2v0_pldo_s3";
464
465				regulator-state-mem {
466					regulator-on-in-suspend;
467					regulator-suspend-microvolt = <2000000>;
468				};
469			};
470
471			vcc_3v3_s3: dcdc-reg8 {
472				regulator-always-on;
473				regulator-boot-on;
474				regulator-min-microvolt = <3300000>;
475				regulator-max-microvolt = <3300000>;
476				regulator-name = "vcc_3v3_s3";
477
478				regulator-state-mem {
479					regulator-on-in-suspend;
480					regulator-suspend-microvolt = <3300000>;
481				};
482			};
483
484			vddq_ddr_s0: dcdc-reg9 {
485				regulator-always-on;
486				regulator-boot-on;
487				regulator-name = "vddq_ddr_s0";
488
489				regulator-state-mem {
490					regulator-off-in-suspend;
491				};
492			};
493
494			vcc_1v8_s3: dcdc-reg10 {
495				regulator-always-on;
496				regulator-boot-on;
497				regulator-min-microvolt = <1800000>;
498				regulator-max-microvolt = <1800000>;
499				regulator-name = "vcc_1v8_s3";
500
501				regulator-state-mem {
502					regulator-on-in-suspend;
503					regulator-suspend-microvolt = <1800000>;
504				};
505			};
506
507			avcc_1v8_s0: pldo-reg1 {
508				regulator-always-on;
509				regulator-boot-on;
510				regulator-min-microvolt = <1800000>;
511				regulator-max-microvolt = <1800000>;
512				regulator-name = "avcc_1v8_s0";
513
514				regulator-state-mem {
515					regulator-off-in-suspend;
516				};
517			};
518
519			vcc_1v8_s0: pldo-reg2 {
520				regulator-always-on;
521				regulator-boot-on;
522				regulator-min-microvolt = <1800000>;
523				regulator-max-microvolt = <1800000>;
524				regulator-name = "vcc_1v8_s0";
525
526				regulator-state-mem {
527					regulator-off-in-suspend;
528					regulator-suspend-microvolt = <1800000>;
529				};
530			};
531
532			avdd_1v2_s0: pldo-reg3 {
533				regulator-always-on;
534				regulator-boot-on;
535				regulator-min-microvolt = <1200000>;
536				regulator-max-microvolt = <1200000>;
537				regulator-name = "avdd_1v2_s0";
538
539				regulator-state-mem {
540					regulator-off-in-suspend;
541				};
542			};
543
544			vcc_3v3_s0: pldo-reg4 {
545				regulator-always-on;
546				regulator-boot-on;
547				regulator-min-microvolt = <3300000>;
548				regulator-max-microvolt = <3300000>;
549				regulator-ramp-delay = <12500>;
550				regulator-name = "vcc_3v3_s0";
551
552				regulator-state-mem {
553					regulator-off-in-suspend;
554				};
555			};
556
557			vccio_sd_s0: pldo-reg5 {
558				regulator-always-on;
559				regulator-boot-on;
560				regulator-min-microvolt = <1800000>;
561				regulator-max-microvolt = <3300000>;
562				regulator-ramp-delay = <12500>;
563				regulator-name = "vccio_sd_s0";
564
565				regulator-state-mem {
566					regulator-off-in-suspend;
567				};
568			};
569
570			pldo6_s3: pldo-reg6 {
571				regulator-always-on;
572				regulator-boot-on;
573				regulator-min-microvolt = <1800000>;
574				regulator-max-microvolt = <1800000>;
575				regulator-name = "pldo6_s3";
576
577				regulator-state-mem {
578					regulator-on-in-suspend;
579					regulator-suspend-microvolt = <1800000>;
580				};
581			};
582
583			vdd_0v75_s3: nldo-reg1 {
584				regulator-always-on;
585				regulator-boot-on;
586				regulator-min-microvolt = <750000>;
587				regulator-max-microvolt = <750000>;
588				regulator-name = "vdd_0v75_s3";
589
590				regulator-state-mem {
591					regulator-on-in-suspend;
592					regulator-suspend-microvolt = <750000>;
593				};
594			};
595
596			vdd_ddr_pll_s0: nldo-reg2 {
597				regulator-always-on;
598				regulator-boot-on;
599				regulator-min-microvolt = <850000>;
600				regulator-max-microvolt = <850000>;
601				regulator-name = "vdd_ddr_pll_s0";
602
603				regulator-state-mem {
604					regulator-off-in-suspend;
605					regulator-suspend-microvolt = <850000>;
606				};
607			};
608
609			avdd_0v75_s0: nldo-reg3 {
610				regulator-always-on;
611				regulator-boot-on;
612				regulator-min-microvolt = <750000>;
613				regulator-max-microvolt = <750000>;
614				regulator-name = "avdd_0v75_s0";
615
616				regulator-state-mem {
617					regulator-off-in-suspend;
618				};
619			};
620
621			vdd_0v85_s0: nldo-reg4 {
622				regulator-always-on;
623				regulator-boot-on;
624				regulator-min-microvolt = <850000>;
625				regulator-max-microvolt = <850000>;
626				regulator-name = "vdd_0v85_s0";
627
628				regulator-state-mem {
629					regulator-off-in-suspend;
630				};
631			};
632
633			vdd_0v75_s0: nldo-reg5 {
634				regulator-always-on;
635				regulator-boot-on;
636				regulator-min-microvolt = <750000>;
637				regulator-max-microvolt = <750000>;
638				regulator-name = "vdd_0v75_s0";
639
640				regulator-state-mem {
641					regulator-off-in-suspend;
642				};
643			};
644		};
645	};
646};
647
648&tsadc {
649	status = "okay";
650};
651
652&uart2 {
653	pinctrl-0 = <&uart2m0_xfer>;
654	status = "okay";
655};
656