1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/soc/rockchip,vop2.h> 11#include "rk3588-coolpi-cm5.dtsi" 12 13/ { 14 model = "RK3588 CoolPi CM5 EVB"; 15 compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588"; 16 17 backlight: backlight { 18 compatible = "pwm-backlight"; 19 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&bl_en>; 22 power-supply = <&vcc12v_dcin>; 23 pwms = <&pwm2 0 25000 0>; 24 }; 25 26 hdmi-con { 27 compatible = "hdmi-connector"; 28 type = "a"; 29 30 port { 31 hdmi_con_in: endpoint { 32 remote-endpoint = <&hdmi0_out_con>; 33 }; 34 }; 35 }; 36 37 leds: leds { 38 compatible = "gpio-leds"; 39 40 green_led: led-0 { 41 color = <LED_COLOR_ID_GREEN>; 42 function = LED_FUNCTION_STATUS; 43 gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 44 linux,default-trigger = "heartbeat"; 45 }; 46 }; 47 48 vcc12v_dcin: regulator-vcc12v-dcin { 49 compatible = "regulator-fixed"; 50 regulator-name = "vcc12v_dcin"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <12000000>; 54 regulator-max-microvolt = <12000000>; 55 }; 56 57 vcc5v0_sys: regulator-vcc5v0-sys { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc5v0_sys"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <5000000>; 63 regulator-max-microvolt = <5000000>; 64 vin-supply = <&vcc12v_dcin>; 65 }; 66 67 vcc3v3_sys: regulator-vcc3v3-sys { 68 compatible = "regulator-fixed"; 69 regulator-name = "vcc3v3_sys"; 70 regulator-always-on; 71 regulator-boot-on; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 vin-supply = <&vcc12v_dcin>; 75 }; 76 77 vcc3v3_lcd: regulator-vcc3v3-lcd { 78 compatible = "regulator-fixed"; 79 regulator-name = "vcc3v3_lcd"; 80 enable-active-high; 81 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 82 pinctrl-names = "default"; 83 pinctrl-0 = <&lcdpwr_en>; 84 vin-supply = <&vcc3v3_sys>; 85 }; 86 87 vcc5v0_usb_host1: vcc5v0_usb_host2: regulator-vcc5v0-usb-host { 88 compatible = "regulator-fixed"; 89 regulator-name = "vcc5v0_host"; 90 regulator-boot-on; 91 regulator-always-on; 92 enable-active-high; 93 regulator-min-microvolt = <5000000>; 94 regulator-max-microvolt = <5000000>; 95 gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 96 pinctrl-names = "default"; 97 pinctrl-0 = <&usb_host_pwren>; 98 vin-supply = <&vcc5v0_sys>; 99 }; 100 101 vcc5v0_usb30_otg: regulator-vcc5v0-usb30-otg { 102 compatible = "regulator-fixed"; 103 regulator-name = "vcc5v0_otg"; 104 regulator-boot-on; 105 regulator-always-on; 106 enable-active-high; 107 regulator-min-microvolt = <5000000>; 108 regulator-max-microvolt = <5000000>; 109 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 110 pinctrl-names = "default"; 111 pinctrl-0 = <&usb_otg_pwren>; 112 vin-supply = <&vcc5v0_sys>; 113 }; 114}; 115 116&hdmi0 { 117 status = "okay"; 118}; 119 120&hdmi0_in { 121 hdmi0_in_vp0: endpoint { 122 remote-endpoint = <&vp0_out_hdmi0>; 123 }; 124}; 125 126&hdmi0_out { 127 hdmi0_out_con: endpoint { 128 remote-endpoint = <&hdmi_con_in>; 129 }; 130}; 131 132&hdptxphy_hdmi0 { 133 status = "okay"; 134}; 135 136/* M.2 E-Key */ 137&pcie2x1l1 { 138 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 139 vpcie3v3-supply = <&vcc3v3_sys>; 140 pinctrl-names = "default"; 141 pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>; 142 status = "okay"; 143}; 144 145&pcie30phy { 146 status = "okay"; 147}; 148 149/* Standard pcie */ 150&pcie3x2 { 151 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 152 vpcie3v3-supply = <&vcc3v3_sys>; 153 status = "okay"; 154}; 155 156/* M.2 M-Key ssd */ 157&pcie3x4 { 158 num-lanes = <2>; 159 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 160 vpcie3v3-supply = <&vcc3v3_sys>; 161 status = "okay"; 162}; 163 164&pinctrl { 165 lcd { 166 lcdpwr_en: lcdpwr-en { 167 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 168 }; 169 170 bl_en: bl-en { 171 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 172 }; 173 }; 174 175 usb { 176 usb_host_pwren: usb-host-pwren { 177 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; 178 }; 179 180 usb_otg_pwren: usb-otg-pwren { 181 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 182 }; 183 }; 184 185 wifi { 186 bt_pwron: bt-pwron { 187 rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 188 }; 189 190 pcie_clkreq: pcie-clkreq { 191 rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 192 }; 193 194 pcie_rst: pcie-rst { 195 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 196 }; 197 198 wifi_pwron: wifi-pwron { 199 rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 200 }; 201 202 pcie_wake: pcie-wake { 203 rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 204 }; 205 }; 206}; 207 208&pwm2 { 209 status = "okay"; 210}; 211 212&sata1 { 213 status = "okay"; 214}; 215 216&u2phy2 { 217 status = "okay"; 218}; 219 220&u2phy3 { 221 status = "okay"; 222}; 223 224&u2phy2_host { 225 phy-supply = <&vcc5v0_usb_host1>; 226 status = "okay"; 227}; 228 229&u2phy3_host { 230 phy-supply = <&vcc5v0_usb_host2>; 231 status = "okay"; 232}; 233 234&usb_host0_ehci { 235 status = "okay"; 236}; 237 238&usb_host0_ohci { 239 status = "okay"; 240}; 241 242&usb_host1_ehci { 243 status = "okay"; 244}; 245 246&usb_host1_ohci { 247 status = "okay"; 248}; 249 250&vop { 251 status = "okay"; 252}; 253 254&vop_mmu { 255 status = "okay"; 256}; 257 258&vp0 { 259 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 260 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 261 remote-endpoint = <&hdmi0_in_vp0>; 262 }; 263}; 264