xref: /linux/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts (revision 24b10e5f8e0d2bee1a10fc67011ea5d936c1a389)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/leds/common.h>
10#include "rk3588-coolpi-cm5.dtsi"
11
12/ {
13	model = "RK3588 CoolPi CM5 EVB";
14	compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588";
15
16	backlight: backlight {
17		compatible = "pwm-backlight";
18		enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
19		pinctrl-names = "default";
20		pinctrl-0 = <&bl_en>;
21		power-supply = <&vcc12v_dcin>;
22		pwms = <&pwm2 0 25000 0>;
23	};
24
25	leds: leds {
26		compatible = "gpio-leds";
27
28		green_led: led-0 {
29			color = <LED_COLOR_ID_GREEN>;
30			function = LED_FUNCTION_STATUS;
31			gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
32			linux,default-trigger = "heartbeat";
33		};
34	};
35
36	vcc12v_dcin: vcc12v-dcin-regulator {
37		compatible = "regulator-fixed";
38		regulator-name = "vcc12v_dcin";
39		regulator-always-on;
40		regulator-boot-on;
41		regulator-min-microvolt = <12000000>;
42		regulator-max-microvolt = <12000000>;
43	};
44
45	vcc5v0_sys: vcc5v0-sys-regulator {
46		compatible = "regulator-fixed";
47		regulator-name = "vcc5v0_sys";
48		regulator-always-on;
49		regulator-boot-on;
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		vin-supply = <&vcc12v_dcin>;
53	};
54
55	vcc3v3_sys: vcc3v3-sys-regulator {
56		compatible = "regulator-fixed";
57		regulator-name = "vcc3v3_sys";
58		regulator-always-on;
59		regulator-boot-on;
60		regulator-min-microvolt = <3300000>;
61		regulator-max-microvolt = <3300000>;
62		vin-supply = <&vcc12v_dcin>;
63	};
64
65	vcc3v3_lcd: vcc3v3-lcd-regulator {
66		compatible = "regulator-fixed";
67		regulator-name = "vcc3v3_lcd";
68		enable-active-high;
69		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
70		pinctrl-names = "default";
71		pinctrl-0 = <&lcdpwr_en>;
72		vin-supply = <&vcc3v3_sys>;
73	};
74
75	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
76		compatible = "regulator-fixed";
77		regulator-name = "vcc5v0_host";
78		regulator-boot-on;
79		regulator-always-on;
80		enable-active-high;
81		regulator-min-microvolt = <5000000>;
82		regulator-max-microvolt = <5000000>;
83		gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
84		pinctrl-names = "default";
85		pinctrl-0 = <&usb_host_pwren>;
86		vin-supply = <&vcc5v0_sys>;
87	};
88
89	vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
90		compatible = "regulator-fixed";
91		regulator-name = "vcc5v0_otg";
92		regulator-boot-on;
93		regulator-always-on;
94		enable-active-high;
95		regulator-min-microvolt = <5000000>;
96		regulator-max-microvolt = <5000000>;
97		gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
98		pinctrl-names = "default";
99		pinctrl-0 = <&usb_otg_pwren>;
100		vin-supply = <&vcc5v0_sys>;
101	};
102};
103
104/* M.2 E-Key */
105&pcie2x1l1 {
106	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
107	vpcie3v3-supply = <&vcc3v3_sys>;
108	pinctrl-names = "default";
109	pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>;
110	status = "okay";
111};
112
113&pcie30phy {
114	status = "okay";
115};
116
117&pcie3x2 {
118	reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
119	vpcie3v3-supply = <&vcc3v3_sys>;
120	status = "okay";
121};
122
123/* M.2 M-Key ssd */
124&pcie3x4 {
125	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
126	vpcie3v3-supply = <&vcc3v3_sys>;
127	status = "okay";
128};
129
130&pinctrl {
131	lcd {
132		lcdpwr_en: lcdpwr-en {
133			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
134		};
135
136		bl_en: bl-en {
137			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
138		};
139	};
140
141	usb {
142		usb_host_pwren: usb-host-pwren {
143			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
144		};
145
146		usb_otg_pwren: usb-otg-pwren {
147			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
148		};
149	};
150
151	wifi {
152		bt_pwron: bt-pwron {
153			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
154		};
155
156		pcie_clkreq: pcie-clkreq {
157			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
158		};
159
160		pcie_rst: pcie-rst {
161			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
162		};
163
164		wifi_pwron: wifi-pwron {
165			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
166		};
167
168		pcie_wake: pcie-wake {
169			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
170		};
171	};
172};
173
174&pwm2 {
175	status = "okay";
176};
177
178&sata1 {
179	status = "okay";
180};
181
182&u2phy2 {
183	status = "okay";
184};
185
186&u2phy3 {
187	status = "okay";
188};
189
190&u2phy2_host {
191	phy-supply = <&vcc5v0_usb30_host>;
192	status = "okay";
193};
194
195&u2phy3_host {
196	phy-supply = <&vcc5v0_usb30_host>;
197	status = "okay";
198};
199
200&usb_host0_ehci {
201	status = "okay";
202};
203
204&usb_host0_ohci {
205	status = "okay";
206};
207
208&usb_host1_ehci {
209	status = "okay";
210};
211
212&usb_host1_ohci {
213	status = "okay";
214};
215