xref: /linux/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts (revision 0be29f76633a447e15fc58066ea47688974e68d9)
1*0be29f76SMichael Riesch// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
2*0be29f76SMichael Riesch/*
3*0be29f76SMichael Riesch * Device tree for the WolfVision PF5 mainboard.
4*0be29f76SMichael Riesch *
5*0be29f76SMichael Riesch * Copyright (C) 2024 WolfVision GmbH.
6*0be29f76SMichael Riesch */
7*0be29f76SMichael Riesch
8*0be29f76SMichael Riesch/dts-v1/;
9*0be29f76SMichael Riesch#include <dt-bindings/gpio/gpio.h>
10*0be29f76SMichael Riesch#include <dt-bindings/pinctrl/rockchip.h>
11*0be29f76SMichael Riesch#include <dt-bindings/regulator/ti,tps62864.h>
12*0be29f76SMichael Riesch#include <dt-bindings/soc/rockchip,vop2.h>
13*0be29f76SMichael Riesch#include "rk3568.dtsi"
14*0be29f76SMichael Riesch
15*0be29f76SMichael Riesch/ {
16*0be29f76SMichael Riesch	model = "WolfVision PF5";
17*0be29f76SMichael Riesch	compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568";
18*0be29f76SMichael Riesch
19*0be29f76SMichael Riesch	aliases {
20*0be29f76SMichael Riesch		ethernet0 = &gmac0;
21*0be29f76SMichael Riesch		mmc0 = &sdhci;
22*0be29f76SMichael Riesch		rtc0 = &pcf85623;
23*0be29f76SMichael Riesch		rtc1 = &rk809;
24*0be29f76SMichael Riesch	};
25*0be29f76SMichael Riesch
26*0be29f76SMichael Riesch	chosen: chosen {
27*0be29f76SMichael Riesch		stdout-path = "serial2:115200n8";
28*0be29f76SMichael Riesch	};
29*0be29f76SMichael Riesch
30*0be29f76SMichael Riesch	hdmi_tx: hdmi-tx-connector {
31*0be29f76SMichael Riesch		compatible = "hdmi-connector";
32*0be29f76SMichael Riesch		hdmi-pwr-supply = <&hdmi_tx_5v>;
33*0be29f76SMichael Riesch		type = "a";
34*0be29f76SMichael Riesch
35*0be29f76SMichael Riesch		port {
36*0be29f76SMichael Riesch			hdmi_tx_in: endpoint {
37*0be29f76SMichael Riesch				remote-endpoint = <&hdmi_tx_out>;
38*0be29f76SMichael Riesch			};
39*0be29f76SMichael Riesch		};
40*0be29f76SMichael Riesch	};
41*0be29f76SMichael Riesch
42*0be29f76SMichael Riesch	hdmi_tx_5v: hdmi-tx-5v-regulator {
43*0be29f76SMichael Riesch		compatible = "regulator-fixed";
44*0be29f76SMichael Riesch		enable-active-high;
45*0be29f76SMichael Riesch		gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
46*0be29f76SMichael Riesch		pinctrl-names = "default";
47*0be29f76SMichael Riesch		pinctrl-0 = <&hdmi_tx_5v_en>;
48*0be29f76SMichael Riesch		regulator-name = "hdmi_tx_5v";
49*0be29f76SMichael Riesch		regulator-min-microvolt = <5000000>;
50*0be29f76SMichael Riesch		regulator-max-microvolt = <5000000>;
51*0be29f76SMichael Riesch		vin-supply = <&vcc5v_in>;
52*0be29f76SMichael Riesch	};
53*0be29f76SMichael Riesch
54*0be29f76SMichael Riesch	pdm_codec: pdm-codec {
55*0be29f76SMichael Riesch		compatible = "dmic-codec";
56*0be29f76SMichael Riesch		num-channels = <1>;
57*0be29f76SMichael Riesch		#sound-dai-cells = <0>;
58*0be29f76SMichael Riesch	};
59*0be29f76SMichael Riesch
60*0be29f76SMichael Riesch	pdm_sound: pdm-sound {
61*0be29f76SMichael Riesch		compatible = "simple-audio-card";
62*0be29f76SMichael Riesch		simple-audio-card,name = "microphone";
63*0be29f76SMichael Riesch
64*0be29f76SMichael Riesch		simple-audio-card,cpu {
65*0be29f76SMichael Riesch			sound-dai = <&pdm>;
66*0be29f76SMichael Riesch		};
67*0be29f76SMichael Riesch
68*0be29f76SMichael Riesch		simple-audio-card,codec {
69*0be29f76SMichael Riesch			sound-dai = <&pdm_codec>;
70*0be29f76SMichael Riesch		};
71*0be29f76SMichael Riesch	};
72*0be29f76SMichael Riesch
73*0be29f76SMichael Riesch	vcc12v_cam: vcc12v-cam-regulator {
74*0be29f76SMichael Riesch		compatible = "regulator-fixed";
75*0be29f76SMichael Riesch		enable-active-high;
76*0be29f76SMichael Riesch		gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
77*0be29f76SMichael Riesch		pinctrl-names = "default";
78*0be29f76SMichael Riesch		pinctrl-0 = <&vcc12v_cam_en>;
79*0be29f76SMichael Riesch		regulator-name = "12v_cam";
80*0be29f76SMichael Riesch		regulator-min-microvolt = <12000000>;
81*0be29f76SMichael Riesch		regulator-max-microvolt = <12000000>;
82*0be29f76SMichael Riesch		vin-supply = <&vcc12v_in>;
83*0be29f76SMichael Riesch	};
84*0be29f76SMichael Riesch
85*0be29f76SMichael Riesch	vcc12v_in: vcc12v-in-regulator {
86*0be29f76SMichael Riesch		compatible = "regulator-fixed";
87*0be29f76SMichael Riesch		regulator-name = "12v_in";
88*0be29f76SMichael Riesch		regulator-always-on;
89*0be29f76SMichael Riesch		regulator-boot-on;
90*0be29f76SMichael Riesch		regulator-min-microvolt = <12000000>;
91*0be29f76SMichael Riesch		regulator-max-microvolt = <12000000>;
92*0be29f76SMichael Riesch	};
93*0be29f76SMichael Riesch
94*0be29f76SMichael Riesch	vcc3v8_cam: vcc3v8-cam-regulator {
95*0be29f76SMichael Riesch		compatible = "regulator-fixed";
96*0be29f76SMichael Riesch		enable-active-high;
97*0be29f76SMichael Riesch		gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
98*0be29f76SMichael Riesch		pinctrl-names = "default";
99*0be29f76SMichael Riesch		pinctrl-0 = <&vcc3v8_cam_en>;
100*0be29f76SMichael Riesch		regulator-name = "3v8_cam";
101*0be29f76SMichael Riesch		regulator-min-microvolt = <3800000>;
102*0be29f76SMichael Riesch		regulator-max-microvolt = <3800000>;
103*0be29f76SMichael Riesch		vin-supply = <&vcc5v_in>;
104*0be29f76SMichael Riesch	};
105*0be29f76SMichael Riesch
106*0be29f76SMichael Riesch	vcc3v3_sys: vcc3v3-sys-regulator {
107*0be29f76SMichael Riesch		compatible = "regulator-fixed";
108*0be29f76SMichael Riesch		regulator-name = "3v3_sys";
109*0be29f76SMichael Riesch		regulator-always-on;
110*0be29f76SMichael Riesch		regulator-boot-on;
111*0be29f76SMichael Riesch		regulator-min-microvolt = <3300000>;
112*0be29f76SMichael Riesch		regulator-max-microvolt = <3300000>;
113*0be29f76SMichael Riesch		vin-supply = <&vcc5v_in>;
114*0be29f76SMichael Riesch	};
115*0be29f76SMichael Riesch
116*0be29f76SMichael Riesch	vcc5v_in: vcc5v-in-regulator {
117*0be29f76SMichael Riesch		compatible = "regulator-fixed";
118*0be29f76SMichael Riesch		regulator-name = "5v_in";
119*0be29f76SMichael Riesch		regulator-always-on;
120*0be29f76SMichael Riesch		regulator-boot-on;
121*0be29f76SMichael Riesch		regulator-min-microvolt = <5000000>;
122*0be29f76SMichael Riesch		regulator-max-microvolt = <5000000>;
123*0be29f76SMichael Riesch		vin-supply = <&vcc12v_in>;
124*0be29f76SMichael Riesch	};
125*0be29f76SMichael Riesch};
126*0be29f76SMichael Riesch
127*0be29f76SMichael Riesch&combphy0 {
128*0be29f76SMichael Riesch	status = "okay";
129*0be29f76SMichael Riesch};
130*0be29f76SMichael Riesch
131*0be29f76SMichael Riesch&cpu0 {
132*0be29f76SMichael Riesch	cpu-supply = <&vcc0v9_cpu>;
133*0be29f76SMichael Riesch};
134*0be29f76SMichael Riesch
135*0be29f76SMichael Riesch&cpu1 {
136*0be29f76SMichael Riesch	cpu-supply = <&vcc0v9_cpu>;
137*0be29f76SMichael Riesch};
138*0be29f76SMichael Riesch
139*0be29f76SMichael Riesch&cpu2 {
140*0be29f76SMichael Riesch	cpu-supply = <&vcc0v9_cpu>;
141*0be29f76SMichael Riesch};
142*0be29f76SMichael Riesch
143*0be29f76SMichael Riesch&cpu3 {
144*0be29f76SMichael Riesch	cpu-supply = <&vcc0v9_cpu>;
145*0be29f76SMichael Riesch};
146*0be29f76SMichael Riesch
147*0be29f76SMichael Riesch&gpu {
148*0be29f76SMichael Riesch	mali-supply = <&vcc0v9_gpu>;
149*0be29f76SMichael Riesch	status = "okay";
150*0be29f76SMichael Riesch};
151*0be29f76SMichael Riesch
152*0be29f76SMichael Riesch&hdmi {
153*0be29f76SMichael Riesch	avdd-0v9-supply = <&vcc0v9a_image>;
154*0be29f76SMichael Riesch	avdd-1v8-supply = <&vcc1v8a_image>;
155*0be29f76SMichael Riesch	status = "okay";
156*0be29f76SMichael Riesch};
157*0be29f76SMichael Riesch
158*0be29f76SMichael Riesch&hdmi_in {
159*0be29f76SMichael Riesch	hdmi_in_vp0: endpoint {
160*0be29f76SMichael Riesch		remote-endpoint = <&vp0_out_hdmi>;
161*0be29f76SMichael Riesch	};
162*0be29f76SMichael Riesch};
163*0be29f76SMichael Riesch
164*0be29f76SMichael Riesch&hdmi_out {
165*0be29f76SMichael Riesch	hdmi_tx_out: endpoint {
166*0be29f76SMichael Riesch		remote-endpoint = <&hdmi_tx_in>;
167*0be29f76SMichael Riesch	};
168*0be29f76SMichael Riesch};
169*0be29f76SMichael Riesch
170*0be29f76SMichael Riesch&i2c0 {
171*0be29f76SMichael Riesch	status = "okay";
172*0be29f76SMichael Riesch
173*0be29f76SMichael Riesch	rk809: pmic@20 {
174*0be29f76SMichael Riesch		compatible = "rockchip,rk809";
175*0be29f76SMichael Riesch		reg = <0x20>;
176*0be29f76SMichael Riesch		interrupt-parent = <&gpio0>;
177*0be29f76SMichael Riesch		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
178*0be29f76SMichael Riesch		#clock-cells = <0>;
179*0be29f76SMichael Riesch		pinctrl-names = "default";
180*0be29f76SMichael Riesch		pinctrl-0 = <&pmic_int_l>;
181*0be29f76SMichael Riesch		rockchip,system-power-controller;
182*0be29f76SMichael Riesch		vcc1-supply = <&vcc5v_in>;
183*0be29f76SMichael Riesch		vcc2-supply = <&vcc5v_in>;
184*0be29f76SMichael Riesch		vcc3-supply = <&vcc5v_in>;
185*0be29f76SMichael Riesch		vcc4-supply = <&vcc5v_in>;
186*0be29f76SMichael Riesch		vcc5-supply = <&vcc3v3_sys>;
187*0be29f76SMichael Riesch		vcc6-supply = <&vcc5v_in>;
188*0be29f76SMichael Riesch		vcc7-supply = <&vcc3v3_sys>;
189*0be29f76SMichael Riesch		vcc8-supply = <&vcc3v3_sys>;
190*0be29f76SMichael Riesch		vcc9-supply = <&vcc3v3_sys>;
191*0be29f76SMichael Riesch		wakeup-source;
192*0be29f76SMichael Riesch
193*0be29f76SMichael Riesch		regulators {
194*0be29f76SMichael Riesch			vcc0v9_logic: DCDC_REG1 {
195*0be29f76SMichael Riesch				regulator-name = "0v9_logic";
196*0be29f76SMichael Riesch				regulator-always-on;
197*0be29f76SMichael Riesch				regulator-boot-on;
198*0be29f76SMichael Riesch				regulator-initial-mode = <0x2>;
199*0be29f76SMichael Riesch				regulator-min-microvolt = <500000>;
200*0be29f76SMichael Riesch				regulator-max-microvolt = <1350000>;
201*0be29f76SMichael Riesch				regulator-ramp-delay = <6001>;
202*0be29f76SMichael Riesch
203*0be29f76SMichael Riesch				regulator-state-mem {
204*0be29f76SMichael Riesch					regulator-off-in-suspend;
205*0be29f76SMichael Riesch				};
206*0be29f76SMichael Riesch			};
207*0be29f76SMichael Riesch
208*0be29f76SMichael Riesch			vcc0v9_gpu: DCDC_REG2 {
209*0be29f76SMichael Riesch				regulator-name = "0v9_gpu";
210*0be29f76SMichael Riesch				regulator-always-on;
211*0be29f76SMichael Riesch				regulator-initial-mode = <0x2>;
212*0be29f76SMichael Riesch				regulator-min-microvolt = <500000>;
213*0be29f76SMichael Riesch				regulator-max-microvolt = <1350000>;
214*0be29f76SMichael Riesch				regulator-ramp-delay = <6001>;
215*0be29f76SMichael Riesch
216*0be29f76SMichael Riesch				regulator-state-mem {
217*0be29f76SMichael Riesch					regulator-off-in-suspend;
218*0be29f76SMichael Riesch				};
219*0be29f76SMichael Riesch			};
220*0be29f76SMichael Riesch
221*0be29f76SMichael Riesch			vcc1v1_ddr4: DCDC_REG3 {
222*0be29f76SMichael Riesch				regulator-name = "1v1_ddr4";
223*0be29f76SMichael Riesch				regulator-always-on;
224*0be29f76SMichael Riesch				regulator-boot-on;
225*0be29f76SMichael Riesch				regulator-initial-mode = <0x2>;
226*0be29f76SMichael Riesch
227*0be29f76SMichael Riesch				regulator-state-mem {
228*0be29f76SMichael Riesch					regulator-on-in-suspend;
229*0be29f76SMichael Riesch				};
230*0be29f76SMichael Riesch			};
231*0be29f76SMichael Riesch
232*0be29f76SMichael Riesch			vcc0v9_npu: DCDC_REG4 {
233*0be29f76SMichael Riesch				regulator-name = "0v9_npu";
234*0be29f76SMichael Riesch				regulator-always-on;
235*0be29f76SMichael Riesch				regulator-initial-mode = <0x2>;
236*0be29f76SMichael Riesch				regulator-min-microvolt = <900000>;
237*0be29f76SMichael Riesch				regulator-max-microvolt = <1350000>;
238*0be29f76SMichael Riesch				regulator-ramp-delay = <6001>;
239*0be29f76SMichael Riesch
240*0be29f76SMichael Riesch				regulator-state-mem {
241*0be29f76SMichael Riesch					regulator-off-in-suspend;
242*0be29f76SMichael Riesch				};
243*0be29f76SMichael Riesch			};
244*0be29f76SMichael Riesch
245*0be29f76SMichael Riesch			vcc1v8: DCDC_REG5 {
246*0be29f76SMichael Riesch				regulator-name = "1v8";
247*0be29f76SMichael Riesch				regulator-always-on;
248*0be29f76SMichael Riesch				regulator-boot-on;
249*0be29f76SMichael Riesch				regulator-min-microvolt = <1800000>;
250*0be29f76SMichael Riesch				regulator-max-microvolt = <1800000>;
251*0be29f76SMichael Riesch
252*0be29f76SMichael Riesch				regulator-state-mem {
253*0be29f76SMichael Riesch					regulator-off-in-suspend;
254*0be29f76SMichael Riesch				};
255*0be29f76SMichael Riesch			};
256*0be29f76SMichael Riesch
257*0be29f76SMichael Riesch			vcc0v9a_image: LDO_REG1 {
258*0be29f76SMichael Riesch				regulator-name = "0v9a_image";
259*0be29f76SMichael Riesch				regulator-min-microvolt = <900000>;
260*0be29f76SMichael Riesch				regulator-max-microvolt = <900000>;
261*0be29f76SMichael Riesch
262*0be29f76SMichael Riesch				regulator-state-mem {
263*0be29f76SMichael Riesch					regulator-off-in-suspend;
264*0be29f76SMichael Riesch				};
265*0be29f76SMichael Riesch			};
266*0be29f76SMichael Riesch
267*0be29f76SMichael Riesch			vcc0v9a: LDO_REG2 {
268*0be29f76SMichael Riesch				regulator-name = "0v9a";
269*0be29f76SMichael Riesch				regulator-always-on;
270*0be29f76SMichael Riesch				regulator-boot-on;
271*0be29f76SMichael Riesch				regulator-min-microvolt = <900000>;
272*0be29f76SMichael Riesch				regulator-max-microvolt = <900000>;
273*0be29f76SMichael Riesch
274*0be29f76SMichael Riesch				regulator-state-mem {
275*0be29f76SMichael Riesch					regulator-off-in-suspend;
276*0be29f76SMichael Riesch				};
277*0be29f76SMichael Riesch			};
278*0be29f76SMichael Riesch
279*0be29f76SMichael Riesch			vcc0v9a_pmu: LDO_REG3 {
280*0be29f76SMichael Riesch				regulator-name = "0v9a_pmu";
281*0be29f76SMichael Riesch				regulator-always-on;
282*0be29f76SMichael Riesch				regulator-boot-on;
283*0be29f76SMichael Riesch				regulator-min-microvolt = <900000>;
284*0be29f76SMichael Riesch				regulator-max-microvolt = <900000>;
285*0be29f76SMichael Riesch
286*0be29f76SMichael Riesch				regulator-state-mem {
287*0be29f76SMichael Riesch					regulator-on-in-suspend;
288*0be29f76SMichael Riesch					regulator-suspend-microvolt = <900000>;
289*0be29f76SMichael Riesch				};
290*0be29f76SMichael Riesch			};
291*0be29f76SMichael Riesch
292*0be29f76SMichael Riesch			vcc3v3_acodec: LDO_REG4 {
293*0be29f76SMichael Riesch				regulator-name = "3v3_acodec";
294*0be29f76SMichael Riesch				regulator-always-on;
295*0be29f76SMichael Riesch				regulator-min-microvolt = <3300000>;
296*0be29f76SMichael Riesch				regulator-max-microvolt = <3300000>;
297*0be29f76SMichael Riesch
298*0be29f76SMichael Riesch				regulator-state-mem {
299*0be29f76SMichael Riesch					regulator-off-in-suspend;
300*0be29f76SMichael Riesch				};
301*0be29f76SMichael Riesch			};
302*0be29f76SMichael Riesch
303*0be29f76SMichael Riesch			vcc3v3_sd: LDO_REG5 {
304*0be29f76SMichael Riesch				regulator-name = "3v3_sd";
305*0be29f76SMichael Riesch				regulator-always-on;
306*0be29f76SMichael Riesch				regulator-boot-on;
307*0be29f76SMichael Riesch				regulator-min-microvolt = <3300000>;
308*0be29f76SMichael Riesch				regulator-max-microvolt = <3300000>;
309*0be29f76SMichael Riesch
310*0be29f76SMichael Riesch				regulator-state-mem {
311*0be29f76SMichael Riesch					regulator-off-in-suspend;
312*0be29f76SMichael Riesch				};
313*0be29f76SMichael Riesch			};
314*0be29f76SMichael Riesch
315*0be29f76SMichael Riesch			vcc3v3_pmu: LDO_REG6 {
316*0be29f76SMichael Riesch				regulator-name = "3v3_pmu";
317*0be29f76SMichael Riesch				regulator-always-on;
318*0be29f76SMichael Riesch				regulator-boot-on;
319*0be29f76SMichael Riesch				regulator-min-microvolt = <3300000>;
320*0be29f76SMichael Riesch				regulator-max-microvolt = <3300000>;
321*0be29f76SMichael Riesch
322*0be29f76SMichael Riesch				regulator-state-mem {
323*0be29f76SMichael Riesch					regulator-on-in-suspend;
324*0be29f76SMichael Riesch					regulator-suspend-microvolt = <3300000>;
325*0be29f76SMichael Riesch				};
326*0be29f76SMichael Riesch			};
327*0be29f76SMichael Riesch
328*0be29f76SMichael Riesch			vcc1v8a: LDO_REG7 {
329*0be29f76SMichael Riesch				regulator-name = "1v8a";
330*0be29f76SMichael Riesch				regulator-always-on;
331*0be29f76SMichael Riesch				regulator-boot-on;
332*0be29f76SMichael Riesch				regulator-min-microvolt = <1800000>;
333*0be29f76SMichael Riesch				regulator-max-microvolt = <1800000>;
334*0be29f76SMichael Riesch
335*0be29f76SMichael Riesch				regulator-state-mem {
336*0be29f76SMichael Riesch					regulator-off-in-suspend;
337*0be29f76SMichael Riesch				};
338*0be29f76SMichael Riesch			};
339*0be29f76SMichael Riesch
340*0be29f76SMichael Riesch			vcc1v8a_pmu: LDO_REG8 {
341*0be29f76SMichael Riesch				regulator-name = "1v8a_pmu";
342*0be29f76SMichael Riesch				regulator-always-on;
343*0be29f76SMichael Riesch				regulator-boot-on;
344*0be29f76SMichael Riesch				regulator-min-microvolt = <1800000>;
345*0be29f76SMichael Riesch				regulator-max-microvolt = <1800000>;
346*0be29f76SMichael Riesch
347*0be29f76SMichael Riesch				regulator-state-mem {
348*0be29f76SMichael Riesch					regulator-on-in-suspend;
349*0be29f76SMichael Riesch					regulator-suspend-microvolt = <1800000>;
350*0be29f76SMichael Riesch				};
351*0be29f76SMichael Riesch			};
352*0be29f76SMichael Riesch
353*0be29f76SMichael Riesch			vcc1v8a_image: LDO_REG9 {
354*0be29f76SMichael Riesch				regulator-name = "1v8a_image";
355*0be29f76SMichael Riesch				regulator-min-microvolt = <1800000>;
356*0be29f76SMichael Riesch				regulator-max-microvolt = <1800000>;
357*0be29f76SMichael Riesch
358*0be29f76SMichael Riesch				regulator-state-mem {
359*0be29f76SMichael Riesch					regulator-off-in-suspend;
360*0be29f76SMichael Riesch				};
361*0be29f76SMichael Riesch			};
362*0be29f76SMichael Riesch
363*0be29f76SMichael Riesch			vcc3v3_sw: SWITCH_REG1 {
364*0be29f76SMichael Riesch				regulator-name = "3v3_sw";
365*0be29f76SMichael Riesch				regulator-always-on;
366*0be29f76SMichael Riesch				regulator-boot-on;
367*0be29f76SMichael Riesch				regulator-min-microvolt = <3300000>;
368*0be29f76SMichael Riesch				regulator-max-microvolt = <3300000>;
369*0be29f76SMichael Riesch
370*0be29f76SMichael Riesch				regulator-state-mem {
371*0be29f76SMichael Riesch					regulator-off-in-suspend;
372*0be29f76SMichael Riesch				};
373*0be29f76SMichael Riesch			};
374*0be29f76SMichael Riesch		};
375*0be29f76SMichael Riesch	};
376*0be29f76SMichael Riesch
377*0be29f76SMichael Riesch	regulator@42 {
378*0be29f76SMichael Riesch		compatible = "ti,tps62869";
379*0be29f76SMichael Riesch		reg = <0x42>;
380*0be29f76SMichael Riesch
381*0be29f76SMichael Riesch		regulators {
382*0be29f76SMichael Riesch			vcc0v9_cpu: SW {
383*0be29f76SMichael Riesch				regulator-name = "0v9_cpu";
384*0be29f76SMichael Riesch				regulator-always-on;
385*0be29f76SMichael Riesch				regulator-boot-on;
386*0be29f76SMichael Riesch				regulator-initial-mode = <TPS62864_MODE_FPWM>;
387*0be29f76SMichael Riesch				regulator-min-microvolt = <900000>;
388*0be29f76SMichael Riesch				regulator-max-microvolt = <1150000>;
389*0be29f76SMichael Riesch				vin-supply = <&vcc5v_in>;
390*0be29f76SMichael Riesch
391*0be29f76SMichael Riesch				regulator-state-mem {
392*0be29f76SMichael Riesch					regulator-off-in-suspend;
393*0be29f76SMichael Riesch				};
394*0be29f76SMichael Riesch			};
395*0be29f76SMichael Riesch		};
396*0be29f76SMichael Riesch	};
397*0be29f76SMichael Riesch
398*0be29f76SMichael Riesch	pcf85623: rtc@51 {
399*0be29f76SMichael Riesch		compatible = "nxp,pcf85263";
400*0be29f76SMichael Riesch		reg = <0x51>;
401*0be29f76SMichael Riesch		pinctrl-names = "default";
402*0be29f76SMichael Riesch		pinctrl-0 = <&clk32k_in>;
403*0be29f76SMichael Riesch		quartz-load-femtofarads = <12500>;
404*0be29f76SMichael Riesch	};
405*0be29f76SMichael Riesch};
406*0be29f76SMichael Riesch
407*0be29f76SMichael Riesch&i2c3 {
408*0be29f76SMichael Riesch	pinctrl-names = "default";
409*0be29f76SMichael Riesch	pinctrl-0 = <&i2c3m0_xfer>;
410*0be29f76SMichael Riesch};
411*0be29f76SMichael Riesch
412*0be29f76SMichael Riesch&i2c4 {
413*0be29f76SMichael Riesch	pinctrl-names = "default";
414*0be29f76SMichael Riesch	pinctrl-0 = <&i2c4m1_xfer>;
415*0be29f76SMichael Riesch};
416*0be29f76SMichael Riesch
417*0be29f76SMichael Riesch&pdm {
418*0be29f76SMichael Riesch	pinctrl-0 = <&pdmm0_clk
419*0be29f76SMichael Riesch		     &pdmm0_sdi0>;
420*0be29f76SMichael Riesch	status = "okay";
421*0be29f76SMichael Riesch};
422*0be29f76SMichael Riesch
423*0be29f76SMichael Riesch&pinctrl {
424*0be29f76SMichael Riesch	cam {
425*0be29f76SMichael Riesch		vcc12v_cam_en: vcc12v-cam-en-pinctrl {
426*0be29f76SMichael Riesch			rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
427*0be29f76SMichael Riesch		};
428*0be29f76SMichael Riesch
429*0be29f76SMichael Riesch		vcc3v8_cam_en: vcc3v8-cam-en-pinctrl {
430*0be29f76SMichael Riesch			rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
431*0be29f76SMichael Riesch		};
432*0be29f76SMichael Riesch	};
433*0be29f76SMichael Riesch
434*0be29f76SMichael Riesch	hdmitx {
435*0be29f76SMichael Riesch		hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl {
436*0be29f76SMichael Riesch			rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
437*0be29f76SMichael Riesch		};
438*0be29f76SMichael Riesch	};
439*0be29f76SMichael Riesch
440*0be29f76SMichael Riesch	pmic {
441*0be29f76SMichael Riesch		pmic_int_l: pmic-int-l-pinctrl {
442*0be29f76SMichael Riesch			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
443*0be29f76SMichael Riesch		};
444*0be29f76SMichael Riesch	};
445*0be29f76SMichael Riesch};
446*0be29f76SMichael Riesch
447*0be29f76SMichael Riesch&pmu_io_domains {
448*0be29f76SMichael Riesch	pmuio1-supply = <&vcc3v3_pmu>;
449*0be29f76SMichael Riesch	pmuio2-supply = <&vcc3v3_pmu>;
450*0be29f76SMichael Riesch	vccio1-supply = <&vcc3v3_acodec>;
451*0be29f76SMichael Riesch	vccio2-supply = <&vcc1v8>;
452*0be29f76SMichael Riesch	vccio3-supply = <&vcc3v3_sd>;
453*0be29f76SMichael Riesch	vccio4-supply = <&vcc1v8>;
454*0be29f76SMichael Riesch	vccio5-supply = <&vcc1v8>;
455*0be29f76SMichael Riesch	vccio6-supply = <&vcc3v3_sw>;
456*0be29f76SMichael Riesch	vccio7-supply = <&vcc3v3_sw>;
457*0be29f76SMichael Riesch	status = "okay";
458*0be29f76SMichael Riesch};
459*0be29f76SMichael Riesch
460*0be29f76SMichael Riesch&saradc {
461*0be29f76SMichael Riesch	vref-supply = <&vcc1v8a>;
462*0be29f76SMichael Riesch	status = "okay";
463*0be29f76SMichael Riesch};
464*0be29f76SMichael Riesch
465*0be29f76SMichael Riesch&sdhci {
466*0be29f76SMichael Riesch	bus-width = <8>;
467*0be29f76SMichael Riesch	max-frequency = <200000000>;
468*0be29f76SMichael Riesch	non-removable;
469*0be29f76SMichael Riesch	pinctrl-names = "default";
470*0be29f76SMichael Riesch	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
471*0be29f76SMichael Riesch	vmmc-supply = <&vcc3v3_sw>;
472*0be29f76SMichael Riesch	vqmmc-supply = <&vcc1v8>;
473*0be29f76SMichael Riesch	status = "okay";
474*0be29f76SMichael Riesch};
475*0be29f76SMichael Riesch
476*0be29f76SMichael Riesch&tsadc {
477*0be29f76SMichael Riesch	rockchip,hw-tshut-mode = <1>;
478*0be29f76SMichael Riesch	rockchip,hw-tshut-polarity = <0>;
479*0be29f76SMichael Riesch	status = "okay";
480*0be29f76SMichael Riesch};
481*0be29f76SMichael Riesch
482*0be29f76SMichael Riesch&uart2 {
483*0be29f76SMichael Riesch	status = "okay";
484*0be29f76SMichael Riesch};
485*0be29f76SMichael Riesch
486*0be29f76SMichael Riesch&usb_host0_xhci {
487*0be29f76SMichael Riesch	dr_mode = "peripheral";
488*0be29f76SMichael Riesch	/* The following quirks are required since the bInterval is 1 and we
489*0be29f76SMichael Riesch	 * handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3
490*0be29f76SMichael Riesch	 * ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries").
491*0be29f76SMichael Riesch	 */
492*0be29f76SMichael Riesch	snps,dis-u1-entry-quirk;
493*0be29f76SMichael Riesch	snps,dis-u2-entry-quirk;
494*0be29f76SMichael Riesch	/*
495*0be29f76SMichael Riesch	 * Without this quirk the available fifosize seems to be miscalculated
496*0be29f76SMichael Riesch	 * in cases where many endpoints are used. In one particular situation
497*0be29f76SMichael Riesch	 * 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers
498*0be29f76SMichael Riesch	 * without the resize quirk.
499*0be29f76SMichael Riesch	 */
500*0be29f76SMichael Riesch	tx-fifo-resize;
501*0be29f76SMichael Riesch
502*0be29f76SMichael Riesch	status = "okay";
503*0be29f76SMichael Riesch};
504*0be29f76SMichael Riesch
505*0be29f76SMichael Riesch&usb2phy0 {
506*0be29f76SMichael Riesch	status = "okay";
507*0be29f76SMichael Riesch};
508*0be29f76SMichael Riesch
509*0be29f76SMichael Riesch&usb2phy0_otg {
510*0be29f76SMichael Riesch	status = "okay";
511*0be29f76SMichael Riesch};
512*0be29f76SMichael Riesch
513*0be29f76SMichael Riesch&vop {
514*0be29f76SMichael Riesch	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP2>;
515*0be29f76SMichael Riesch	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
516*0be29f76SMichael Riesch	status = "okay";
517*0be29f76SMichael Riesch};
518*0be29f76SMichael Riesch
519*0be29f76SMichael Riesch&vop_mmu {
520*0be29f76SMichael Riesch	status = "okay";
521*0be29f76SMichael Riesch};
522*0be29f76SMichael Riesch
523*0be29f76SMichael Riesch&vp0 {
524*0be29f76SMichael Riesch	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
525*0be29f76SMichael Riesch		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
526*0be29f76SMichael Riesch		remote-endpoint = <&hdmi_in_vp0>;
527*0be29f76SMichael Riesch	};
528*0be29f76SMichael Riesch};
529