1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include <dt-bindings/soc/rockchip,vop2.h> 11#include "rk3568.dtsi" 12 13/ { 14 model = "Firefly Station P2"; 15 compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; 16 17 aliases { 18 ethernet0 = &gmac0; 19 ethernet1 = &gmac1; 20 mmc0 = &sdmmc0; 21 mmc1 = &sdhci; 22 }; 23 24 chosen: chosen { 25 stdout-path = "serial2:1500000n8"; 26 }; 27 28 dc_12v: dc-12v-regulator { 29 compatible = "regulator-fixed"; 30 regulator-name = "dc_12v"; 31 regulator-always-on; 32 regulator-boot-on; 33 regulator-min-microvolt = <12000000>; 34 regulator-max-microvolt = <12000000>; 35 }; 36 37 gmac0_clkin: external-gmac0-clock { 38 compatible = "fixed-clock"; 39 clock-frequency = <125000000>; 40 clock-output-names = "gmac0_clkin"; 41 #clock-cells = <0>; 42 }; 43 44 gmac1_clkin: external-gmac1-clock { 45 compatible = "fixed-clock"; 46 clock-frequency = <125000000>; 47 clock-output-names = "gmac1_clkin"; 48 #clock-cells = <0>; 49 }; 50 51 leds { 52 compatible = "gpio-leds"; 53 54 led-user { 55 label = "user-led"; 56 default-state = "on"; 57 gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 58 linux,default-trigger = "heartbeat"; 59 pinctrl-names = "default"; 60 pinctrl-0 = <&user_led_enable_h>; 61 retain-state-suspended; 62 }; 63 }; 64 65 hdmi-con { 66 compatible = "hdmi-connector"; 67 type = "a"; 68 69 port { 70 hdmi_con_in: endpoint { 71 remote-endpoint = <&hdmi_out_con>; 72 }; 73 }; 74 }; 75 76 pcie30_avdd0v9: pcie30-avdd0v9-regulator { 77 compatible = "regulator-fixed"; 78 regulator-name = "pcie30_avdd0v9"; 79 regulator-always-on; 80 regulator-boot-on; 81 regulator-min-microvolt = <900000>; 82 regulator-max-microvolt = <900000>; 83 vin-supply = <&vcc3v3_sys>; 84 }; 85 86 pcie30_avdd1v8: pcie30-avdd1v8-regulator { 87 compatible = "regulator-fixed"; 88 regulator-name = "pcie30_avdd1v8"; 89 regulator-always-on; 90 regulator-boot-on; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 vin-supply = <&vcc3v3_sys>; 94 }; 95 96 vcc3v3_sys: vcc3v3-sys-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "vcc3v3_sys"; 99 regulator-always-on; 100 regulator-boot-on; 101 regulator-min-microvolt = <3300000>; 102 regulator-max-microvolt = <3300000>; 103 vin-supply = <&dc_12v>; 104 }; 105 106 vcc3v3_pcie: vcc3v3-pcie-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "vcc3v3_pcie"; 109 enable-active-high; 110 regulator-min-microvolt = <3300000>; 111 regulator-max-microvolt = <3300000>; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&vcc3v3_pcie_en_pin>; 114 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 115 startup-delay-us = <5000>; 116 vin-supply = <&vcc5v0_sys>; 117 }; 118 119 vcc5v0_sys: vcc5v0-sys-regulator { 120 compatible = "regulator-fixed"; 121 regulator-name = "vcc5v0_sys"; 122 regulator-always-on; 123 regulator-boot-on; 124 regulator-min-microvolt = <5000000>; 125 regulator-max-microvolt = <5000000>; 126 vin-supply = <&dc_12v>; 127 }; 128 129 vcc5v0_usb: vcc5v0-usb-regulator { 130 compatible = "regulator-fixed"; 131 regulator-name = "vcc5v0_usb"; 132 regulator-always-on; 133 regulator-boot-on; 134 regulator-min-microvolt = <5000000>; 135 regulator-max-microvolt = <5000000>; 136 vin-supply = <&vcc5v0_sys>; 137 }; 138 139 vcc5v0_host: vcc5v0-host-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "vcc5v0_host"; 142 enable-active-high; 143 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&vcc5v0_host_en>; 146 regulator-always-on; 147 vin-supply = <&vcc5v0_usb>; 148 }; 149 150 vcc5v0_otg: vcc5v0-otg-regulator { 151 compatible = "regulator-fixed"; 152 regulator-name = "vcc5v0_otg"; 153 enable-active-high; 154 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 155 pinctrl-names = "default"; 156 pinctrl-0 = <&vcc5v0_otg_en>; 157 vin-supply = <&vcc5v0_usb>; 158 }; 159}; 160 161&combphy0 { 162 /* used for USB3 */ 163 status = "okay"; 164}; 165 166&combphy1 { 167 /* used for USB3 */ 168 status = "okay"; 169}; 170 171&combphy2 { 172 /* used for SATA */ 173 status = "okay"; 174}; 175 176&gmac0 { 177 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 178 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; 179 clock_in_out = "input"; 180 pinctrl-names = "default"; 181 pinctrl-0 = <&gmac0_miim 182 &gmac0_tx_bus2 183 &gmac0_rx_bus2 184 &gmac0_rgmii_clk 185 &gmac0_rgmii_bus 186 &gmac0_clkinout>; 187 phy-handle = <&rgmii_phy0>; 188 phy-mode = "rgmii"; 189 snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 190 snps,reset-active-low; 191 /* Reset time is 20ms, 100ms for rtl8211f */ 192 snps,reset-delays-us = <0 20000 100000>; 193 tx_delay = <0x3c>; 194 rx_delay = <0x2f>; 195 status = "okay"; 196}; 197 198&gmac1 { 199 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 200 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; 201 clock_in_out = "input"; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&gmac1m1_miim 204 &gmac1m1_tx_bus2 205 &gmac1m1_rx_bus2 206 &gmac1m1_rgmii_clk 207 &gmac1m1_rgmii_bus 208 &gmac1m1_clkinout>; 209 phy-handle = <&rgmii_phy1>; 210 phy-mode = "rgmii"; 211 snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; 212 snps,reset-active-low; 213 /* Reset time is 20ms, 100ms for rtl8211f */ 214 snps,reset-delays-us = <0 20000 100000>; 215 tx_delay = <0x4f>; 216 rx_delay = <0x26>; 217 status = "okay"; 218}; 219 220&gpu { 221 mali-supply = <&vdd_gpu>; 222 status = "okay"; 223}; 224 225&hdmi { 226 avdd-0v9-supply = <&vdda0v9_image>; 227 avdd-1v8-supply = <&vcca1v8_image>; 228 status = "okay"; 229}; 230 231&hdmi_in { 232 hdmi_in_vp0: endpoint { 233 remote-endpoint = <&vp0_out_hdmi>; 234 }; 235}; 236 237&hdmi_out { 238 hdmi_out_con: endpoint { 239 remote-endpoint = <&hdmi_con_in>; 240 }; 241}; 242 243&hdmi_sound { 244 status = "okay"; 245}; 246 247&i2c0 { 248 status = "okay"; 249 250 rk809: pmic@20 { 251 compatible = "rockchip,rk809"; 252 reg = <0x20>; 253 interrupt-parent = <&gpio0>; 254 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 255 #clock-cells = <1>; 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pmic_int>; 258 rockchip,system-power-controller; 259 vcc1-supply = <&vcc3v3_sys>; 260 vcc2-supply = <&vcc3v3_sys>; 261 vcc3-supply = <&vcc3v3_sys>; 262 vcc4-supply = <&vcc3v3_sys>; 263 vcc5-supply = <&vcc3v3_sys>; 264 vcc6-supply = <&vcc3v3_sys>; 265 vcc7-supply = <&vcc3v3_sys>; 266 vcc8-supply = <&vcc3v3_sys>; 267 vcc9-supply = <&vcc3v3_sys>; 268 wakeup-source; 269 270 regulators { 271 vdd_logic: DCDC_REG1 { 272 regulator-name = "vdd_logic"; 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-initial-mode = <0x2>; 276 regulator-min-microvolt = <500000>; 277 regulator-max-microvolt = <1350000>; 278 regulator-ramp-delay = <6001>; 279 280 regulator-state-mem { 281 regulator-off-in-suspend; 282 }; 283 }; 284 285 vdd_gpu: DCDC_REG2 { 286 regulator-name = "vdd_gpu"; 287 regulator-initial-mode = <0x2>; 288 regulator-min-microvolt = <500000>; 289 regulator-max-microvolt = <1350000>; 290 regulator-ramp-delay = <6001>; 291 292 regulator-state-mem { 293 regulator-off-in-suspend; 294 }; 295 }; 296 297 vcc_ddr: DCDC_REG3 { 298 regulator-name = "vcc_ddr"; 299 regulator-always-on; 300 regulator-boot-on; 301 regulator-initial-mode = <0x2>; 302 303 regulator-state-mem { 304 regulator-on-in-suspend; 305 }; 306 }; 307 308 vdd_npu: DCDC_REG4 { 309 regulator-name = "vdd_npu"; 310 regulator-initial-mode = <0x2>; 311 regulator-min-microvolt = <500000>; 312 regulator-max-microvolt = <1350000>; 313 regulator-ramp-delay = <6001>; 314 315 regulator-state-mem { 316 regulator-off-in-suspend; 317 }; 318 }; 319 320 vcc_1v8: DCDC_REG5 { 321 regulator-name = "vcc_1v8"; 322 regulator-always-on; 323 regulator-boot-on; 324 regulator-min-microvolt = <1800000>; 325 regulator-max-microvolt = <1800000>; 326 327 regulator-state-mem { 328 regulator-off-in-suspend; 329 }; 330 }; 331 332 vdda0v9_image: LDO_REG1 { 333 regulator-name = "vdda0v9_image"; 334 regulator-min-microvolt = <900000>; 335 regulator-max-microvolt = <900000>; 336 337 regulator-state-mem { 338 regulator-off-in-suspend; 339 }; 340 }; 341 342 vdda_0v9: LDO_REG2 { 343 regulator-name = "vdda_0v9"; 344 regulator-always-on; 345 regulator-boot-on; 346 regulator-min-microvolt = <900000>; 347 regulator-max-microvolt = <900000>; 348 349 regulator-state-mem { 350 regulator-off-in-suspend; 351 }; 352 }; 353 354 vdda0v9_pmu: LDO_REG3 { 355 regulator-name = "vdda0v9_pmu"; 356 regulator-always-on; 357 regulator-boot-on; 358 regulator-min-microvolt = <900000>; 359 regulator-max-microvolt = <900000>; 360 361 regulator-state-mem { 362 regulator-on-in-suspend; 363 regulator-suspend-microvolt = <900000>; 364 }; 365 }; 366 367 vccio_acodec: LDO_REG4 { 368 regulator-name = "vccio_acodec"; 369 regulator-min-microvolt = <3300000>; 370 regulator-max-microvolt = <3300000>; 371 372 regulator-state-mem { 373 regulator-off-in-suspend; 374 }; 375 }; 376 377 vccio_sd: LDO_REG5 { 378 regulator-name = "vccio_sd"; 379 regulator-min-microvolt = <1800000>; 380 regulator-max-microvolt = <3300000>; 381 382 regulator-state-mem { 383 regulator-off-in-suspend; 384 }; 385 }; 386 387 vcc3v3_pmu: LDO_REG6 { 388 regulator-name = "vcc3v3_pmu"; 389 regulator-always-on; 390 regulator-boot-on; 391 regulator-min-microvolt = <3300000>; 392 regulator-max-microvolt = <3300000>; 393 394 regulator-state-mem { 395 regulator-on-in-suspend; 396 regulator-suspend-microvolt = <3300000>; 397 }; 398 }; 399 400 vcca_1v8: LDO_REG7 { 401 regulator-name = "vcca_1v8"; 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <1800000>; 405 regulator-max-microvolt = <1800000>; 406 407 regulator-state-mem { 408 regulator-off-in-suspend; 409 }; 410 }; 411 412 vcca1v8_pmu: LDO_REG8 { 413 regulator-name = "vcca1v8_pmu"; 414 regulator-always-on; 415 regulator-boot-on; 416 regulator-min-microvolt = <1800000>; 417 regulator-max-microvolt = <1800000>; 418 419 regulator-state-mem { 420 regulator-on-in-suspend; 421 regulator-suspend-microvolt = <1800000>; 422 }; 423 }; 424 425 vcca1v8_image: LDO_REG9 { 426 regulator-name = "vcca1v8_image"; 427 regulator-min-microvolt = <1800000>; 428 regulator-max-microvolt = <1800000>; 429 430 regulator-state-mem { 431 regulator-off-in-suspend; 432 }; 433 }; 434 435 vcc_3v3: SWITCH_REG1 { 436 regulator-name = "vcc_3v3"; 437 regulator-always-on; 438 regulator-boot-on; 439 440 regulator-state-mem { 441 regulator-off-in-suspend; 442 }; 443 }; 444 445 vcc3v3_sd: SWITCH_REG2 { 446 regulator-name = "vcc3v3_sd"; 447 regulator-always-on; 448 regulator-boot-on; 449 450 regulator-state-mem { 451 regulator-off-in-suspend; 452 }; 453 }; 454 }; 455 }; 456}; 457 458&i2s0_8ch { 459 status = "okay"; 460}; 461 462&mdio0 { 463 rgmii_phy0: phy@0 { 464 compatible = "ethernet-phy-ieee802.3-c22"; 465 reg = <0x0>; 466 }; 467}; 468 469&mdio1 { 470 rgmii_phy1: phy@0 { 471 compatible = "ethernet-phy-ieee802.3-c22"; 472 reg = <0x0>; 473 }; 474}; 475 476&pcie30phy { 477 status = "okay"; 478}; 479 480&pcie3x2 { 481 pinctrl-names = "default"; 482 pinctrl-0 = <&pcie_reset_pin>; 483 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 484 vpcie3v3-supply = <&vcc3v3_pcie>; 485 status = "okay"; 486}; 487 488&pinctrl { 489 leds { 490 user_led_enable_h: user-led-enable-h { 491 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 492 }; 493 }; 494 495 usb { 496 vcc5v0_host_en: vcc5v0-host-en { 497 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 498 }; 499 500 vcc5v0_otg_en: vcc5v0-otg-en { 501 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 502 }; 503 }; 504 505 pcie { 506 pcie_reset_pin: pcie-reset-pin { 507 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 508 }; 509 vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { 510 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 511 }; 512 }; 513 514 pmic { 515 pmic_int: pmic-int { 516 rockchip,pins = 517 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 518 }; 519 }; 520}; 521 522&pmu_io_domains { 523 pmuio1-supply = <&vcc3v3_pmu>; 524 pmuio2-supply = <&vcc3v3_pmu>; 525 vccio1-supply = <&vccio_acodec>; 526 vccio2-supply = <&vcc_1v8>; 527 vccio3-supply = <&vccio_sd>; 528 vccio4-supply = <&vcc_1v8>; 529 vccio5-supply = <&vcc_3v3>; 530 vccio6-supply = <&vcc_1v8>; 531 vccio7-supply = <&vcc_3v3>; 532 status = "okay"; 533}; 534 535&saradc { 536 vref-supply = <&vcca_1v8>; 537 status = "okay"; 538}; 539 540&sata2 { 541 status = "okay"; 542}; 543 544&sdhci { 545 bus-width = <8>; 546 max-frequency = <200000000>; 547 non-removable; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 550 status = "okay"; 551}; 552 553&sdmmc0 { 554 bus-width = <4>; 555 cap-sd-highspeed; 556 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 557 disable-wp; 558 pinctrl-names = "default"; 559 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 560 sd-uhs-sdr104; 561 vmmc-supply = <&vcc3v3_sd>; 562 vqmmc-supply = <&vccio_sd>; 563 status = "okay"; 564}; 565 566&tsadc { 567 status = "okay"; 568}; 569 570&uart2 { 571 status = "okay"; 572}; 573 574&usb2phy0_host { 575 phy-supply = <&vcc5v0_host>; 576 status = "okay"; 577}; 578 579&usb2phy0 { 580 status = "okay"; 581}; 582 583&usb2phy1 { 584 status = "okay"; 585}; 586 587&usb2phy0_otg { 588 status = "okay"; 589}; 590 591&usb2phy1_host { 592 phy-supply = <&vcc5v0_host>; 593 status = "okay"; 594}; 595 596&usb2phy1_otg { 597 phy-supply = <&vcc5v0_host>; 598 status = "okay"; 599}; 600 601&usb_host0_ehci { 602 status = "okay"; 603}; 604 605&usb_host0_ohci { 606 status = "okay"; 607}; 608 609&usb_host1_ehci { 610 status = "okay"; 611}; 612 613&usb_host1_ohci { 614 status = "okay"; 615}; 616 617&usb_host0_xhci { 618 status = "okay"; 619}; 620 621&usb_host1_xhci { 622 status = "okay"; 623}; 624 625&vp0 { 626 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 627 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 628 remote-endpoint = <&hdmi_in_vp0>; 629 }; 630}; 631 632&vop { 633 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 634 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 635 status = "okay"; 636}; 637 638&vop_mmu { 639 status = "okay"; 640}; 641