xref: /linux/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts (revision 6f47c7ae8c7afaf9ad291d39f0d3974f191a7946)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include <dt-bindings/soc/rockchip,vop2.h>
11#include "rk3568.dtsi"
12
13/ {
14	model = "Firefly Station P2";
15	compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568";
16
17	aliases {
18		ethernet0 = &gmac0;
19		ethernet1 = &gmac1;
20		mmc0 = &sdmmc0;
21		mmc1 = &sdhci;
22	};
23
24	chosen: chosen {
25		stdout-path = "serial2:1500000n8";
26	};
27
28	dc_12v: dc-12v-regulator {
29		compatible = "regulator-fixed";
30		regulator-name = "dc_12v";
31		regulator-always-on;
32		regulator-boot-on;
33		regulator-min-microvolt = <12000000>;
34		regulator-max-microvolt = <12000000>;
35	};
36
37	gmac0_clkin: external-gmac0-clock {
38		compatible = "fixed-clock";
39		clock-frequency = <125000000>;
40		clock-output-names = "gmac0_clkin";
41		#clock-cells = <0>;
42	};
43
44	gmac1_clkin: external-gmac1-clock {
45		compatible = "fixed-clock";
46		clock-frequency = <125000000>;
47		clock-output-names = "gmac1_clkin";
48		#clock-cells = <0>;
49	};
50
51	leds {
52		compatible = "gpio-leds";
53
54		led-user {
55			label = "user-led";
56			default-state = "on";
57			gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
58			linux,default-trigger = "heartbeat";
59			pinctrl-names = "default";
60			pinctrl-0 = <&user_led_enable_h>;
61			retain-state-suspended;
62		};
63	};
64
65	hdmi-con {
66		compatible = "hdmi-connector";
67		type = "a";
68
69		port {
70			hdmi_con_in: endpoint {
71				remote-endpoint = <&hdmi_out_con>;
72			};
73		};
74	};
75
76	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
77		compatible = "regulator-fixed";
78		regulator-name = "pcie30_avdd0v9";
79		regulator-always-on;
80		regulator-boot-on;
81		regulator-min-microvolt = <900000>;
82		regulator-max-microvolt = <900000>;
83		vin-supply = <&vcc3v3_sys>;
84	};
85
86	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
87		compatible = "regulator-fixed";
88		regulator-name = "pcie30_avdd1v8";
89		regulator-always-on;
90		regulator-boot-on;
91		regulator-min-microvolt = <1800000>;
92		regulator-max-microvolt = <1800000>;
93		vin-supply = <&vcc3v3_sys>;
94	};
95
96	vcc3v3_sys: vcc3v3-sys-regulator {
97		compatible = "regulator-fixed";
98		regulator-name = "vcc3v3_sys";
99		regulator-always-on;
100		regulator-boot-on;
101		regulator-min-microvolt = <3300000>;
102		regulator-max-microvolt = <3300000>;
103		vin-supply = <&dc_12v>;
104	};
105
106	vcc3v3_pcie: vcc3v3-pcie-regulator {
107		compatible = "regulator-fixed";
108		regulator-name = "vcc3v3_pcie";
109		enable-active-high;
110		regulator-min-microvolt = <3300000>;
111		regulator-max-microvolt = <3300000>;
112		pinctrl-names = "default";
113		pinctrl-0 = <&vcc3v3_pcie_en_pin>;
114		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
115		startup-delay-us = <5000>;
116		vin-supply = <&vcc5v0_sys>;
117	};
118
119	vcc5v0_sys: vcc5v0-sys-regulator {
120		compatible = "regulator-fixed";
121		regulator-name = "vcc5v0_sys";
122		regulator-always-on;
123		regulator-boot-on;
124		regulator-min-microvolt = <5000000>;
125		regulator-max-microvolt = <5000000>;
126		vin-supply = <&dc_12v>;
127	};
128
129	vcc5v0_usb: vcc5v0-usb-regulator {
130		compatible = "regulator-fixed";
131		regulator-name = "vcc5v0_usb";
132		regulator-always-on;
133		regulator-boot-on;
134		regulator-min-microvolt = <5000000>;
135		regulator-max-microvolt = <5000000>;
136		vin-supply = <&vcc5v0_sys>;
137	};
138
139	vcc5v0_host: vcc5v0-host-regulator {
140		compatible = "regulator-fixed";
141		regulator-name = "vcc5v0_host";
142		enable-active-high;
143		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
144		pinctrl-names = "default";
145		pinctrl-0 = <&vcc5v0_host_en>;
146		regulator-always-on;
147		vin-supply = <&vcc5v0_usb>;
148	};
149
150	vcc5v0_otg: vcc5v0-otg-regulator {
151		compatible = "regulator-fixed";
152		regulator-name = "vcc5v0_otg";
153		enable-active-high;
154		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
155		pinctrl-names = "default";
156		pinctrl-0 = <&vcc5v0_otg_en>;
157		vin-supply = <&vcc5v0_usb>;
158	};
159};
160
161&combphy0 {
162	/* used for USB3 */
163	status = "okay";
164};
165
166&combphy1 {
167	/* used for USB3 */
168	status = "okay";
169};
170
171&combphy2 {
172	/* used for SATA */
173	status = "okay";
174};
175
176&gmac0 {
177	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
178	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
179	clock_in_out = "input";
180	pinctrl-names = "default";
181	pinctrl-0 = <&gmac0_miim
182			&gmac0_tx_bus2
183			&gmac0_rx_bus2
184			&gmac0_rgmii_clk
185			&gmac0_rgmii_bus
186			&gmac0_clkinout>;
187	phy-handle = <&rgmii_phy0>;
188	phy-mode = "rgmii";
189	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
190	snps,reset-active-low;
191	/* Reset time is 20ms, 100ms for rtl8211f */
192	snps,reset-delays-us = <0 20000 100000>;
193	tx_delay = <0x3c>;
194	rx_delay = <0x2f>;
195	status = "okay";
196};
197
198&gmac1 {
199	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
200	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
201	clock_in_out = "input";
202	pinctrl-names = "default";
203	pinctrl-0 = <&gmac1m1_miim
204			&gmac1m1_tx_bus2
205			&gmac1m1_rx_bus2
206			&gmac1m1_rgmii_clk
207			&gmac1m1_rgmii_bus
208			&gmac1m1_clkinout>;
209	phy-handle = <&rgmii_phy1>;
210	phy-mode = "rgmii";
211	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
212	snps,reset-active-low;
213	/* Reset time is 20ms, 100ms for rtl8211f */
214	snps,reset-delays-us = <0 20000 100000>;
215	tx_delay = <0x4f>;
216	rx_delay = <0x26>;
217	status = "okay";
218};
219
220&gpu {
221	mali-supply = <&vdd_gpu>;
222	status = "okay";
223};
224
225&hdmi {
226	avdd-0v9-supply = <&vdda0v9_image>;
227	avdd-1v8-supply = <&vcca1v8_image>;
228	status = "okay";
229};
230
231&hdmi_in {
232	hdmi_in_vp0: endpoint {
233		remote-endpoint = <&vp0_out_hdmi>;
234	};
235};
236
237&hdmi_out {
238	hdmi_out_con: endpoint {
239		remote-endpoint = <&hdmi_con_in>;
240	};
241};
242
243&hdmi_sound {
244	status = "okay";
245};
246
247&i2c0 {
248	status = "okay";
249
250	rk809: pmic@20 {
251		compatible = "rockchip,rk809";
252		reg = <0x20>;
253		interrupt-parent = <&gpio0>;
254		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
255		#clock-cells = <1>;
256		pinctrl-names = "default";
257		pinctrl-0 = <&pmic_int>;
258		rockchip,system-power-controller;
259		vcc1-supply = <&vcc3v3_sys>;
260		vcc2-supply = <&vcc3v3_sys>;
261		vcc3-supply = <&vcc3v3_sys>;
262		vcc4-supply = <&vcc3v3_sys>;
263		vcc5-supply = <&vcc3v3_sys>;
264		vcc6-supply = <&vcc3v3_sys>;
265		vcc7-supply = <&vcc3v3_sys>;
266		vcc8-supply = <&vcc3v3_sys>;
267		vcc9-supply = <&vcc3v3_sys>;
268		wakeup-source;
269
270		regulators {
271			vdd_logic: DCDC_REG1 {
272				regulator-name = "vdd_logic";
273				regulator-always-on;
274				regulator-boot-on;
275				regulator-init-microvolt = <900000>;
276				regulator-initial-mode = <0x2>;
277				regulator-min-microvolt = <500000>;
278				regulator-max-microvolt = <1350000>;
279				regulator-ramp-delay = <6001>;
280
281				regulator-state-mem {
282					regulator-off-in-suspend;
283				};
284			};
285
286			vdd_gpu: DCDC_REG2 {
287				regulator-name = "vdd_gpu";
288				regulator-init-microvolt = <900000>;
289				regulator-initial-mode = <0x2>;
290				regulator-min-microvolt = <500000>;
291				regulator-max-microvolt = <1350000>;
292				regulator-ramp-delay = <6001>;
293
294				regulator-state-mem {
295					regulator-off-in-suspend;
296				};
297			};
298
299			vcc_ddr: DCDC_REG3 {
300				regulator-name = "vcc_ddr";
301				regulator-always-on;
302				regulator-boot-on;
303				regulator-initial-mode = <0x2>;
304
305				regulator-state-mem {
306					regulator-on-in-suspend;
307				};
308			};
309
310			vdd_npu: DCDC_REG4 {
311				regulator-name = "vdd_npu";
312				regulator-init-microvolt = <900000>;
313				regulator-initial-mode = <0x2>;
314				regulator-min-microvolt = <500000>;
315				regulator-max-microvolt = <1350000>;
316				regulator-ramp-delay = <6001>;
317
318				regulator-state-mem {
319					regulator-off-in-suspend;
320				};
321			};
322
323			vcc_1v8: DCDC_REG5 {
324				regulator-name = "vcc_1v8";
325				regulator-always-on;
326				regulator-boot-on;
327				regulator-min-microvolt = <1800000>;
328				regulator-max-microvolt = <1800000>;
329
330				regulator-state-mem {
331					regulator-off-in-suspend;
332				};
333			};
334
335			vdda0v9_image: LDO_REG1 {
336				regulator-name = "vdda0v9_image";
337				regulator-min-microvolt = <900000>;
338				regulator-max-microvolt = <900000>;
339
340				regulator-state-mem {
341					regulator-off-in-suspend;
342				};
343			};
344
345			vdda_0v9: LDO_REG2 {
346				regulator-name = "vdda_0v9";
347				regulator-always-on;
348				regulator-boot-on;
349				regulator-min-microvolt = <900000>;
350				regulator-max-microvolt = <900000>;
351
352				regulator-state-mem {
353					regulator-off-in-suspend;
354				};
355			};
356
357			vdda0v9_pmu: LDO_REG3 {
358				regulator-name = "vdda0v9_pmu";
359				regulator-always-on;
360				regulator-boot-on;
361				regulator-min-microvolt = <900000>;
362				regulator-max-microvolt = <900000>;
363
364				regulator-state-mem {
365					regulator-on-in-suspend;
366					regulator-suspend-microvolt = <900000>;
367				};
368			};
369
370			vccio_acodec: LDO_REG4 {
371				regulator-name = "vccio_acodec";
372				regulator-min-microvolt = <3300000>;
373				regulator-max-microvolt = <3300000>;
374
375				regulator-state-mem {
376					regulator-off-in-suspend;
377				};
378			};
379
380			vccio_sd: LDO_REG5 {
381				regulator-name = "vccio_sd";
382				regulator-min-microvolt = <1800000>;
383				regulator-max-microvolt = <3300000>;
384
385				regulator-state-mem {
386					regulator-off-in-suspend;
387				};
388			};
389
390			vcc3v3_pmu: LDO_REG6 {
391				regulator-name = "vcc3v3_pmu";
392				regulator-always-on;
393				regulator-boot-on;
394				regulator-min-microvolt = <3300000>;
395				regulator-max-microvolt = <3300000>;
396
397				regulator-state-mem {
398					regulator-on-in-suspend;
399					regulator-suspend-microvolt = <3300000>;
400				};
401			};
402
403			vcca_1v8: LDO_REG7 {
404				regulator-name = "vcca_1v8";
405				regulator-always-on;
406				regulator-boot-on;
407				regulator-min-microvolt = <1800000>;
408				regulator-max-microvolt = <1800000>;
409
410				regulator-state-mem {
411					regulator-off-in-suspend;
412				};
413			};
414
415			vcca1v8_pmu: LDO_REG8 {
416				regulator-name = "vcca1v8_pmu";
417				regulator-always-on;
418				regulator-boot-on;
419				regulator-min-microvolt = <1800000>;
420				regulator-max-microvolt = <1800000>;
421
422				regulator-state-mem {
423					regulator-on-in-suspend;
424					regulator-suspend-microvolt = <1800000>;
425				};
426			};
427
428			vcca1v8_image: LDO_REG9 {
429				regulator-name = "vcca1v8_image";
430				regulator-min-microvolt = <1800000>;
431				regulator-max-microvolt = <1800000>;
432
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			vcc_3v3: SWITCH_REG1 {
439				regulator-name = "vcc_3v3";
440				regulator-always-on;
441				regulator-boot-on;
442
443				regulator-state-mem {
444					regulator-off-in-suspend;
445				};
446			};
447
448			vcc3v3_sd: SWITCH_REG2 {
449				regulator-name = "vcc3v3_sd";
450				regulator-always-on;
451				regulator-boot-on;
452
453				regulator-state-mem {
454					regulator-off-in-suspend;
455				};
456			};
457		};
458	};
459};
460
461&i2s0_8ch {
462	status = "okay";
463};
464
465&mdio0 {
466	rgmii_phy0: phy@0 {
467		compatible = "ethernet-phy-ieee802.3-c22";
468		reg = <0x0>;
469	};
470};
471
472&mdio1 {
473	rgmii_phy1: phy@0 {
474		compatible = "ethernet-phy-ieee802.3-c22";
475		reg = <0x0>;
476	};
477};
478
479&pcie30phy {
480	status = "okay";
481};
482
483&pcie3x2 {
484	pinctrl-names = "default";
485	pinctrl-0 = <&pcie_reset_pin>;
486	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
487	vpcie3v3-supply = <&vcc3v3_pcie>;
488	status = "okay";
489};
490
491&pinctrl {
492	leds {
493		user_led_enable_h: user-led-enable-h {
494			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
495		};
496	};
497
498	usb {
499		vcc5v0_host_en: vcc5v0-host-en {
500			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
501		};
502
503		vcc5v0_otg_en: vcc5v0-otg-en {
504			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
505		};
506	};
507
508	pcie {
509		pcie_reset_pin: pcie-reset-pin {
510			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
511		};
512		vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
513			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
514		};
515	};
516
517	pmic {
518		pmic_int: pmic-int {
519			rockchip,pins =
520				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
521		};
522	};
523};
524
525&pmu_io_domains {
526	pmuio1-supply = <&vcc3v3_pmu>;
527	pmuio2-supply = <&vcc3v3_pmu>;
528	vccio1-supply = <&vccio_acodec>;
529	vccio2-supply = <&vcc_1v8>;
530	vccio3-supply = <&vccio_sd>;
531	vccio4-supply = <&vcc_1v8>;
532	vccio5-supply = <&vcc_3v3>;
533	vccio6-supply = <&vcc_1v8>;
534	vccio7-supply = <&vcc_3v3>;
535	status = "okay";
536};
537
538&saradc {
539	vref-supply = <&vcca_1v8>;
540	status = "okay";
541};
542
543&sata2 {
544	status = "okay";
545};
546
547&sdhci {
548	bus-width = <8>;
549	max-frequency = <200000000>;
550	non-removable;
551	pinctrl-names = "default";
552	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
553	status = "okay";
554};
555
556&sdmmc0 {
557	bus-width = <4>;
558	cap-sd-highspeed;
559	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
560	disable-wp;
561	pinctrl-names = "default";
562	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
563	sd-uhs-sdr104;
564	vmmc-supply = <&vcc3v3_sd>;
565	vqmmc-supply = <&vccio_sd>;
566	status = "okay";
567};
568
569&tsadc {
570	status = "okay";
571};
572
573&uart2 {
574	status = "okay";
575};
576
577&usb2phy0_host {
578	phy-supply = <&vcc5v0_host>;
579	status = "okay";
580};
581
582&usb2phy0 {
583	status = "okay";
584};
585
586&usb2phy1 {
587	status = "okay";
588};
589
590&usb2phy0_otg {
591	status = "okay";
592};
593
594&usb2phy1_host {
595	phy-supply = <&vcc5v0_host>;
596	status = "okay";
597};
598
599&usb2phy1_otg {
600	phy-supply = <&vcc5v0_host>;
601	status = "okay";
602};
603
604&usb_host0_ehci {
605	status = "okay";
606};
607
608&usb_host0_ohci {
609	status = "okay";
610};
611
612&usb_host1_ehci {
613	status = "okay";
614};
615
616&usb_host1_ohci {
617	status = "okay";
618};
619
620&usb_host0_xhci {
621	status = "okay";
622};
623
624&usb_host1_xhci {
625	status = "okay";
626};
627
628&vp0 {
629	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
630		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
631		remote-endpoint = <&hdmi_in_vp0>;
632	};
633};
634
635&vop {
636	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
637	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
638	status = "okay";
639};
640
641&vop_mmu {
642	status = "okay";
643};
644