xref: /linux/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
16f9dfb73SDavid Jander// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
26f9dfb73SDavid Jander
36f9dfb73SDavid Jander/dts-v1/;
46f9dfb73SDavid Jander#include <dt-bindings/gpio/gpio.h>
56f9dfb73SDavid Jander#include <dt-bindings/leds/common.h>
66f9dfb73SDavid Jander#include <dt-bindings/pinctrl/rockchip.h>
76f9dfb73SDavid Jander#include <dt-bindings/pwm/pwm.h>
86f9dfb73SDavid Jander#include "rk3568.dtsi"
96f9dfb73SDavid Jander
106f9dfb73SDavid Jander/ {
116f9dfb73SDavid Jander	model = "Protonic MECSBC";
126f9dfb73SDavid Jander	compatible = "prt,mecsbc", "rockchip,rk3568";
136f9dfb73SDavid Jander
146f9dfb73SDavid Jander	aliases {
156f9dfb73SDavid Jander		mmc0 = &sdhci;
166f9dfb73SDavid Jander		mmc1 = &sdmmc0;
176f9dfb73SDavid Jander	};
186f9dfb73SDavid Jander
196f9dfb73SDavid Jander	chosen: chosen {
206f9dfb73SDavid Jander		stdout-path = "serial2:1500000n8";
216f9dfb73SDavid Jander	};
226f9dfb73SDavid Jander
236f9dfb73SDavid Jander	tas2562-sound {
246f9dfb73SDavid Jander		compatible = "simple-audio-card";
256f9dfb73SDavid Jander		simple-audio-card,format = "i2s";
266f9dfb73SDavid Jander		simple-audio-card,name = "Speaker";
276f9dfb73SDavid Jander		simple-audio-card,mclk-fs = <256>;
286f9dfb73SDavid Jander
296f9dfb73SDavid Jander		simple-audio-card,cpu {
306f9dfb73SDavid Jander			sound-dai = <&i2s1_8ch>;
316f9dfb73SDavid Jander		};
326f9dfb73SDavid Jander
336f9dfb73SDavid Jander		simple-audio-card,codec {
346f9dfb73SDavid Jander			sound-dai = <&tas2562>;
356f9dfb73SDavid Jander		};
366f9dfb73SDavid Jander	};
376f9dfb73SDavid Jander
386f9dfb73SDavid Jander	vdd_gpu: regulator-vdd-gpu {
396f9dfb73SDavid Jander		compatible = "pwm-regulator";
406f9dfb73SDavid Jander		pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
416f9dfb73SDavid Jander		regulator-name = "vdd_gpu";
426f9dfb73SDavid Jander		regulator-min-microvolt = <915000>;
436f9dfb73SDavid Jander		regulator-max-microvolt = <1000000>;
446f9dfb73SDavid Jander		regulator-always-on;
456f9dfb73SDavid Jander		regulator-boot-on;
466f9dfb73SDavid Jander		regulator-settling-time-up-us = <250>;
476f9dfb73SDavid Jander		pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
486f9dfb73SDavid Jander	};
496f9dfb73SDavid Jander
506f9dfb73SDavid Jander	p3v3: regulator-p3v3 {
516f9dfb73SDavid Jander		compatible = "regulator-fixed";
526f9dfb73SDavid Jander		regulator-name = "p3v3";
536f9dfb73SDavid Jander		regulator-always-on;
546f9dfb73SDavid Jander		regulator-boot-on;
556f9dfb73SDavid Jander		regulator-min-microvolt = <3300000>;
566f9dfb73SDavid Jander		regulator-max-microvolt = <3300000>;
576f9dfb73SDavid Jander	};
586f9dfb73SDavid Jander
596f9dfb73SDavid Jander	p1v8: regulator-p1v8 {
606f9dfb73SDavid Jander		compatible = "regulator-fixed";
616f9dfb73SDavid Jander		regulator-name = "p1v8";
626f9dfb73SDavid Jander		regulator-always-on;
636f9dfb73SDavid Jander		regulator-boot-on;
646f9dfb73SDavid Jander		regulator-min-microvolt = <1800000>;
656f9dfb73SDavid Jander		regulator-max-microvolt = <1800000>;
666f9dfb73SDavid Jander	};
676f9dfb73SDavid Jander
686f9dfb73SDavid Jander	vcc_sd: regulator-sd {
696f9dfb73SDavid Jander		compatible = "regulator-gpio";
706f9dfb73SDavid Jander		enable-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
716f9dfb73SDavid Jander		enable-active-high;
726f9dfb73SDavid Jander		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
736f9dfb73SDavid Jander		regulator-name = "sdcard-gpio-supply";
746f9dfb73SDavid Jander		regulator-min-microvolt = <1800000>;
756f9dfb73SDavid Jander		regulator-max-microvolt = <3300000>;
766f9dfb73SDavid Jander		states = <1800000 0x1>, <3300000 0x0>;
776f9dfb73SDavid Jander	};
786f9dfb73SDavid Jander
796f9dfb73SDavid Jander	vdd_npu: regulator-vdd-npu {
806f9dfb73SDavid Jander		compatible = "pwm-regulator";
816f9dfb73SDavid Jander		pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
826f9dfb73SDavid Jander		regulator-name = "vdd_npu";
836f9dfb73SDavid Jander		regulator-min-microvolt = <915000>;
846f9dfb73SDavid Jander		regulator-max-microvolt = <1000000>;
856f9dfb73SDavid Jander		regulator-always-on;
866f9dfb73SDavid Jander		regulator-boot-on;
876f9dfb73SDavid Jander		regulator-settling-time-up-us = <250>;
886f9dfb73SDavid Jander		pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
896f9dfb73SDavid Jander	};
906f9dfb73SDavid Jander};
916f9dfb73SDavid Jander
92*e00bf111SDavid Jander&can0 {
93*e00bf111SDavid Jander	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
94*e00bf111SDavid Jander	pinctrl-names = "default";
95*e00bf111SDavid Jander	pinctrl-0 = <&can0m0_pins>;
96*e00bf111SDavid Jander	status = "okay";
97*e00bf111SDavid Jander};
98*e00bf111SDavid Jander
99*e00bf111SDavid Jander&can1 {
100*e00bf111SDavid Jander	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
101*e00bf111SDavid Jander	pinctrl-names = "default";
102*e00bf111SDavid Jander	pinctrl-0 = <&can1m1_pins>;
103*e00bf111SDavid Jander	status = "okay";
104*e00bf111SDavid Jander};
105*e00bf111SDavid Jander
1066f9dfb73SDavid Jander&combphy0 {
1076f9dfb73SDavid Jander	status = "okay";
1086f9dfb73SDavid Jander};
1096f9dfb73SDavid Jander
1106f9dfb73SDavid Jander&combphy1 {
1116f9dfb73SDavid Jander	status = "okay";
1126f9dfb73SDavid Jander};
1136f9dfb73SDavid Jander
1146f9dfb73SDavid Jander&combphy2 {
1156f9dfb73SDavid Jander	status = "okay";
1166f9dfb73SDavid Jander};
1176f9dfb73SDavid Jander
1186f9dfb73SDavid Jander&cpu0 {
1196f9dfb73SDavid Jander	cpu-supply = <&vdd_cpu>;
1206f9dfb73SDavid Jander};
1216f9dfb73SDavid Jander
1226f9dfb73SDavid Jander&cpu1 {
1236f9dfb73SDavid Jander	cpu-supply = <&vdd_cpu>;
1246f9dfb73SDavid Jander};
1256f9dfb73SDavid Jander
1266f9dfb73SDavid Jander&cpu2 {
1276f9dfb73SDavid Jander	cpu-supply = <&vdd_cpu>;
1286f9dfb73SDavid Jander};
1296f9dfb73SDavid Jander
1306f9dfb73SDavid Jander&cpu3 {
1316f9dfb73SDavid Jander	cpu-supply = <&vdd_cpu>;
1326f9dfb73SDavid Jander};
1336f9dfb73SDavid Jander
1346f9dfb73SDavid Jander&gmac1 {
1356f9dfb73SDavid Jander	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
1366f9dfb73SDavid Jander	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
1376f9dfb73SDavid Jander	phy-handle = <&rgmii_phy1>;
1386f9dfb73SDavid Jander	phy-mode = "rgmii-id";
1396f9dfb73SDavid Jander	clock_in_out = "output";
1406f9dfb73SDavid Jander	pinctrl-names = "default";
1416f9dfb73SDavid Jander	pinctrl-0 = <&gmac1m1_miim
1426f9dfb73SDavid Jander		     &gmac1m1_tx_bus2
1436f9dfb73SDavid Jander		     &gmac1m1_rx_bus2
1446f9dfb73SDavid Jander		     &gmac1m1_rgmii_clk
1456f9dfb73SDavid Jander		     &gmac1m1_clkinout
1466f9dfb73SDavid Jander		     &gmac1m1_rgmii_bus>;
1476f9dfb73SDavid Jander	status = "okay";
1486f9dfb73SDavid Jander};
1496f9dfb73SDavid Jander
1506f9dfb73SDavid Jander&gpu {
1516f9dfb73SDavid Jander	mali-supply = <&vdd_gpu>;
1526f9dfb73SDavid Jander	status = "okay";
1536f9dfb73SDavid Jander};
1546f9dfb73SDavid Jander
1556f9dfb73SDavid Jander&gpu_opp_table {
1566f9dfb73SDavid Jander	compatible = "operating-points-v2";
1576f9dfb73SDavid Jander
1586f9dfb73SDavid Jander	opp-200000000 {
1596f9dfb73SDavid Jander		opp-hz = /bits/ 64 <200000000>;
1606f9dfb73SDavid Jander		opp-microvolt = <915000>;
1616f9dfb73SDavid Jander	};
1626f9dfb73SDavid Jander
1636f9dfb73SDavid Jander	opp-300000000 {
1646f9dfb73SDavid Jander		opp-hz = /bits/ 64 <300000000>;
1656f9dfb73SDavid Jander		opp-microvolt = <915000>;
1666f9dfb73SDavid Jander	};
1676f9dfb73SDavid Jander
1686f9dfb73SDavid Jander	opp-400000000 {
1696f9dfb73SDavid Jander		opp-hz = /bits/ 64 <400000000>;
1706f9dfb73SDavid Jander		opp-microvolt = <915000>;
1716f9dfb73SDavid Jander	};
1726f9dfb73SDavid Jander
1736f9dfb73SDavid Jander	opp-600000000 {
1746f9dfb73SDavid Jander		opp-hz = /bits/ 64 <600000000>;
1756f9dfb73SDavid Jander		opp-microvolt = <920000>;
1766f9dfb73SDavid Jander	};
1776f9dfb73SDavid Jander
1786f9dfb73SDavid Jander	opp-700000000 {
1796f9dfb73SDavid Jander		opp-hz = /bits/ 64 <700000000>;
1806f9dfb73SDavid Jander		opp-microvolt = <950000>;
1816f9dfb73SDavid Jander	};
1826f9dfb73SDavid Jander
1836f9dfb73SDavid Jander	opp-800000000 {
1846f9dfb73SDavid Jander		opp-hz = /bits/ 64 <800000000>;
1856f9dfb73SDavid Jander		opp-microvolt = <1000000>;
1866f9dfb73SDavid Jander	};
1876f9dfb73SDavid Jander};
1886f9dfb73SDavid Jander
1896f9dfb73SDavid Jander&i2c0 {
1906f9dfb73SDavid Jander	status = "okay";
1916f9dfb73SDavid Jander
1926f9dfb73SDavid Jander	vdd_cpu: regulator@60 {
1936f9dfb73SDavid Jander		compatible = "fcs,fan53555";
1946f9dfb73SDavid Jander		reg = <0x60>;
1956f9dfb73SDavid Jander		fcs,suspend-voltage-selector = <1>;
1966f9dfb73SDavid Jander		regulator-name = "vdd_cpu";
1976f9dfb73SDavid Jander		regulator-always-on;
1986f9dfb73SDavid Jander		regulator-boot-on;
1996f9dfb73SDavid Jander		regulator-min-microvolt = <800000>;
2006f9dfb73SDavid Jander		regulator-max-microvolt = <1150000>;
2016f9dfb73SDavid Jander		regulator-ramp-delay = <2300>;
2026f9dfb73SDavid Jander
2036f9dfb73SDavid Jander		regulator-state-mem {
2046f9dfb73SDavid Jander			regulator-off-in-suspend;
2056f9dfb73SDavid Jander		};
2066f9dfb73SDavid Jander	};
2076f9dfb73SDavid Jander};
2086f9dfb73SDavid Jander
2096f9dfb73SDavid Jander&i2c2 {
2106f9dfb73SDavid Jander	status = "okay";
2116f9dfb73SDavid Jander	pinctrl-names = "default";
2126f9dfb73SDavid Jander	pinctrl-0 = <&i2c2m0_xfer>;
2136f9dfb73SDavid Jander};
2146f9dfb73SDavid Jander
2156f9dfb73SDavid Jander&i2c3 {
2166f9dfb73SDavid Jander	pinctrl-names = "default";
2176f9dfb73SDavid Jander	pinctrl-0 = <&i2c3m0_xfer>;
2186f9dfb73SDavid Jander	status = "okay";
2196f9dfb73SDavid Jander
2206f9dfb73SDavid Jander	tas2562: amplifier@4c {
2216f9dfb73SDavid Jander		compatible = "ti,tas2562";
2226f9dfb73SDavid Jander		reg = <0x4c>;
2236f9dfb73SDavid Jander		#sound-dai-cells = <0>;
2246f9dfb73SDavid Jander		shutdown-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
2256f9dfb73SDavid Jander		interrupt-parent = <&gpio1>;
2266f9dfb73SDavid Jander		pinctrl-names = "default";
2276f9dfb73SDavid Jander		pinctrl-0 = <&pinctrl_tas2562>;
2286f9dfb73SDavid Jander		interrupts = <RK_PD1 IRQ_TYPE_LEVEL_LOW>;
2296f9dfb73SDavid Jander		ti,imon-slot-no = <0>;
2306f9dfb73SDavid Jander	};
2316f9dfb73SDavid Jander};
2326f9dfb73SDavid Jander
2336f9dfb73SDavid Jander&i2c5 {
2346f9dfb73SDavid Jander	status = "okay";
2356f9dfb73SDavid Jander
2366f9dfb73SDavid Jander	temperature-sensor@48 {
2376f9dfb73SDavid Jander		compatible = "ti,tmp1075";
2386f9dfb73SDavid Jander		reg = <0x48>;
2396f9dfb73SDavid Jander	};
2406f9dfb73SDavid Jander
2416f9dfb73SDavid Jander	rtc@51 {
2426f9dfb73SDavid Jander		compatible = "nxp,pcf85363";
2436f9dfb73SDavid Jander		reg = <0x51>;
2446f9dfb73SDavid Jander		#clock-cells = <0>;
2456f9dfb73SDavid Jander		clock-output-names = "rtcic_32kout";
2466f9dfb73SDavid Jander	};
2476f9dfb73SDavid Jander};
2486f9dfb73SDavid Jander
2496f9dfb73SDavid Jander&i2s1_8ch {
2506f9dfb73SDavid Jander	pinctrl-names = "default";
2516f9dfb73SDavid Jander	pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
2526f9dfb73SDavid Jander	rockchip,trcm-sync-tx-only;
2536f9dfb73SDavid Jander	status = "okay";
2546f9dfb73SDavid Jander};
2556f9dfb73SDavid Jander
2566f9dfb73SDavid Jander&mdio1 {
2576f9dfb73SDavid Jander	rgmii_phy1: ethernet-phy@2 {
2586f9dfb73SDavid Jander		compatible = "ethernet-phy-ieee802.3-c22";
2596f9dfb73SDavid Jander		reg = <0x2>;
2606f9dfb73SDavid Jander		pinctrl-names = "default";
2616f9dfb73SDavid Jander		pinctrl-0 = <&eth_phy1_rst>;
2626f9dfb73SDavid Jander		reset-assert-us = <20000>;
2636f9dfb73SDavid Jander		reset-deassert-us = <100000>;
2646f9dfb73SDavid Jander		reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
2656f9dfb73SDavid Jander	};
2666f9dfb73SDavid Jander};
2676f9dfb73SDavid Jander
2686f9dfb73SDavid Jander&pcie2x1 {
2696f9dfb73SDavid Jander	pinctrl-names = "default";
2706f9dfb73SDavid Jander	pinctrl-0 = <&pcie20m1_pins>;
2716f9dfb73SDavid Jander	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
2726f9dfb73SDavid Jander	status = "okay";
2736f9dfb73SDavid Jander};
2746f9dfb73SDavid Jander
2756f9dfb73SDavid Jander&pcie30phy {
2766f9dfb73SDavid Jander	status = "okay";
2776f9dfb73SDavid Jander};
2786f9dfb73SDavid Jander
2796f9dfb73SDavid Jander&pcie3x2 {
2806f9dfb73SDavid Jander	pinctrl-names = "default";
2816f9dfb73SDavid Jander	pinctrl-0 = <&pcie30x2m1_pins>;
2826f9dfb73SDavid Jander	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
2836f9dfb73SDavid Jander	vpcie3v3-supply = <&p3v3>;
2846f9dfb73SDavid Jander	status = "okay";
2856f9dfb73SDavid Jander};
2866f9dfb73SDavid Jander
2876f9dfb73SDavid Jander&pinctrl {
2886f9dfb73SDavid Jander	ethernet {
2896f9dfb73SDavid Jander		eth_phy1_rst: eth-phy1-rst {
2906f9dfb73SDavid Jander			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
2916f9dfb73SDavid Jander		};
2926f9dfb73SDavid Jander	};
2936f9dfb73SDavid Jander
2946f9dfb73SDavid Jander	tas2562 {
2956f9dfb73SDavid Jander		pinctrl_tas2562: tas2562 {
2966f9dfb73SDavid Jander			rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
2976f9dfb73SDavid Jander		};
2986f9dfb73SDavid Jander	};
2996f9dfb73SDavid Jander};
3006f9dfb73SDavid Jander
3016f9dfb73SDavid Jander&pmu_io_domains {
3026f9dfb73SDavid Jander	pmuio1-supply = <&p3v3>;
3036f9dfb73SDavid Jander	pmuio2-supply = <&p3v3>;
3046f9dfb73SDavid Jander	vccio1-supply = <&p1v8>;
3056f9dfb73SDavid Jander	vccio2-supply = <&p1v8>;
3066f9dfb73SDavid Jander	vccio3-supply = <&vcc_sd>;
3076f9dfb73SDavid Jander	vccio4-supply = <&p1v8>;
3086f9dfb73SDavid Jander	vccio5-supply = <&p3v3>;
3096f9dfb73SDavid Jander	vccio6-supply = <&p1v8>;
3106f9dfb73SDavid Jander	vccio7-supply = <&p3v3>;
3116f9dfb73SDavid Jander	status = "okay";
3126f9dfb73SDavid Jander};
3136f9dfb73SDavid Jander
3146f9dfb73SDavid Jander&pwm1 {
3156f9dfb73SDavid Jander	status = "okay";
3166f9dfb73SDavid Jander	pinctrl-names = "default";
3176f9dfb73SDavid Jander	pinctrl-0 = <&pwm1m0_pins>;
3186f9dfb73SDavid Jander};
3196f9dfb73SDavid Jander
3206f9dfb73SDavid Jander&pwm2 {
3216f9dfb73SDavid Jander	status = "okay";
3226f9dfb73SDavid Jander	pinctrl-names = "default";
3236f9dfb73SDavid Jander	pinctrl-0 = <&pwm2m0_pins>;
3246f9dfb73SDavid Jander};
3256f9dfb73SDavid Jander
3266f9dfb73SDavid Jander&saradc {
3276f9dfb73SDavid Jander	vref-supply = <&p1v8>;
3286f9dfb73SDavid Jander	status = "okay";
3296f9dfb73SDavid Jander};
3306f9dfb73SDavid Jander
3316f9dfb73SDavid Jander&sdhci {
3326f9dfb73SDavid Jander	bus-width = <8>;
3336f9dfb73SDavid Jander	max-frequency = <200000000>;
3346f9dfb73SDavid Jander	non-removable;
3356f9dfb73SDavid Jander	pinctrl-names = "default";
3366f9dfb73SDavid Jander	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
3376f9dfb73SDavid Jander	vmmc-supply = <&p3v3>;
3386f9dfb73SDavid Jander	vqmmc-supply = <&p1v8>;
3396f9dfb73SDavid Jander	mmc-hs200-1_8v;
3406f9dfb73SDavid Jander	non-removable;
3416f9dfb73SDavid Jander	no-sd;
3426f9dfb73SDavid Jander	no-sdio;
3436f9dfb73SDavid Jander	status = "okay";
3446f9dfb73SDavid Jander};
3456f9dfb73SDavid Jander
3466f9dfb73SDavid Jander&sdmmc0 {
3476f9dfb73SDavid Jander	bus-width = <4>;
3486f9dfb73SDavid Jander	cap-sd-highspeed;
3496f9dfb73SDavid Jander	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
3506f9dfb73SDavid Jander	disable-wp;
3516f9dfb73SDavid Jander	pinctrl-names = "default";
3526f9dfb73SDavid Jander	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
3536f9dfb73SDavid Jander	sd-uhs-sdr50;
3546f9dfb73SDavid Jander	sd-uhs-sdr104;
3556f9dfb73SDavid Jander	vmmc-supply = <&p3v3>;
3566f9dfb73SDavid Jander	vqmmc-supply = <&vcc_sd>;
3576f9dfb73SDavid Jander	status = "okay";
3586f9dfb73SDavid Jander};
3596f9dfb73SDavid Jander
3606f9dfb73SDavid Jander&tsadc {
3616f9dfb73SDavid Jander	rockchip,hw-tshut-mode = <1>;
3626f9dfb73SDavid Jander	rockchip,hw-tshut-polarity = <0>;
3636f9dfb73SDavid Jander	status = "okay";
3646f9dfb73SDavid Jander};
3656f9dfb73SDavid Jander
3666f9dfb73SDavid Jander&uart2 {
3676f9dfb73SDavid Jander	status = "okay";
3686f9dfb73SDavid Jander};
3696f9dfb73SDavid Jander
3706f9dfb73SDavid Jander&usb_host0_ehci {
3716f9dfb73SDavid Jander	status = "okay";
3726f9dfb73SDavid Jander};
3736f9dfb73SDavid Jander
3746f9dfb73SDavid Jander&usb_host0_ohci {
3756f9dfb73SDavid Jander	status = "okay";
3766f9dfb73SDavid Jander};
3776f9dfb73SDavid Jander
3786f9dfb73SDavid Jander&usb_host0_xhci {
3796f9dfb73SDavid Jander	dr_mode = "host";
3806f9dfb73SDavid Jander	extcon = <&usb2phy0>;
3816f9dfb73SDavid Jander	status = "okay";
3826f9dfb73SDavid Jander};
3836f9dfb73SDavid Jander
3846f9dfb73SDavid Jander&usb_host1_ehci {
3856f9dfb73SDavid Jander	status = "okay";
3866f9dfb73SDavid Jander};
3876f9dfb73SDavid Jander
3886f9dfb73SDavid Jander&usb_host1_ohci {
3896f9dfb73SDavid Jander	status = "okay";
3906f9dfb73SDavid Jander};
3916f9dfb73SDavid Jander
3926f9dfb73SDavid Jander&usb_host1_xhci {
3936f9dfb73SDavid Jander	status = "okay";
3946f9dfb73SDavid Jander};
3956f9dfb73SDavid Jander
3966f9dfb73SDavid Jander&usb2phy0 {
3976f9dfb73SDavid Jander	status = "okay";
3986f9dfb73SDavid Jander};
3996f9dfb73SDavid Jander
4006f9dfb73SDavid Jander&usb2phy0_host {
4016f9dfb73SDavid Jander	status = "okay";
4026f9dfb73SDavid Jander};
4036f9dfb73SDavid Jander
4046f9dfb73SDavid Jander&usb2phy0_otg {
4056f9dfb73SDavid Jander	status = "okay";
4066f9dfb73SDavid Jander};
4076f9dfb73SDavid Jander
4086f9dfb73SDavid Jander&usb2phy1 {
4096f9dfb73SDavid Jander	status = "okay";
4106f9dfb73SDavid Jander};
4116f9dfb73SDavid Jander
4126f9dfb73SDavid Jander&usb2phy1_host {
4136f9dfb73SDavid Jander	status = "okay";
4146f9dfb73SDavid Jander};
4156f9dfb73SDavid Jander
4166f9dfb73SDavid Jander&usb2phy1_otg {
4176f9dfb73SDavid Jander	status = "okay";
4186f9dfb73SDavid Jander};
419