1*e4832d19SDragan Simic// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*e4832d19SDragan Simic 3*e4832d19SDragan Simic#include "rk3566-base.dtsi" 4*e4832d19SDragan Simic 5*e4832d19SDragan Simic/ { 6*e4832d19SDragan Simic cpu0_opp_table: opp-table-0 { 7*e4832d19SDragan Simic compatible = "operating-points-v2"; 8*e4832d19SDragan Simic opp-shared; 9*e4832d19SDragan Simic 10*e4832d19SDragan Simic opp-408000000 { 11*e4832d19SDragan Simic opp-hz = /bits/ 64 <408000000>; 12*e4832d19SDragan Simic opp-microvolt = <850000 850000 1150000>; 13*e4832d19SDragan Simic clock-latency-ns = <40000>; 14*e4832d19SDragan Simic }; 15*e4832d19SDragan Simic 16*e4832d19SDragan Simic opp-600000000 { 17*e4832d19SDragan Simic opp-hz = /bits/ 64 <600000000>; 18*e4832d19SDragan Simic opp-microvolt = <850000 850000 1150000>; 19*e4832d19SDragan Simic clock-latency-ns = <40000>; 20*e4832d19SDragan Simic }; 21*e4832d19SDragan Simic 22*e4832d19SDragan Simic opp-816000000 { 23*e4832d19SDragan Simic opp-hz = /bits/ 64 <816000000>; 24*e4832d19SDragan Simic opp-microvolt = <850000 850000 1150000>; 25*e4832d19SDragan Simic clock-latency-ns = <40000>; 26*e4832d19SDragan Simic opp-suspend; 27*e4832d19SDragan Simic }; 28*e4832d19SDragan Simic 29*e4832d19SDragan Simic opp-1104000000 { 30*e4832d19SDragan Simic opp-hz = /bits/ 64 <1104000000>; 31*e4832d19SDragan Simic opp-microvolt = <900000 900000 1150000>; 32*e4832d19SDragan Simic clock-latency-ns = <40000>; 33*e4832d19SDragan Simic }; 34*e4832d19SDragan Simic 35*e4832d19SDragan Simic opp-1416000000 { 36*e4832d19SDragan Simic opp-hz = /bits/ 64 <1416000000>; 37*e4832d19SDragan Simic opp-microvolt = <1025000 1025000 1150000>; 38*e4832d19SDragan Simic clock-latency-ns = <40000>; 39*e4832d19SDragan Simic }; 40*e4832d19SDragan Simic }; 41*e4832d19SDragan Simic 42*e4832d19SDragan Simic gpu_opp_table: opp-table-1 { 43*e4832d19SDragan Simic compatible = "operating-points-v2"; 44*e4832d19SDragan Simic 45*e4832d19SDragan Simic opp-200000000 { 46*e4832d19SDragan Simic opp-hz = /bits/ 64 <200000000>; 47*e4832d19SDragan Simic opp-microvolt = <850000 850000 1000000>; 48*e4832d19SDragan Simic }; 49*e4832d19SDragan Simic 50*e4832d19SDragan Simic opp-300000000 { 51*e4832d19SDragan Simic opp-hz = /bits/ 64 <300000000>; 52*e4832d19SDragan Simic opp-microvolt = <850000 850000 1000000>; 53*e4832d19SDragan Simic }; 54*e4832d19SDragan Simic 55*e4832d19SDragan Simic opp-400000000 { 56*e4832d19SDragan Simic opp-hz = /bits/ 64 <400000000>; 57*e4832d19SDragan Simic opp-microvolt = <850000 850000 1000000>; 58*e4832d19SDragan Simic }; 59*e4832d19SDragan Simic 60*e4832d19SDragan Simic opp-600000000 { 61*e4832d19SDragan Simic opp-hz = /bits/ 64 <600000000>; 62*e4832d19SDragan Simic opp-microvolt = <900000 900000 1000000>; 63*e4832d19SDragan Simic }; 64*e4832d19SDragan Simic 65*e4832d19SDragan Simic opp-700000000 { 66*e4832d19SDragan Simic opp-hz = /bits/ 64 <700000000>; 67*e4832d19SDragan Simic opp-microvolt = <950000 950000 1000000>; 68*e4832d19SDragan Simic }; 69*e4832d19SDragan Simic }; 70*e4832d19SDragan Simic}; 71*e4832d19SDragan Simic 72*e4832d19SDragan Simic&cpu0 { 73*e4832d19SDragan Simic operating-points-v2 = <&cpu0_opp_table>; 74*e4832d19SDragan Simic}; 75*e4832d19SDragan Simic 76*e4832d19SDragan Simic&cpu1 { 77*e4832d19SDragan Simic operating-points-v2 = <&cpu0_opp_table>; 78*e4832d19SDragan Simic}; 79*e4832d19SDragan Simic 80*e4832d19SDragan Simic&cpu2 { 81*e4832d19SDragan Simic operating-points-v2 = <&cpu0_opp_table>; 82*e4832d19SDragan Simic}; 83*e4832d19SDragan Simic 84*e4832d19SDragan Simic&cpu3 { 85*e4832d19SDragan Simic operating-points-v2 = <&cpu0_opp_table>; 86*e4832d19SDragan Simic}; 87*e4832d19SDragan Simic 88*e4832d19SDragan Simic&gpu { 89*e4832d19SDragan Simic operating-points-v2 = <&gpu_opp_table>; 90*e4832d19SDragan Simic}; 91