1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include "rk3566-soquartz.dtsi" 6 7/ { 8 model = "Pine64 SOQuartz on Model A carrier board"; 9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566"; 10 11 aliases { 12 ethernet0 = &gmac1; 13 }; 14 15 /* labeled DCIN_12V in schematic */ 16 vcc12v_dcin: vcc12v-dcin-regulator { 17 compatible = "regulator-fixed"; 18 regulator-name = "vcc12v_dcin"; 19 regulator-always-on; 20 regulator-boot-on; 21 regulator-min-microvolt = <12000000>; 22 regulator-max-microvolt = <12000000>; 23 }; 24 25 vcc5v0_usb: vcc5v0-usb-regulator { 26 compatible = "regulator-fixed"; 27 regulator-name = "vcc5v0_usb"; 28 regulator-always-on; 29 regulator-boot-on; 30 regulator-min-microvolt = <5000000>; 31 regulator-max-microvolt = <5000000>; 32 vin-supply = <&vcc12v_dcin>; 33 }; 34 35 /* 36 * Labelled VCC3V0_SD in schematic to not conflict with PMIC 37 * regulator, it's 3.3v in actuality 38 */ 39 vcc3v0_sd: vcc3v0-sd-regulator { 40 compatible = "regulator-fixed"; 41 regulator-name = "vcc3v0_sd"; 42 regulator-always-on; 43 regulator-boot-on; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; 46 vin-supply = <&vcc3v3_sys>; 47 }; 48 49 vcc3v3_pcie: vcc3v3-pcie-regulator { 50 compatible = "regulator-fixed"; 51 regulator-name = "vcc3v3_pcie"; 52 regulator-always-on; 53 regulator-boot-on; 54 regulator-min-microvolt = <3300000>; 55 regulator-max-microvolt = <3300000>; 56 vin-supply = <&vcc12v_dcin>; 57 }; 58 59 vcc12v_pcie: vcc12v-pcie-regulator { 60 compatible = "regulator-fixed"; 61 regulator-name = "vcc12v_pcie"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <12000000>; 65 regulator-max-microvolt = <12000000>; 66 vin-supply = <&vcc12v_dcin>; 67 }; 68}; 69 70/* phy for pcie */ 71&combphy2 { 72 phy-supply = <&vcc3v3_sys>; 73 status = "okay"; 74}; 75 76&gmac1 { 77 status = "okay"; 78}; 79 80/* 81 * i2c1 is exposed on CM1 / Module1A 82 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu 83 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu 84 */ 85&i2c1 { 86 status = "okay"; 87 88 /* 89 * the rtc interrupt is tied to PMIC_PWRON, 90 * it will force reset the board if triggered. 91 */ 92 pcf85063: rtc@51 { 93 compatible = "nxp,pcf85063"; 94 reg = <0x51>; 95 }; 96}; 97 98/* 99 * i2c2 is exposed on CM1 / Module1A - to PI40 100 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 101 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 102 */ 103&i2c2 { 104 status = "disabled"; 105}; 106 107/* 108 * i2c3 is exposed on CM1 / Module1A - to PI40 109 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 110 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 111 */ 112&i2c3 { 113 status = "disabled"; 114}; 115 116/* 117 * i2c4 is exposed on CM2 / Module1B - to PI40 118 * pin 45 - GPIO24 - i2c4_scl_m1 119 * pin 47 - GPIO23 - i2c4_sda_m1 120 */ 121&i2c4 { 122 status = "disabled"; 123}; 124 125/* 126 * i2s1_8ch is exposed on CM1 / Module1A - to PI40 127 * pin 24 - GPIO26 - i2s1_sdi1_m1 128 * pin 25 - GPIO21 - i2s1_sdo0_m1 129 * pin 26 - GPIO19 - i2s1_lrck_tx_m1 130 * pin 27 - GPIO20 - i2s1_sdi0_m1 131 * pin 29 - GPIO16 - i2s1_sdi3_m1 132 * pin 30 - GPIO6 - i2s1_sdi2_m1 133 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 134 * pin 41 - GPIO25 - i2s1_sdo2_m1 135 * pin 49 - GPIO18 - i2s1_sclk_tx_m1 136 * pin 50 - GPIO17 - i2s1_mclk_m1 137 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 138 */ 139&i2s1_8ch { 140 status = "disabled"; 141}; 142 143&led_diy { 144 status = "okay"; 145}; 146 147&led_work { 148 status = "okay"; 149}; 150 151&pcie2x1 { 152 vpcie3v3-supply = <&vcc3v3_pcie>; 153 status = "okay"; 154}; 155 156&rgmii_phy1 { 157 status = "okay"; 158}; 159 160&rgmii_phy1 { 161 status = "okay"; 162}; 163 164/* 165 * saradc is exposed on CM1 / Module1A - to J2 166 * pin 94 - AIN1 - saradc_vin3 167 * pin 96 - AIN0 - saradc_vin2 168 */ 169&saradc { 170 status = "disabled"; 171}; 172 173/* 174 * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+ 175 * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys, 176 * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards. 177 */ 178&sdmmc0 { 179 vmmc-supply = <&vcc3v3_sd>; 180 status = "okay"; 181}; 182 183/* 184 * spi3 is exposed on CM1 / Module1A - to PI40 185 * pin 37 - GPIO7 - spi3_cs1_m0 186 * pin 38 - GPIO11 - spi3_clk_m0 187 * pin 39 - GPIO8 - spi3_cs0_m0 188 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch 189 * pin 44 - GPIO10 - spi3_mosi_m0 190 */ 191&spi3 { 192 status = "disabled"; 193}; 194 195/* 196 * uart2 is exposed on CM1 / Module1A - to PI40 197 * pin 51 - GPIO15 - uart2_rx_m0 198 * pin 55 - GPIO14 - uart2_tx_m0 199 */ 200&uart2 { 201 status = "okay"; 202}; 203 204/* 205 * uart7 is exposed on CM1 / Module1A - to PI40 206 * pin 46 - GPIO22 - uart7_tx_m2 207 * pin 47 - GPIO23 - uart7_rx_m2 208 */ 209&uart7 { 210 status = "okay"; 211}; 212 213&usb2phy0 { 214 status = "okay"; 215}; 216 217&usb2phy0_otg { 218 phy-supply = <&vcc5v0_usb>; 219 status = "okay"; 220}; 221 222&usb_host0_xhci { 223 status = "okay"; 224}; 225 226&vbus { 227 vin-supply = <&vcc5v0_usb>; 228}; 229 230&vcc3v3_sd { 231 regulator-always-on; 232 regulator-boot-on; 233 regulator-min-microvolt = <3300000>; 234 regulator-max-microvolt = <3300000>; 235 status = "okay"; 236}; 237