1*ee219017SChukun Pan// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*ee219017SChukun Pan 3*ee219017SChukun Pan/dts-v1/; 4*ee219017SChukun Pan#include <dt-bindings/gpio/gpio.h> 5*ee219017SChukun Pan#include <dt-bindings/leds/common.h> 6*ee219017SChukun Pan#include <dt-bindings/pinctrl/rockchip.h> 7*ee219017SChukun Pan#include <dt-bindings/soc/rockchip,vop2.h> 8*ee219017SChukun Pan#include "rk3566.dtsi" 9*ee219017SChukun Pan 10*ee219017SChukun Pan/ { 11*ee219017SChukun Pan model = "Radxa ROCK 3C"; 12*ee219017SChukun Pan compatible = "radxa,rock-3c", "rockchip,rk3566"; 13*ee219017SChukun Pan 14*ee219017SChukun Pan aliases { 15*ee219017SChukun Pan ethernet0 = &gmac1; 16*ee219017SChukun Pan mmc0 = &sdhci; 17*ee219017SChukun Pan mmc1 = &sdmmc0; 18*ee219017SChukun Pan mmc2 = &sdmmc1; 19*ee219017SChukun Pan }; 20*ee219017SChukun Pan 21*ee219017SChukun Pan chosen: chosen { 22*ee219017SChukun Pan stdout-path = "serial2:1500000n8"; 23*ee219017SChukun Pan }; 24*ee219017SChukun Pan 25*ee219017SChukun Pan gmac1_clkin: external-gmac1-clock { 26*ee219017SChukun Pan compatible = "fixed-clock"; 27*ee219017SChukun Pan clock-frequency = <125000000>; 28*ee219017SChukun Pan clock-output-names = "gmac1_clkin"; 29*ee219017SChukun Pan #clock-cells = <0>; 30*ee219017SChukun Pan }; 31*ee219017SChukun Pan 32*ee219017SChukun Pan hdmi-con { 33*ee219017SChukun Pan compatible = "hdmi-connector"; 34*ee219017SChukun Pan type = "a"; 35*ee219017SChukun Pan 36*ee219017SChukun Pan port { 37*ee219017SChukun Pan hdmi_con_in: endpoint { 38*ee219017SChukun Pan remote-endpoint = <&hdmi_out_con>; 39*ee219017SChukun Pan }; 40*ee219017SChukun Pan }; 41*ee219017SChukun Pan }; 42*ee219017SChukun Pan 43*ee219017SChukun Pan leds { 44*ee219017SChukun Pan compatible = "gpio-leds"; 45*ee219017SChukun Pan 46*ee219017SChukun Pan led-0 { 47*ee219017SChukun Pan gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 48*ee219017SChukun Pan function = LED_FUNCTION_HEARTBEAT; 49*ee219017SChukun Pan color = <LED_COLOR_ID_BLUE>; 50*ee219017SChukun Pan linux,default-trigger = "heartbeat"; 51*ee219017SChukun Pan pinctrl-names = "default"; 52*ee219017SChukun Pan pinctrl-0 = <&user_led2>; 53*ee219017SChukun Pan }; 54*ee219017SChukun Pan }; 55*ee219017SChukun Pan 56*ee219017SChukun Pan sdio_pwrseq: sdio-pwrseq { 57*ee219017SChukun Pan compatible = "mmc-pwrseq-simple"; 58*ee219017SChukun Pan clocks = <&rk809 1>; 59*ee219017SChukun Pan clock-names = "ext_clock"; 60*ee219017SChukun Pan pinctrl-names = "default"; 61*ee219017SChukun Pan pinctrl-0 = <&wifi_reg_on_h>; 62*ee219017SChukun Pan post-power-on-delay-ms = <100>; 63*ee219017SChukun Pan power-off-delay-us = <5000000>; 64*ee219017SChukun Pan reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 65*ee219017SChukun Pan }; 66*ee219017SChukun Pan 67*ee219017SChukun Pan vcc5v_dcin: vcc5v-dcin-regulator { 68*ee219017SChukun Pan compatible = "regulator-fixed"; 69*ee219017SChukun Pan regulator-name = "vcc5v_dcin"; 70*ee219017SChukun Pan regulator-always-on; 71*ee219017SChukun Pan regulator-boot-on; 72*ee219017SChukun Pan regulator-min-microvolt = <5000000>; 73*ee219017SChukun Pan regulator-max-microvolt = <5000000>; 74*ee219017SChukun Pan }; 75*ee219017SChukun Pan 76*ee219017SChukun Pan vcc3v3_pcie: vcc3v3-pcie-regulator { 77*ee219017SChukun Pan compatible = "regulator-fixed"; 78*ee219017SChukun Pan enable-active-high; 79*ee219017SChukun Pan gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 80*ee219017SChukun Pan pinctrl-names = "default"; 81*ee219017SChukun Pan pinctrl-0 = <&pcie_pwr_en>; 82*ee219017SChukun Pan regulator-name = "vcc3v3_pcie"; 83*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 84*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 85*ee219017SChukun Pan vin-supply = <&vcc3v3_sys>; 86*ee219017SChukun Pan }; 87*ee219017SChukun Pan 88*ee219017SChukun Pan vcc3v3_sys: vcc3v3-sys-regulator { 89*ee219017SChukun Pan compatible = "regulator-fixed"; 90*ee219017SChukun Pan regulator-name = "vcc3v3_sys"; 91*ee219017SChukun Pan regulator-always-on; 92*ee219017SChukun Pan regulator-boot-on; 93*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 94*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 95*ee219017SChukun Pan vin-supply = <&vcc5v0_sys>; 96*ee219017SChukun Pan }; 97*ee219017SChukun Pan 98*ee219017SChukun Pan vcc5v0_sys: vcc5v0-sys-regulator { 99*ee219017SChukun Pan compatible = "regulator-fixed"; 100*ee219017SChukun Pan regulator-name = "vcc5v0_sys"; 101*ee219017SChukun Pan regulator-always-on; 102*ee219017SChukun Pan regulator-boot-on; 103*ee219017SChukun Pan regulator-min-microvolt = <5000000>; 104*ee219017SChukun Pan regulator-max-microvolt = <5000000>; 105*ee219017SChukun Pan vin-supply = <&vcc5v_dcin>; 106*ee219017SChukun Pan }; 107*ee219017SChukun Pan 108*ee219017SChukun Pan vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { 109*ee219017SChukun Pan compatible = "regulator-fixed"; 110*ee219017SChukun Pan enable-active-high; 111*ee219017SChukun Pan gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 112*ee219017SChukun Pan pinctrl-names = "default"; 113*ee219017SChukun Pan pinctrl-0 = <&vcc5v0_usb30_host_en>; 114*ee219017SChukun Pan regulator-name = "vcc5v0_usb30_host"; 115*ee219017SChukun Pan regulator-min-microvolt = <5000000>; 116*ee219017SChukun Pan regulator-max-microvolt = <5000000>; 117*ee219017SChukun Pan vin-supply = <&vcc5v0_sys>; 118*ee219017SChukun Pan }; 119*ee219017SChukun Pan 120*ee219017SChukun Pan vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 121*ee219017SChukun Pan compatible = "regulator-fixed"; 122*ee219017SChukun Pan enable-active-high; 123*ee219017SChukun Pan gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 124*ee219017SChukun Pan pinctrl-names = "default"; 125*ee219017SChukun Pan pinctrl-0 = <&vcc5v0_usb_otg_en>; 126*ee219017SChukun Pan regulator-name = "vcc5v0_usb_otg"; 127*ee219017SChukun Pan regulator-min-microvolt = <5000000>; 128*ee219017SChukun Pan regulator-max-microvolt = <5000000>; 129*ee219017SChukun Pan vin-supply = <&vcc5v0_sys>; 130*ee219017SChukun Pan }; 131*ee219017SChukun Pan 132*ee219017SChukun Pan vcc_cam: vcc-cam-regulator { 133*ee219017SChukun Pan compatible = "regulator-fixed"; 134*ee219017SChukun Pan enable-active-high; 135*ee219017SChukun Pan gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 136*ee219017SChukun Pan pinctrl-names = "default"; 137*ee219017SChukun Pan pinctrl-0 = <&vcc_cam_en>; 138*ee219017SChukun Pan regulator-name = "vcc_cam"; 139*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 140*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 141*ee219017SChukun Pan vin-supply = <&vcc3v3_sys>; 142*ee219017SChukun Pan 143*ee219017SChukun Pan regulator-state-mem { 144*ee219017SChukun Pan regulator-off-in-suspend; 145*ee219017SChukun Pan }; 146*ee219017SChukun Pan }; 147*ee219017SChukun Pan 148*ee219017SChukun Pan vcc_mipi: vcc-mipi-regulator { 149*ee219017SChukun Pan compatible = "regulator-fixed"; 150*ee219017SChukun Pan enable-active-high; 151*ee219017SChukun Pan gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 152*ee219017SChukun Pan pinctrl-names = "default"; 153*ee219017SChukun Pan pinctrl-0 = <&vcc_mipi_en>; 154*ee219017SChukun Pan regulator-name = "vcc_mipi"; 155*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 156*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 157*ee219017SChukun Pan vin-supply = <&vcc3v3_sys>; 158*ee219017SChukun Pan 159*ee219017SChukun Pan regulator-state-mem { 160*ee219017SChukun Pan regulator-off-in-suspend; 161*ee219017SChukun Pan }; 162*ee219017SChukun Pan }; 163*ee219017SChukun Pan}; 164*ee219017SChukun Pan 165*ee219017SChukun Pan&combphy1 { 166*ee219017SChukun Pan status = "okay"; 167*ee219017SChukun Pan}; 168*ee219017SChukun Pan 169*ee219017SChukun Pan&combphy2 { 170*ee219017SChukun Pan status = "okay"; 171*ee219017SChukun Pan}; 172*ee219017SChukun Pan 173*ee219017SChukun Pan&cpu0 { 174*ee219017SChukun Pan cpu-supply = <&vdd_cpu>; 175*ee219017SChukun Pan}; 176*ee219017SChukun Pan 177*ee219017SChukun Pan&cpu1 { 178*ee219017SChukun Pan cpu-supply = <&vdd_cpu>; 179*ee219017SChukun Pan}; 180*ee219017SChukun Pan 181*ee219017SChukun Pan&cpu2 { 182*ee219017SChukun Pan cpu-supply = <&vdd_cpu>; 183*ee219017SChukun Pan}; 184*ee219017SChukun Pan 185*ee219017SChukun Pan&cpu3 { 186*ee219017SChukun Pan cpu-supply = <&vdd_cpu>; 187*ee219017SChukun Pan}; 188*ee219017SChukun Pan 189*ee219017SChukun Pan&gmac1 { 190*ee219017SChukun Pan assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 191*ee219017SChukun Pan assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; 192*ee219017SChukun Pan clock_in_out = "input"; 193*ee219017SChukun Pan phy-handle = <&rgmii_phy1>; 194*ee219017SChukun Pan phy-mode = "rgmii-id"; 195*ee219017SChukun Pan phy-supply = <&vcc_3v3>; 196*ee219017SChukun Pan pinctrl-names = "default"; 197*ee219017SChukun Pan pinctrl-0 = <&gmac1m1_miim 198*ee219017SChukun Pan &gmac1m1_tx_bus2 199*ee219017SChukun Pan &gmac1m1_rx_bus2 200*ee219017SChukun Pan &gmac1m1_rgmii_clk 201*ee219017SChukun Pan &gmac1m1_rgmii_bus 202*ee219017SChukun Pan &gmac1m1_clkinout>; 203*ee219017SChukun Pan status = "okay"; 204*ee219017SChukun Pan}; 205*ee219017SChukun Pan 206*ee219017SChukun Pan&gpu { 207*ee219017SChukun Pan mali-supply = <&vdd_gpu>; 208*ee219017SChukun Pan status = "okay"; 209*ee219017SChukun Pan}; 210*ee219017SChukun Pan 211*ee219017SChukun Pan&hdmi { 212*ee219017SChukun Pan avdd-0v9-supply = <&vdda0v9_image>; 213*ee219017SChukun Pan avdd-1v8-supply = <&vcca1v8_image>; 214*ee219017SChukun Pan status = "okay"; 215*ee219017SChukun Pan}; 216*ee219017SChukun Pan 217*ee219017SChukun Pan&hdmi_in { 218*ee219017SChukun Pan hdmi_in_vp0: endpoint { 219*ee219017SChukun Pan remote-endpoint = <&vp0_out_hdmi>; 220*ee219017SChukun Pan }; 221*ee219017SChukun Pan}; 222*ee219017SChukun Pan 223*ee219017SChukun Pan&hdmi_out { 224*ee219017SChukun Pan hdmi_out_con: endpoint { 225*ee219017SChukun Pan remote-endpoint = <&hdmi_con_in>; 226*ee219017SChukun Pan }; 227*ee219017SChukun Pan}; 228*ee219017SChukun Pan 229*ee219017SChukun Pan&hdmi_sound { 230*ee219017SChukun Pan status = "okay"; 231*ee219017SChukun Pan}; 232*ee219017SChukun Pan 233*ee219017SChukun Pan&i2c0 { 234*ee219017SChukun Pan status = "okay"; 235*ee219017SChukun Pan 236*ee219017SChukun Pan vdd_cpu: regulator@1c { 237*ee219017SChukun Pan compatible = "tcs,tcs4525"; 238*ee219017SChukun Pan reg = <0x1c>; 239*ee219017SChukun Pan fcs,suspend-voltage-selector = <1>; 240*ee219017SChukun Pan regulator-name = "vdd_cpu"; 241*ee219017SChukun Pan regulator-always-on; 242*ee219017SChukun Pan regulator-boot-on; 243*ee219017SChukun Pan regulator-min-microvolt = <800000>; 244*ee219017SChukun Pan regulator-max-microvolt = <1150000>; 245*ee219017SChukun Pan regulator-ramp-delay = <2300>; 246*ee219017SChukun Pan vin-supply = <&vcc5v0_sys>; 247*ee219017SChukun Pan 248*ee219017SChukun Pan regulator-state-mem { 249*ee219017SChukun Pan regulator-off-in-suspend; 250*ee219017SChukun Pan }; 251*ee219017SChukun Pan }; 252*ee219017SChukun Pan 253*ee219017SChukun Pan rk809: pmic@20 { 254*ee219017SChukun Pan compatible = "rockchip,rk809"; 255*ee219017SChukun Pan reg = <0x20>; 256*ee219017SChukun Pan interrupt-parent = <&gpio0>; 257*ee219017SChukun Pan interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 258*ee219017SChukun Pan clock-output-names = "rk808-clkout1", "rk808-clkout2"; 259*ee219017SChukun Pan pinctrl-names = "default"; 260*ee219017SChukun Pan pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; 261*ee219017SChukun Pan system-power-controller; 262*ee219017SChukun Pan vcc1-supply = <&vcc3v3_sys>; 263*ee219017SChukun Pan vcc2-supply = <&vcc3v3_sys>; 264*ee219017SChukun Pan vcc3-supply = <&vcc3v3_sys>; 265*ee219017SChukun Pan vcc4-supply = <&vcc3v3_sys>; 266*ee219017SChukun Pan vcc5-supply = <&vcc3v3_sys>; 267*ee219017SChukun Pan vcc6-supply = <&vcc3v3_sys>; 268*ee219017SChukun Pan vcc7-supply = <&vcc3v3_sys>; 269*ee219017SChukun Pan vcc8-supply = <&vcc3v3_sys>; 270*ee219017SChukun Pan vcc9-supply = <&vcc3v3_sys>; 271*ee219017SChukun Pan wakeup-source; 272*ee219017SChukun Pan #clock-cells = <1>; 273*ee219017SChukun Pan 274*ee219017SChukun Pan regulators { 275*ee219017SChukun Pan vdd_logic: DCDC_REG1 { 276*ee219017SChukun Pan regulator-name = "vdd_logic"; 277*ee219017SChukun Pan regulator-always-on; 278*ee219017SChukun Pan regulator-boot-on; 279*ee219017SChukun Pan regulator-initial-mode = <0x2>; 280*ee219017SChukun Pan regulator-min-microvolt = <500000>; 281*ee219017SChukun Pan regulator-max-microvolt = <1350000>; 282*ee219017SChukun Pan regulator-ramp-delay = <6001>; 283*ee219017SChukun Pan 284*ee219017SChukun Pan regulator-state-mem { 285*ee219017SChukun Pan regulator-off-in-suspend; 286*ee219017SChukun Pan regulator-suspend-microvolt = <900000>; 287*ee219017SChukun Pan }; 288*ee219017SChukun Pan }; 289*ee219017SChukun Pan 290*ee219017SChukun Pan vdd_gpu: DCDC_REG2 { 291*ee219017SChukun Pan regulator-name = "vdd_gpu"; 292*ee219017SChukun Pan regulator-always-on; 293*ee219017SChukun Pan regulator-boot-on; 294*ee219017SChukun Pan regulator-initial-mode = <0x2>; 295*ee219017SChukun Pan regulator-min-microvolt = <500000>; 296*ee219017SChukun Pan regulator-max-microvolt = <1350000>; 297*ee219017SChukun Pan regulator-ramp-delay = <6001>; 298*ee219017SChukun Pan 299*ee219017SChukun Pan regulator-state-mem { 300*ee219017SChukun Pan regulator-off-in-suspend; 301*ee219017SChukun Pan regulator-suspend-microvolt = <900000>; 302*ee219017SChukun Pan }; 303*ee219017SChukun Pan }; 304*ee219017SChukun Pan 305*ee219017SChukun Pan vcc_ddr: DCDC_REG3 { 306*ee219017SChukun Pan regulator-name = "vcc_ddr"; 307*ee219017SChukun Pan regulator-always-on; 308*ee219017SChukun Pan regulator-boot-on; 309*ee219017SChukun Pan regulator-initial-mode = <0x2>; 310*ee219017SChukun Pan 311*ee219017SChukun Pan regulator-state-mem { 312*ee219017SChukun Pan regulator-on-in-suspend; 313*ee219017SChukun Pan }; 314*ee219017SChukun Pan }; 315*ee219017SChukun Pan 316*ee219017SChukun Pan vdd_npu: DCDC_REG4 { 317*ee219017SChukun Pan regulator-name = "vdd_npu"; 318*ee219017SChukun Pan regulator-initial-mode = <0x2>; 319*ee219017SChukun Pan regulator-min-microvolt = <500000>; 320*ee219017SChukun Pan regulator-max-microvolt = <1350000>; 321*ee219017SChukun Pan regulator-ramp-delay = <6001>; 322*ee219017SChukun Pan 323*ee219017SChukun Pan regulator-state-mem { 324*ee219017SChukun Pan regulator-off-in-suspend; 325*ee219017SChukun Pan }; 326*ee219017SChukun Pan }; 327*ee219017SChukun Pan 328*ee219017SChukun Pan vcc_1v8: DCDC_REG5 { 329*ee219017SChukun Pan regulator-name = "vcc_1v8"; 330*ee219017SChukun Pan regulator-always-on; 331*ee219017SChukun Pan regulator-boot-on; 332*ee219017SChukun Pan regulator-min-microvolt = <1800000>; 333*ee219017SChukun Pan regulator-max-microvolt = <1800000>; 334*ee219017SChukun Pan 335*ee219017SChukun Pan regulator-state-mem { 336*ee219017SChukun Pan regulator-off-in-suspend; 337*ee219017SChukun Pan }; 338*ee219017SChukun Pan }; 339*ee219017SChukun Pan 340*ee219017SChukun Pan vdda0v9_image: LDO_REG1 { 341*ee219017SChukun Pan regulator-name = "vdda0v9_image"; 342*ee219017SChukun Pan regulator-min-microvolt = <900000>; 343*ee219017SChukun Pan regulator-max-microvolt = <900000>; 344*ee219017SChukun Pan 345*ee219017SChukun Pan regulator-state-mem { 346*ee219017SChukun Pan regulator-off-in-suspend; 347*ee219017SChukun Pan }; 348*ee219017SChukun Pan }; 349*ee219017SChukun Pan 350*ee219017SChukun Pan vdda_0v9: LDO_REG2 { 351*ee219017SChukun Pan regulator-name = "vdda_0v9"; 352*ee219017SChukun Pan regulator-always-on; 353*ee219017SChukun Pan regulator-boot-on; 354*ee219017SChukun Pan regulator-min-microvolt = <900000>; 355*ee219017SChukun Pan regulator-max-microvolt = <900000>; 356*ee219017SChukun Pan 357*ee219017SChukun Pan regulator-state-mem { 358*ee219017SChukun Pan regulator-off-in-suspend; 359*ee219017SChukun Pan }; 360*ee219017SChukun Pan }; 361*ee219017SChukun Pan 362*ee219017SChukun Pan vdda0v9_pmu: LDO_REG3 { 363*ee219017SChukun Pan regulator-name = "vdda0v9_pmu"; 364*ee219017SChukun Pan regulator-always-on; 365*ee219017SChukun Pan regulator-boot-on; 366*ee219017SChukun Pan regulator-min-microvolt = <900000>; 367*ee219017SChukun Pan regulator-max-microvolt = <900000>; 368*ee219017SChukun Pan 369*ee219017SChukun Pan regulator-state-mem { 370*ee219017SChukun Pan regulator-on-in-suspend; 371*ee219017SChukun Pan regulator-suspend-microvolt = <900000>; 372*ee219017SChukun Pan }; 373*ee219017SChukun Pan }; 374*ee219017SChukun Pan 375*ee219017SChukun Pan vccio_acodec: LDO_REG4 { 376*ee219017SChukun Pan regulator-name = "vccio_acodec"; 377*ee219017SChukun Pan regulator-always-on; 378*ee219017SChukun Pan regulator-boot-on; 379*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 380*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 381*ee219017SChukun Pan 382*ee219017SChukun Pan regulator-state-mem { 383*ee219017SChukun Pan regulator-off-in-suspend; 384*ee219017SChukun Pan }; 385*ee219017SChukun Pan }; 386*ee219017SChukun Pan 387*ee219017SChukun Pan vccio_sd: LDO_REG5 { 388*ee219017SChukun Pan regulator-name = "vccio_sd"; 389*ee219017SChukun Pan regulator-min-microvolt = <1800000>; 390*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 391*ee219017SChukun Pan 392*ee219017SChukun Pan regulator-state-mem { 393*ee219017SChukun Pan regulator-off-in-suspend; 394*ee219017SChukun Pan }; 395*ee219017SChukun Pan }; 396*ee219017SChukun Pan 397*ee219017SChukun Pan vcc3v3_pmu: LDO_REG6 { 398*ee219017SChukun Pan regulator-name = "vcc3v3_pmu"; 399*ee219017SChukun Pan regulator-always-on; 400*ee219017SChukun Pan regulator-boot-on; 401*ee219017SChukun Pan regulator-min-microvolt = <3300000>; 402*ee219017SChukun Pan regulator-max-microvolt = <3300000>; 403*ee219017SChukun Pan 404*ee219017SChukun Pan regulator-state-mem { 405*ee219017SChukun Pan regulator-on-in-suspend; 406*ee219017SChukun Pan regulator-suspend-microvolt = <3300000>; 407*ee219017SChukun Pan }; 408*ee219017SChukun Pan }; 409*ee219017SChukun Pan 410*ee219017SChukun Pan vcca_1v8: LDO_REG7 { 411*ee219017SChukun Pan regulator-name = "vcca_1v8"; 412*ee219017SChukun Pan regulator-always-on; 413*ee219017SChukun Pan regulator-boot-on; 414*ee219017SChukun Pan regulator-min-microvolt = <1800000>; 415*ee219017SChukun Pan regulator-max-microvolt = <1800000>; 416*ee219017SChukun Pan 417*ee219017SChukun Pan regulator-state-mem { 418*ee219017SChukun Pan regulator-off-in-suspend; 419*ee219017SChukun Pan }; 420*ee219017SChukun Pan }; 421*ee219017SChukun Pan 422*ee219017SChukun Pan vcca1v8_pmu: LDO_REG8 { 423*ee219017SChukun Pan regulator-name = "vcca1v8_pmu"; 424*ee219017SChukun Pan regulator-always-on; 425*ee219017SChukun Pan regulator-boot-on; 426*ee219017SChukun Pan regulator-min-microvolt = <1800000>; 427*ee219017SChukun Pan regulator-max-microvolt = <1800000>; 428*ee219017SChukun Pan 429*ee219017SChukun Pan regulator-state-mem { 430*ee219017SChukun Pan regulator-on-in-suspend; 431*ee219017SChukun Pan regulator-suspend-microvolt = <1800000>; 432*ee219017SChukun Pan }; 433*ee219017SChukun Pan }; 434*ee219017SChukun Pan 435*ee219017SChukun Pan vcca1v8_image: LDO_REG9 { 436*ee219017SChukun Pan regulator-name = "vcca1v8_image"; 437*ee219017SChukun Pan regulator-min-microvolt = <1800000>; 438*ee219017SChukun Pan regulator-max-microvolt = <1800000>; 439*ee219017SChukun Pan 440*ee219017SChukun Pan regulator-state-mem { 441*ee219017SChukun Pan regulator-off-in-suspend; 442*ee219017SChukun Pan }; 443*ee219017SChukun Pan }; 444*ee219017SChukun Pan 445*ee219017SChukun Pan vcc_3v3: SWITCH_REG1 { 446*ee219017SChukun Pan regulator-name = "vcc_3v3"; 447*ee219017SChukun Pan regulator-always-on; 448*ee219017SChukun Pan regulator-boot-on; 449*ee219017SChukun Pan 450*ee219017SChukun Pan regulator-state-mem { 451*ee219017SChukun Pan regulator-off-in-suspend; 452*ee219017SChukun Pan }; 453*ee219017SChukun Pan }; 454*ee219017SChukun Pan 455*ee219017SChukun Pan vcc3v3_sd: SWITCH_REG2 { 456*ee219017SChukun Pan regulator-name = "vcc3v3_sd"; 457*ee219017SChukun Pan 458*ee219017SChukun Pan regulator-state-mem { 459*ee219017SChukun Pan regulator-off-in-suspend; 460*ee219017SChukun Pan }; 461*ee219017SChukun Pan }; 462*ee219017SChukun Pan }; 463*ee219017SChukun Pan }; 464*ee219017SChukun Pan 465*ee219017SChukun Pan eeprom: eeprom@50 { 466*ee219017SChukun Pan compatible = "belling,bl24c16a", "atmel,24c16"; 467*ee219017SChukun Pan reg = <0x50>; 468*ee219017SChukun Pan pagesize = <16>; 469*ee219017SChukun Pan }; 470*ee219017SChukun Pan}; 471*ee219017SChukun Pan 472*ee219017SChukun Pan&i2s0_8ch { 473*ee219017SChukun Pan status = "okay"; 474*ee219017SChukun Pan}; 475*ee219017SChukun Pan 476*ee219017SChukun Pan&i2s1_8ch { 477*ee219017SChukun Pan pinctrl-names = "default"; 478*ee219017SChukun Pan pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; 479*ee219017SChukun Pan rockchip,trcm-sync-tx-only; 480*ee219017SChukun Pan status = "okay"; 481*ee219017SChukun Pan}; 482*ee219017SChukun Pan 483*ee219017SChukun Pan&mdio1 { 484*ee219017SChukun Pan rgmii_phy1: ethernet-phy@1 { 485*ee219017SChukun Pan compatible = "ethernet-phy-ieee802.3-c22"; 486*ee219017SChukun Pan reg = <0x1>; 487*ee219017SChukun Pan reset-assert-us = <20000>; 488*ee219017SChukun Pan reset-deassert-us = <100000>; 489*ee219017SChukun Pan reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 490*ee219017SChukun Pan }; 491*ee219017SChukun Pan}; 492*ee219017SChukun Pan 493*ee219017SChukun Pan&pcie2x1 { 494*ee219017SChukun Pan pinctrl-names = "default"; 495*ee219017SChukun Pan pinctrl-0 = <&pcie_reset_h>; 496*ee219017SChukun Pan reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 497*ee219017SChukun Pan vpcie3v3-supply = <&vcc3v3_pcie>; 498*ee219017SChukun Pan status = "okay"; 499*ee219017SChukun Pan}; 500*ee219017SChukun Pan 501*ee219017SChukun Pan&pinctrl { 502*ee219017SChukun Pan bluetooth { 503*ee219017SChukun Pan bt_reg_on_h: bt-reg-on-h { 504*ee219017SChukun Pan rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 505*ee219017SChukun Pan }; 506*ee219017SChukun Pan 507*ee219017SChukun Pan bt_wake_host_h: bt-wake-host-h { 508*ee219017SChukun Pan rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 509*ee219017SChukun Pan }; 510*ee219017SChukun Pan 511*ee219017SChukun Pan bt_host_wake_h: bt-host-wake-h { 512*ee219017SChukun Pan rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 513*ee219017SChukun Pan }; 514*ee219017SChukun Pan }; 515*ee219017SChukun Pan 516*ee219017SChukun Pan cam { 517*ee219017SChukun Pan vcc_cam_en: vcc_cam_en { 518*ee219017SChukun Pan rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 519*ee219017SChukun Pan }; 520*ee219017SChukun Pan }; 521*ee219017SChukun Pan 522*ee219017SChukun Pan display { 523*ee219017SChukun Pan vcc_mipi_en: vcc_mipi_en { 524*ee219017SChukun Pan rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 525*ee219017SChukun Pan }; 526*ee219017SChukun Pan }; 527*ee219017SChukun Pan 528*ee219017SChukun Pan leds { 529*ee219017SChukun Pan user_led2: user-led2 { 530*ee219017SChukun Pan rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 531*ee219017SChukun Pan }; 532*ee219017SChukun Pan }; 533*ee219017SChukun Pan 534*ee219017SChukun Pan pcie { 535*ee219017SChukun Pan pcie_pwr_en: pcie-pwr-en { 536*ee219017SChukun Pan rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 537*ee219017SChukun Pan }; 538*ee219017SChukun Pan 539*ee219017SChukun Pan pcie_reset_h: pcie-reset-h { 540*ee219017SChukun Pan rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 541*ee219017SChukun Pan }; 542*ee219017SChukun Pan }; 543*ee219017SChukun Pan 544*ee219017SChukun Pan pmic { 545*ee219017SChukun Pan pmic_int_l: pmic-int-l { 546*ee219017SChukun Pan rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 547*ee219017SChukun Pan }; 548*ee219017SChukun Pan }; 549*ee219017SChukun Pan 550*ee219017SChukun Pan usb { 551*ee219017SChukun Pan vcc5v0_usb30_host_en: vcc5v0-usb30-host-en { 552*ee219017SChukun Pan rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 553*ee219017SChukun Pan }; 554*ee219017SChukun Pan 555*ee219017SChukun Pan vcc5v0_usb_otg_en: vcc5v0-usb-otg-en { 556*ee219017SChukun Pan rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 557*ee219017SChukun Pan }; 558*ee219017SChukun Pan }; 559*ee219017SChukun Pan 560*ee219017SChukun Pan wifi { 561*ee219017SChukun Pan wifi_host_wake_h: wifi-host-wake-h { 562*ee219017SChukun Pan rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 563*ee219017SChukun Pan }; 564*ee219017SChukun Pan 565*ee219017SChukun Pan wifi_reg_on_h: wifi-reg-on-h { 566*ee219017SChukun Pan rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 567*ee219017SChukun Pan }; 568*ee219017SChukun Pan }; 569*ee219017SChukun Pan}; 570*ee219017SChukun Pan 571*ee219017SChukun Pan&pmu_io_domains { 572*ee219017SChukun Pan pmuio1-supply = <&vcc3v3_pmu>; 573*ee219017SChukun Pan pmuio2-supply = <&vcca1v8_pmu>; 574*ee219017SChukun Pan vccio1-supply = <&vccio_acodec>; 575*ee219017SChukun Pan vccio2-supply = <&vcc_1v8>; 576*ee219017SChukun Pan vccio3-supply = <&vccio_sd>; 577*ee219017SChukun Pan vccio4-supply = <&vcca1v8_pmu>; 578*ee219017SChukun Pan vccio5-supply = <&vcc_3v3>; 579*ee219017SChukun Pan vccio6-supply = <&vcc_3v3>; 580*ee219017SChukun Pan vccio7-supply = <&vcc_3v3>; 581*ee219017SChukun Pan status = "okay"; 582*ee219017SChukun Pan}; 583*ee219017SChukun Pan 584*ee219017SChukun Pan&saradc { 585*ee219017SChukun Pan vref-supply = <&vcca_1v8>; 586*ee219017SChukun Pan status = "okay"; 587*ee219017SChukun Pan}; 588*ee219017SChukun Pan 589*ee219017SChukun Pan&sdhci { 590*ee219017SChukun Pan bus-width = <8>; 591*ee219017SChukun Pan max-frequency = <200000000>; 592*ee219017SChukun Pan mmc-hs200-1_8v; 593*ee219017SChukun Pan non-removable; 594*ee219017SChukun Pan pinctrl-names = "default"; 595*ee219017SChukun Pan pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 596*ee219017SChukun Pan vmmc-supply = <&vcc_3v3>; 597*ee219017SChukun Pan vqmmc-supply = <&vcc_1v8>; 598*ee219017SChukun Pan status = "okay"; 599*ee219017SChukun Pan}; 600*ee219017SChukun Pan 601*ee219017SChukun Pan&sdmmc0 { 602*ee219017SChukun Pan bus-width = <4>; 603*ee219017SChukun Pan cap-sd-highspeed; 604*ee219017SChukun Pan disable-wp; 605*ee219017SChukun Pan pinctrl-names = "default"; 606*ee219017SChukun Pan pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 607*ee219017SChukun Pan sd-uhs-sdr50; 608*ee219017SChukun Pan vmmc-supply = <&vcc3v3_sys>; 609*ee219017SChukun Pan vqmmc-supply = <&vccio_sd>; 610*ee219017SChukun Pan status = "okay"; 611*ee219017SChukun Pan}; 612*ee219017SChukun Pan 613*ee219017SChukun Pan&sdmmc1 { 614*ee219017SChukun Pan bus-width = <4>; 615*ee219017SChukun Pan cap-sd-highspeed; 616*ee219017SChukun Pan cap-sdio-irq; 617*ee219017SChukun Pan keep-power-in-suspend; 618*ee219017SChukun Pan mmc-pwrseq = <&sdio_pwrseq>; 619*ee219017SChukun Pan non-removable; 620*ee219017SChukun Pan pinctrl-names = "default"; 621*ee219017SChukun Pan pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>; 622*ee219017SChukun Pan sd-uhs-sdr104; 623*ee219017SChukun Pan vmmc-supply = <&vcc3v3_sys>; 624*ee219017SChukun Pan vqmmc-supply = <&vcca1v8_pmu>; 625*ee219017SChukun Pan status = "okay"; 626*ee219017SChukun Pan}; 627*ee219017SChukun Pan 628*ee219017SChukun Pan&sfc { 629*ee219017SChukun Pan #address-cells = <1>; 630*ee219017SChukun Pan #size-cells = <0>; 631*ee219017SChukun Pan status = "okay"; 632*ee219017SChukun Pan 633*ee219017SChukun Pan flash@0 { 634*ee219017SChukun Pan compatible = "jedec,spi-nor"; 635*ee219017SChukun Pan reg = <0x0>; 636*ee219017SChukun Pan spi-max-frequency = <120000000>; 637*ee219017SChukun Pan spi-rx-bus-width = <4>; 638*ee219017SChukun Pan spi-tx-bus-width = <1>; 639*ee219017SChukun Pan }; 640*ee219017SChukun Pan}; 641*ee219017SChukun Pan 642*ee219017SChukun Pan&tsadc { 643*ee219017SChukun Pan rockchip,hw-tshut-mode = <1>; 644*ee219017SChukun Pan rockchip,hw-tshut-polarity = <0>; 645*ee219017SChukun Pan status = "okay"; 646*ee219017SChukun Pan}; 647*ee219017SChukun Pan 648*ee219017SChukun Pan&uart1 { 649*ee219017SChukun Pan pinctrl-names = "default"; 650*ee219017SChukun Pan pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>; 651*ee219017SChukun Pan status = "okay"; 652*ee219017SChukun Pan}; 653*ee219017SChukun Pan 654*ee219017SChukun Pan&uart2 { 655*ee219017SChukun Pan status = "okay"; 656*ee219017SChukun Pan}; 657*ee219017SChukun Pan 658*ee219017SChukun Pan&usb_host0_ehci { 659*ee219017SChukun Pan status = "okay"; 660*ee219017SChukun Pan}; 661*ee219017SChukun Pan 662*ee219017SChukun Pan&usb_host0_ohci { 663*ee219017SChukun Pan status = "okay"; 664*ee219017SChukun Pan}; 665*ee219017SChukun Pan 666*ee219017SChukun Pan&usb_host0_xhci { 667*ee219017SChukun Pan dr_mode = "host"; 668*ee219017SChukun Pan status = "okay"; 669*ee219017SChukun Pan}; 670*ee219017SChukun Pan 671*ee219017SChukun Pan&usb_host1_ehci { 672*ee219017SChukun Pan status = "okay"; 673*ee219017SChukun Pan}; 674*ee219017SChukun Pan 675*ee219017SChukun Pan&usb_host1_ohci { 676*ee219017SChukun Pan status = "okay"; 677*ee219017SChukun Pan}; 678*ee219017SChukun Pan 679*ee219017SChukun Pan&usb_host1_xhci { 680*ee219017SChukun Pan status = "okay"; 681*ee219017SChukun Pan}; 682*ee219017SChukun Pan 683*ee219017SChukun Pan&usb2phy0 { 684*ee219017SChukun Pan status = "okay"; 685*ee219017SChukun Pan}; 686*ee219017SChukun Pan 687*ee219017SChukun Pan&usb2phy0_host { 688*ee219017SChukun Pan phy-supply = <&vcc5v0_usb30_host>; 689*ee219017SChukun Pan status = "okay"; 690*ee219017SChukun Pan}; 691*ee219017SChukun Pan 692*ee219017SChukun Pan&usb2phy0_otg { 693*ee219017SChukun Pan phy-supply = <&vcc5v0_usb_otg>; 694*ee219017SChukun Pan status = "okay"; 695*ee219017SChukun Pan}; 696*ee219017SChukun Pan 697*ee219017SChukun Pan&usb2phy1 { 698*ee219017SChukun Pan status = "okay"; 699*ee219017SChukun Pan}; 700*ee219017SChukun Pan 701*ee219017SChukun Pan&usb2phy1_host { 702*ee219017SChukun Pan phy-supply = <&vcc5v0_usb30_host>; 703*ee219017SChukun Pan status = "okay"; 704*ee219017SChukun Pan}; 705*ee219017SChukun Pan 706*ee219017SChukun Pan&usb2phy1_otg { 707*ee219017SChukun Pan phy-supply = <&vcc5v0_usb30_host>; 708*ee219017SChukun Pan status = "okay"; 709*ee219017SChukun Pan}; 710*ee219017SChukun Pan 711*ee219017SChukun Pan&vop { 712*ee219017SChukun Pan assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 713*ee219017SChukun Pan assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 714*ee219017SChukun Pan status = "okay"; 715*ee219017SChukun Pan}; 716*ee219017SChukun Pan 717*ee219017SChukun Pan&vop_mmu { 718*ee219017SChukun Pan status = "okay"; 719*ee219017SChukun Pan}; 720*ee219017SChukun Pan 721*ee219017SChukun Pan&vp0 { 722*ee219017SChukun Pan vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 723*ee219017SChukun Pan reg = <ROCKCHIP_VOP2_EP_HDMI0>; 724*ee219017SChukun Pan remote-endpoint = <&hdmi_in_vp0>; 725*ee219017SChukun Pan }; 726*ee219017SChukun Pan}; 727