xref: /linux/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts (revision 60675d4ca1ef0857e44eba5849b74a3a998d0c0f)
150decd49STianling Shen// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
250decd49STianling Shen/*
350decd49STianling Shen * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
450decd49STianling Shen *
550decd49STianling Shen * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
6b5bf8420STianling Shen * (http://www.friendlyelec.com)
750decd49STianling Shen *
850decd49STianling Shen * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
950decd49STianling Shen */
1050decd49STianling Shen
1150decd49STianling Shen/dts-v1/;
1250decd49STianling Shen#include <dt-bindings/gpio/gpio.h>
1350decd49STianling Shen#include <dt-bindings/input/input.h>
1450decd49STianling Shen#include <dt-bindings/leds/common.h>
1550decd49STianling Shen#include <dt-bindings/pinctrl/rockchip.h>
1650decd49STianling Shen#include <dt-bindings/soc/rockchip,vop2.h>
1750decd49STianling Shen#include "rk3566.dtsi"
1850decd49STianling Shen
1950decd49STianling Shen/ {
20b5bf8420STianling Shen	model = "FriendlyElec NanoPi R3S";
2150decd49STianling Shen	compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
2250decd49STianling Shen
2350decd49STianling Shen	aliases {
2450decd49STianling Shen		ethernet0 = &gmac1;
25*b7cd1115STianling Shen		mmc0 = &sdhci;
26*b7cd1115STianling Shen		mmc1 = &sdmmc0;
2750decd49STianling Shen	};
2850decd49STianling Shen
2950decd49STianling Shen	chosen: chosen {
3050decd49STianling Shen		stdout-path = "serial2:1500000n8";
3150decd49STianling Shen	};
3250decd49STianling Shen
3350decd49STianling Shen	gpio-keys {
3450decd49STianling Shen		compatible = "gpio-keys";
3550decd49STianling Shen		pinctrl-names = "default";
3650decd49STianling Shen		pinctrl-0 = <&reset_button_pin>;
3750decd49STianling Shen
3850decd49STianling Shen		button-reset {
3950decd49STianling Shen			label = "reset";
4050decd49STianling Shen			gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
4150decd49STianling Shen			linux,code = <KEY_RESTART>;
4250decd49STianling Shen			debounce-interval = <50>;
4350decd49STianling Shen		};
4450decd49STianling Shen	};
4550decd49STianling Shen
4650decd49STianling Shen	gpio-leds {
4750decd49STianling Shen		compatible = "gpio-leds";
4850decd49STianling Shen		pinctrl-names = "default";
4950decd49STianling Shen		pinctrl-0 = <&power_led_pin>, <&lan_led_pin>, <&wan_led_pin>;
5050decd49STianling Shen
5150decd49STianling Shen		power_led: led-0 {
5250decd49STianling Shen			color = <LED_COLOR_ID_RED>;
5350decd49STianling Shen			function = LED_FUNCTION_POWER;
5450decd49STianling Shen			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
5550decd49STianling Shen			default-state = "on";
5650decd49STianling Shen		};
5750decd49STianling Shen
5850decd49STianling Shen		lan_led: led-1 {
5950decd49STianling Shen			color = <LED_COLOR_ID_GREEN>;
6050decd49STianling Shen			function = LED_FUNCTION_LAN;
6150decd49STianling Shen			gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
6250decd49STianling Shen		};
6350decd49STianling Shen
6450decd49STianling Shen		wan_led: led-2 {
6550decd49STianling Shen			color = <LED_COLOR_ID_GREEN>;
6650decd49STianling Shen			function = LED_FUNCTION_WAN;
6750decd49STianling Shen			gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
6850decd49STianling Shen		};
6950decd49STianling Shen	};
7050decd49STianling Shen
7150decd49STianling Shen	vcc3v3_sys: regulator-vcc3v3-sys {
7250decd49STianling Shen		compatible = "regulator-fixed";
7350decd49STianling Shen		regulator-name = "vcc3v3_sys";
7450decd49STianling Shen		regulator-always-on;
7550decd49STianling Shen		regulator-boot-on;
7650decd49STianling Shen		regulator-min-microvolt = <3300000>;
7750decd49STianling Shen		regulator-max-microvolt = <3300000>;
7850decd49STianling Shen		vin-supply = <&vcc5v0_sys>;
7950decd49STianling Shen	};
8050decd49STianling Shen
8150decd49STianling Shen	vcc5v0_sys: regulator-vcc5v0-sys {
8250decd49STianling Shen		compatible = "regulator-fixed";
8350decd49STianling Shen		regulator-name = "vcc5v0_sys";
8450decd49STianling Shen		regulator-always-on;
8550decd49STianling Shen		regulator-boot-on;
8650decd49STianling Shen		regulator-min-microvolt = <5000000>;
8750decd49STianling Shen		regulator-max-microvolt = <5000000>;
8850decd49STianling Shen		vin-supply = <&vdd_usbc>;
8950decd49STianling Shen	};
9050decd49STianling Shen
9150decd49STianling Shen	vcc5v0_usb: regulator-vcc5v0_usb {
9250decd49STianling Shen		compatible = "regulator-fixed";
9350decd49STianling Shen		enable-active-high;
9450decd49STianling Shen		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
9550decd49STianling Shen		pinctrl-names = "default";
9650decd49STianling Shen		pinctrl-0 = <&vcc5v0_usb_host_en>;
9750decd49STianling Shen		regulator-name = "vcc5v0_usb";
9850decd49STianling Shen		regulator-always-on;
9950decd49STianling Shen		regulator-boot-on;
10050decd49STianling Shen		regulator-min-microvolt = <5000000>;
10150decd49STianling Shen		regulator-max-microvolt = <5000000>;
10250decd49STianling Shen		vin-supply = <&vcc5v0_sys>;
10350decd49STianling Shen	};
10450decd49STianling Shen
10550decd49STianling Shen	vdd_usbc: regulator-vdd-usbc {
10650decd49STianling Shen		compatible = "regulator-fixed";
10750decd49STianling Shen		regulator-name = "vdd_usbc";
10850decd49STianling Shen		regulator-always-on;
10950decd49STianling Shen		regulator-boot-on;
11050decd49STianling Shen		regulator-min-microvolt = <5000000>;
11150decd49STianling Shen		regulator-max-microvolt = <5000000>;
11250decd49STianling Shen	};
11350decd49STianling Shen};
11450decd49STianling Shen
11550decd49STianling Shen&combphy1 {
11650decd49STianling Shen	status = "okay";
11750decd49STianling Shen};
11850decd49STianling Shen
11950decd49STianling Shen&combphy2 {
12050decd49STianling Shen	status = "okay";
12150decd49STianling Shen};
12250decd49STianling Shen
12350decd49STianling Shen&cpu0 {
12450decd49STianling Shen	cpu-supply = <&vdd_cpu>;
12550decd49STianling Shen};
12650decd49STianling Shen
12750decd49STianling Shen&cpu1 {
12850decd49STianling Shen	cpu-supply = <&vdd_cpu>;
12950decd49STianling Shen};
13050decd49STianling Shen
13150decd49STianling Shen&cpu2 {
13250decd49STianling Shen	cpu-supply = <&vdd_cpu>;
13350decd49STianling Shen};
13450decd49STianling Shen
13550decd49STianling Shen&cpu3 {
13650decd49STianling Shen	cpu-supply = <&vdd_cpu>;
13750decd49STianling Shen};
13850decd49STianling Shen
13950decd49STianling Shen&gmac1 {
14050decd49STianling Shen	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
14150decd49STianling Shen	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
14250decd49STianling Shen	assigned-clock-rates = <0>, <125000000>;
14350decd49STianling Shen	clock_in_out = "output";
14450decd49STianling Shen	phy-mode = "rgmii-id";
14550decd49STianling Shen	phy-handle = <&rgmii_phy1>;
14650decd49STianling Shen	pinctrl-names = "default";
14750decd49STianling Shen	pinctrl-0 = <&gmac1m0_miim
14850decd49STianling Shen		     &gmac1m0_tx_bus2_level3
14950decd49STianling Shen		     &gmac1m0_rx_bus2
15050decd49STianling Shen		     &gmac1m0_rgmii_clk_level2
15150decd49STianling Shen		     &gmac1m0_rgmii_bus_level3>;
15250decd49STianling Shen	status = "okay";
15350decd49STianling Shen};
15450decd49STianling Shen
15550decd49STianling Shen&gpu {
15650decd49STianling Shen	mali-supply = <&vdd_gpu>;
15750decd49STianling Shen	status = "okay";
15850decd49STianling Shen};
15950decd49STianling Shen
16050decd49STianling Shen&i2c0 {
16150decd49STianling Shen	status = "okay";
16250decd49STianling Shen
16350decd49STianling Shen	vdd_cpu: regulator@1c {
16450decd49STianling Shen		compatible = "tcs,tcs4525";
16550decd49STianling Shen		reg = <0x1c>;
16650decd49STianling Shen		fcs,suspend-voltage-selector = <1>;
16750decd49STianling Shen		regulator-name = "vdd_cpu";
16850decd49STianling Shen		regulator-always-on;
16950decd49STianling Shen		regulator-boot-on;
17050decd49STianling Shen		regulator-min-microvolt = <800000>;
17150decd49STianling Shen		regulator-max-microvolt = <1150000>;
17250decd49STianling Shen		regulator-ramp-delay = <2300>;
17350decd49STianling Shen		vin-supply = <&vcc5v0_sys>;
17450decd49STianling Shen
17550decd49STianling Shen		regulator-state-mem {
17650decd49STianling Shen			regulator-off-in-suspend;
17750decd49STianling Shen		};
17850decd49STianling Shen	};
17950decd49STianling Shen
18050decd49STianling Shen	rk809: pmic@20 {
18150decd49STianling Shen		compatible = "rockchip,rk809";
18250decd49STianling Shen		reg = <0x20>;
18350decd49STianling Shen		interrupt-parent = <&gpio0>;
18450decd49STianling Shen		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
18550decd49STianling Shen		#clock-cells = <1>;
18650decd49STianling Shen		pinctrl-names = "default";
18750decd49STianling Shen		pinctrl-0 = <&pmic_int>;
18850decd49STianling Shen		system-power-controller;
18950decd49STianling Shen		vcc1-supply = <&vcc3v3_sys>;
19050decd49STianling Shen		vcc2-supply = <&vcc3v3_sys>;
19150decd49STianling Shen		vcc3-supply = <&vcc3v3_sys>;
19250decd49STianling Shen		vcc4-supply = <&vcc3v3_sys>;
19350decd49STianling Shen		vcc5-supply = <&vcc3v3_sys>;
19450decd49STianling Shen		vcc6-supply = <&vcc3v3_sys>;
19550decd49STianling Shen		vcc7-supply = <&vcc3v3_sys>;
19650decd49STianling Shen		vcc8-supply = <&vcc3v3_sys>;
19750decd49STianling Shen		vcc9-supply = <&vcc3v3_sys>;
19850decd49STianling Shen		wakeup-source;
19950decd49STianling Shen
20050decd49STianling Shen		regulators {
20150decd49STianling Shen			vdd_logic: DCDC_REG1 {
20250decd49STianling Shen				regulator-name = "vdd_logic";
20350decd49STianling Shen				regulator-always-on;
20450decd49STianling Shen				regulator-boot-on;
20550decd49STianling Shen				regulator-initial-mode = <0x2>;
20650decd49STianling Shen				regulator-min-microvolt = <500000>;
20750decd49STianling Shen				regulator-max-microvolt = <1350000>;
20850decd49STianling Shen				regulator-ramp-delay = <6001>;
20950decd49STianling Shen
21050decd49STianling Shen				regulator-state-mem {
21150decd49STianling Shen					regulator-off-in-suspend;
21250decd49STianling Shen				};
21350decd49STianling Shen			};
21450decd49STianling Shen
21550decd49STianling Shen			vdd_gpu: DCDC_REG2 {
21650decd49STianling Shen				regulator-name = "vdd_gpu";
21750decd49STianling Shen				regulator-always-on;
21850decd49STianling Shen				regulator-initial-mode = <0x2>;
21950decd49STianling Shen				regulator-min-microvolt = <500000>;
22050decd49STianling Shen				regulator-max-microvolt = <1350000>;
22150decd49STianling Shen				regulator-ramp-delay = <6001>;
22250decd49STianling Shen
22350decd49STianling Shen				regulator-state-mem {
22450decd49STianling Shen					regulator-off-in-suspend;
22550decd49STianling Shen				};
22650decd49STianling Shen			};
22750decd49STianling Shen
22850decd49STianling Shen			vcc_ddr: DCDC_REG3 {
22950decd49STianling Shen				regulator-name = "vcc_ddr";
23050decd49STianling Shen				regulator-always-on;
23150decd49STianling Shen				regulator-boot-on;
23250decd49STianling Shen				regulator-initial-mode = <0x2>;
23350decd49STianling Shen
23450decd49STianling Shen				regulator-state-mem {
23550decd49STianling Shen					regulator-on-in-suspend;
23650decd49STianling Shen				};
23750decd49STianling Shen			};
23850decd49STianling Shen
23950decd49STianling Shen			vdd_npu: DCDC_REG4 {
24050decd49STianling Shen				regulator-name = "vdd_npu";
24150decd49STianling Shen				regulator-initial-mode = <0x2>;
24250decd49STianling Shen				regulator-min-microvolt = <500000>;
24350decd49STianling Shen				regulator-max-microvolt = <1350000>;
24450decd49STianling Shen				regulator-ramp-delay = <6001>;
24550decd49STianling Shen
24650decd49STianling Shen				regulator-state-mem {
24750decd49STianling Shen					regulator-off-in-suspend;
24850decd49STianling Shen				};
24950decd49STianling Shen			};
25050decd49STianling Shen
25150decd49STianling Shen			vcc_1v8: DCDC_REG5 {
25250decd49STianling Shen				regulator-name = "vcc_1v8";
25350decd49STianling Shen				regulator-always-on;
25450decd49STianling Shen				regulator-boot-on;
25550decd49STianling Shen				regulator-min-microvolt = <1800000>;
25650decd49STianling Shen				regulator-max-microvolt = <1800000>;
25750decd49STianling Shen
25850decd49STianling Shen				regulator-state-mem {
25950decd49STianling Shen					regulator-off-in-suspend;
26050decd49STianling Shen				};
26150decd49STianling Shen			};
26250decd49STianling Shen
26350decd49STianling Shen			vdda0v9_image: LDO_REG1 {
26450decd49STianling Shen				regulator-name = "vdda0v9_image";
26550decd49STianling Shen				regulator-min-microvolt = <950000>;
26650decd49STianling Shen				regulator-max-microvolt = <950000>;
26750decd49STianling Shen
26850decd49STianling Shen				regulator-state-mem {
26950decd49STianling Shen					regulator-off-in-suspend;
27050decd49STianling Shen				};
27150decd49STianling Shen			};
27250decd49STianling Shen
27350decd49STianling Shen			vdda_0v9: LDO_REG2 {
27450decd49STianling Shen				regulator-name = "vdda_0v9";
27550decd49STianling Shen				regulator-always-on;
27650decd49STianling Shen				regulator-boot-on;
27750decd49STianling Shen				regulator-min-microvolt = <900000>;
27850decd49STianling Shen				regulator-max-microvolt = <900000>;
27950decd49STianling Shen
28050decd49STianling Shen				regulator-state-mem {
28150decd49STianling Shen					regulator-off-in-suspend;
28250decd49STianling Shen				};
28350decd49STianling Shen			};
28450decd49STianling Shen
28550decd49STianling Shen			vdda0v9_pmu: LDO_REG3 {
28650decd49STianling Shen				regulator-name = "vdda0v9_pmu";
28750decd49STianling Shen				regulator-always-on;
28850decd49STianling Shen				regulator-boot-on;
28950decd49STianling Shen				regulator-min-microvolt = <900000>;
29050decd49STianling Shen				regulator-max-microvolt = <900000>;
29150decd49STianling Shen
29250decd49STianling Shen				regulator-state-mem {
29350decd49STianling Shen					regulator-on-in-suspend;
29450decd49STianling Shen					regulator-suspend-microvolt = <900000>;
29550decd49STianling Shen				};
29650decd49STianling Shen			};
29750decd49STianling Shen
29850decd49STianling Shen			vccio_acodec: LDO_REG4 {
29950decd49STianling Shen				regulator-name = "vccio_acodec";
30050decd49STianling Shen				regulator-min-microvolt = <3300000>;
30150decd49STianling Shen				regulator-max-microvolt = <3300000>;
30250decd49STianling Shen
30350decd49STianling Shen				regulator-state-mem {
30450decd49STianling Shen					regulator-off-in-suspend;
30550decd49STianling Shen				};
30650decd49STianling Shen			};
30750decd49STianling Shen
30850decd49STianling Shen			vccio_sd: LDO_REG5 {
30950decd49STianling Shen				regulator-name = "vccio_sd";
31050decd49STianling Shen				regulator-min-microvolt = <1800000>;
31150decd49STianling Shen				regulator-max-microvolt = <3300000>;
31250decd49STianling Shen
31350decd49STianling Shen				regulator-state-mem {
31450decd49STianling Shen					regulator-off-in-suspend;
31550decd49STianling Shen				};
31650decd49STianling Shen			};
31750decd49STianling Shen
31850decd49STianling Shen			vcc3v3_pmu: LDO_REG6 {
31950decd49STianling Shen				regulator-name = "vcc3v3_pmu";
32050decd49STianling Shen				regulator-always-on;
32150decd49STianling Shen				regulator-boot-on;
32250decd49STianling Shen				regulator-min-microvolt = <3300000>;
32350decd49STianling Shen				regulator-max-microvolt = <3300000>;
32450decd49STianling Shen
32550decd49STianling Shen				regulator-state-mem {
32650decd49STianling Shen					regulator-on-in-suspend;
32750decd49STianling Shen					regulator-suspend-microvolt = <3300000>;
32850decd49STianling Shen				};
32950decd49STianling Shen			};
33050decd49STianling Shen
33150decd49STianling Shen			vcca_1v8: LDO_REG7 {
33250decd49STianling Shen				regulator-name = "vcca_1v8";
33350decd49STianling Shen				regulator-always-on;
33450decd49STianling Shen				regulator-boot-on;
33550decd49STianling Shen				regulator-min-microvolt = <1800000>;
33650decd49STianling Shen				regulator-max-microvolt = <1800000>;
33750decd49STianling Shen
33850decd49STianling Shen				regulator-state-mem {
33950decd49STianling Shen					regulator-off-in-suspend;
34050decd49STianling Shen				};
34150decd49STianling Shen			};
34250decd49STianling Shen
34350decd49STianling Shen			vcca1v8_pmu: LDO_REG8 {
34450decd49STianling Shen				regulator-name = "vcca1v8_pmu";
34550decd49STianling Shen				regulator-always-on;
34650decd49STianling Shen				regulator-boot-on;
34750decd49STianling Shen				regulator-min-microvolt = <1800000>;
34850decd49STianling Shen				regulator-max-microvolt = <1800000>;
34950decd49STianling Shen
35050decd49STianling Shen				regulator-state-mem {
35150decd49STianling Shen					regulator-on-in-suspend;
35250decd49STianling Shen					regulator-suspend-microvolt = <1800000>;
35350decd49STianling Shen				};
35450decd49STianling Shen			};
35550decd49STianling Shen
35650decd49STianling Shen			vcca1v8_image: LDO_REG9 {
35750decd49STianling Shen				regulator-name = "vcca1v8_image";
35850decd49STianling Shen				regulator-min-microvolt = <1800000>;
35950decd49STianling Shen				regulator-max-microvolt = <1800000>;
36050decd49STianling Shen
36150decd49STianling Shen				regulator-state-mem {
36250decd49STianling Shen					regulator-off-in-suspend;
36350decd49STianling Shen				};
36450decd49STianling Shen			};
36550decd49STianling Shen
36650decd49STianling Shen			vcc_3v3: SWITCH_REG1 {
36750decd49STianling Shen				regulator-name = "vcc_3v3";
36850decd49STianling Shen				regulator-always-on;
36950decd49STianling Shen				regulator-boot-on;
37050decd49STianling Shen
37150decd49STianling Shen				regulator-state-mem {
37250decd49STianling Shen					regulator-off-in-suspend;
37350decd49STianling Shen				};
37450decd49STianling Shen			};
37550decd49STianling Shen
37650decd49STianling Shen			vcc3v3_sd: SWITCH_REG2 {
37750decd49STianling Shen				regulator-name = "vcc3v3_sd";
37850decd49STianling Shen				regulator-always-on;
37950decd49STianling Shen				regulator-boot-on;
38050decd49STianling Shen
38150decd49STianling Shen				regulator-state-mem {
38250decd49STianling Shen					regulator-off-in-suspend;
38350decd49STianling Shen				};
38450decd49STianling Shen			};
38550decd49STianling Shen		};
38650decd49STianling Shen	};
38750decd49STianling Shen};
38850decd49STianling Shen
38950decd49STianling Shen&i2c1 {
39050decd49STianling Shen	status = "okay";
39150decd49STianling Shen
39250decd49STianling Shen	hym8563: rtc@51 {
39350decd49STianling Shen		compatible = "haoyu,hym8563";
39450decd49STianling Shen		reg = <0x51>;
39550decd49STianling Shen		#clock-cells = <0>;
39650decd49STianling Shen		clock-output-names = "hym8563";
39750decd49STianling Shen		pinctrl-names = "default";
39850decd49STianling Shen		pinctrl-0 = <&hym8563_int>;
39950decd49STianling Shen		interrupt-parent = <&gpio0>;
40050decd49STianling Shen		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
40150decd49STianling Shen		wakeup-source;
40250decd49STianling Shen	};
40350decd49STianling Shen};
40450decd49STianling Shen
40550decd49STianling Shen&mdio1 {
40650decd49STianling Shen	rgmii_phy1: ethernet-phy@1 {
40750decd49STianling Shen		compatible = "ethernet-phy-ieee802.3-c22";
40850decd49STianling Shen		reg = <1>;
40950decd49STianling Shen		interrupt-parent = <&gpio4>;
41050decd49STianling Shen		interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
41150decd49STianling Shen		pinctrl-names = "default";
41250decd49STianling Shen		pinctrl-0 = <&eth_phy_reset_pin>;
41382b28689STianling Shen		reset-assert-us = <20000>;
41482b28689STianling Shen		reset-deassert-us = <100000>;
41582b28689STianling Shen		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
41650decd49STianling Shen	};
41750decd49STianling Shen};
41850decd49STianling Shen
41950decd49STianling Shen&pcie2x1 {
42050decd49STianling Shen	pinctrl-names = "default";
42150decd49STianling Shen	pinctrl-0 = <&pcie_reset_h>;
42250decd49STianling Shen	reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
42350decd49STianling Shen	status = "okay";
42450decd49STianling Shen};
42550decd49STianling Shen
42650decd49STianling Shen&pinctrl {
42750decd49STianling Shen	gpio-leds {
42850decd49STianling Shen		lan_led_pin: lan-led-pin {
42950decd49STianling Shen			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
43050decd49STianling Shen		};
43150decd49STianling Shen
43250decd49STianling Shen		power_led_pin: power-led-pin {
43350decd49STianling Shen			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
43450decd49STianling Shen		};
43550decd49STianling Shen
43650decd49STianling Shen		wan_led_pin: wan-led-pin {
43750decd49STianling Shen			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
43850decd49STianling Shen		};
43950decd49STianling Shen	};
44050decd49STianling Shen
44150decd49STianling Shen	gmac {
44250decd49STianling Shen		eth_phy_reset_pin: eth-phy-reset-pin {
44350decd49STianling Shen			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
44450decd49STianling Shen		};
44550decd49STianling Shen	};
44650decd49STianling Shen
44750decd49STianling Shen	pcie {
44850decd49STianling Shen		pcie_reset_h: pcie-reset-h {
44950decd49STianling Shen			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
45050decd49STianling Shen		};
45150decd49STianling Shen	};
45250decd49STianling Shen
45350decd49STianling Shen	pmic {
45450decd49STianling Shen		pmic_int: pmic-int {
45550decd49STianling Shen			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
45650decd49STianling Shen		};
45750decd49STianling Shen	};
45850decd49STianling Shen
45950decd49STianling Shen	rockchip-key {
46050decd49STianling Shen		reset_button_pin: reset-button-pin {
46150decd49STianling Shen			rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
46250decd49STianling Shen		};
46350decd49STianling Shen	};
46450decd49STianling Shen
46550decd49STianling Shen	rtc {
46650decd49STianling Shen		hym8563_int: hym8563-int {
46750decd49STianling Shen			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
46850decd49STianling Shen		};
46950decd49STianling Shen	};
47050decd49STianling Shen
47150decd49STianling Shen	usb {
47250decd49STianling Shen		vcc5v0_usb_host_en: vcc5v0-usb-host-en {
47350decd49STianling Shen			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
47450decd49STianling Shen		};
47550decd49STianling Shen	};
47650decd49STianling Shen};
47750decd49STianling Shen
47850decd49STianling Shen&pmu_io_domains {
47950decd49STianling Shen	pmuio1-supply = <&vcc3v3_pmu>;
48050decd49STianling Shen	pmuio2-supply = <&vcc3v3_pmu>;
48150decd49STianling Shen	vccio1-supply = <&vccio_acodec>;
48250decd49STianling Shen	vccio2-supply = <&vcc_1v8>;
48350decd49STianling Shen	vccio3-supply = <&vccio_sd>;
48450decd49STianling Shen	vccio4-supply = <&vcc_3v3>;
48550decd49STianling Shen	vccio5-supply = <&vcc_1v8>;
48650decd49STianling Shen	vccio6-supply = <&vcc_3v3>;
48750decd49STianling Shen	vccio7-supply = <&vcc_3v3>;
48817e150fdSTianling Shen	status = "okay";
48950decd49STianling Shen};
49050decd49STianling Shen
49150decd49STianling Shen&sdhci {
49250decd49STianling Shen	bus-width = <8>;
49350decd49STianling Shen	max-frequency = <200000000>;
4941b536503STianling Shen	mmc-hs200-1_8v;
49550decd49STianling Shen	non-removable;
49650decd49STianling Shen	pinctrl-names = "default";
49750decd49STianling Shen	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
49850decd49STianling Shen	status = "okay";
49950decd49STianling Shen};
50050decd49STianling Shen
50150decd49STianling Shen&sdmmc0 {
50250decd49STianling Shen	bus-width = <4>;
50350decd49STianling Shen	cap-mmc-highspeed;
50450decd49STianling Shen	cap-sd-highspeed;
50550decd49STianling Shen	disable-wp;
50650decd49STianling Shen	no-sdio;
50750decd49STianling Shen	no-mmc;
50850decd49STianling Shen	pinctrl-names = "default";
50950decd49STianling Shen	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
51050decd49STianling Shen	sd-uhs-sdr50;
51150decd49STianling Shen	vmmc-supply = <&vcc3v3_sd>;
51250decd49STianling Shen	vqmmc-supply = <&vccio_sd>;
51350decd49STianling Shen	status = "okay";
51450decd49STianling Shen};
51550decd49STianling Shen
51650decd49STianling Shen&tsadc {
51750decd49STianling Shen	status = "okay";
51850decd49STianling Shen};
51950decd49STianling Shen
52050decd49STianling Shen&uart2 {
52150decd49STianling Shen	status = "okay";
52250decd49STianling Shen};
52350decd49STianling Shen
52450decd49STianling Shen&usb2phy0 {
52550decd49STianling Shen	status = "okay";
52650decd49STianling Shen};
52750decd49STianling Shen
52850decd49STianling Shen&usb2phy0_host {
52950decd49STianling Shen	phy-supply = <&vcc5v0_usb>;
53050decd49STianling Shen	status = "okay";
53150decd49STianling Shen};
53250decd49STianling Shen
53350decd49STianling Shen&usb2phy0_otg {
53450decd49STianling Shen	status = "okay";
53550decd49STianling Shen};
53650decd49STianling Shen
53750decd49STianling Shen&usb_host0_xhci {
53850decd49STianling Shen	extcon = <&usb2phy0>;
53950decd49STianling Shen	status = "okay";
54050decd49STianling Shen};
54150decd49STianling Shen
54250decd49STianling Shen&usb_host1_xhci {
54350decd49STianling Shen	status = "okay";
54450decd49STianling Shen};
54550decd49STianling Shen
54650decd49STianling Shen&vop {
54750decd49STianling Shen	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
54850decd49STianling Shen	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
54950decd49STianling Shen	status = "okay";
55050decd49STianling Shen};
55150decd49STianling Shen
55250decd49STianling Shen&vop_mmu {
55350decd49STianling Shen	status = "okay";
55450decd49STianling Shen};
555