xref: /linux/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi (revision 4b660dbd9ee2059850fd30e0df420ca7a38a1856)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/linux-event-codes.h>
7#include <dt-bindings/pinctrl/rockchip.h>
8#include "rk3566-anbernic-rgxx3.dtsi"
9
10/ {
11	adc-joystick {
12		compatible = "adc-joystick";
13		io-channels = <&adc_mux 0>,
14			      <&adc_mux 1>,
15			      <&adc_mux 2>,
16			      <&adc_mux 3>;
17		pinctrl-0 = <&joy_mux_en>;
18		pinctrl-names = "default";
19		poll-interval = <60>;
20		#address-cells = <1>;
21		#size-cells = <0>;
22
23		axis@0 {
24			reg = <0>;
25			abs-flat = <32>;
26			abs-fuzz = <32>;
27			abs-range = <1023 15>;
28			linux,code = <ABS_X>;
29		};
30
31		axis@1 {
32			reg = <1>;
33			abs-flat = <32>;
34			abs-fuzz = <32>;
35			abs-range = <15 1023>;
36			linux,code = <ABS_RX>;
37		};
38
39		axis@2 {
40			reg = <2>;
41			abs-flat = <32>;
42			abs-fuzz = <32>;
43			abs-range = <15 1023>;
44			linux,code = <ABS_Y>;
45		};
46
47		axis@3 {
48			reg = <3>;
49			abs-flat = <32>;
50			abs-fuzz = <32>;
51			abs-range = <1023 15>;
52			linux,code = <ABS_RY>;
53		};
54	};
55
56	adc_mux: adc-mux {
57		compatible = "io-channel-mux";
58		channels = "left_x", "right_x", "left_y", "right_y";
59		#io-channel-cells = <1>;
60		io-channels = <&saradc 3>;
61		io-channel-names = "parent";
62		mux-controls = <&gpio_mux>;
63		settle-time-us = <100>;
64	};
65
66	backlight: backlight {
67		compatible = "pwm-backlight";
68		power-supply = <&vcc_sys>;
69		pwms = <&pwm4 0 25000 0>;
70	};
71
72	gpio_mux: mux-controller {
73		compatible = "gpio-mux";
74		mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>,
75			    <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
76		#mux-control-cells = <0>;
77	};
78};
79
80&cru {
81	assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
82			  <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
83	assigned-clock-rates = <32768>, <1200000000>,
84			       <200000000>, <241500000>;
85};
86
87&dsi_dphy0 {
88	status = "okay";
89};
90
91&dsi0 {
92	status = "okay";
93	#address-cells = <1>;
94	#size-cells = <0>;
95
96	ports {
97		dsi0_in: port@0 {
98			reg = <0>;
99			dsi0_in_vp1: endpoint {
100				remote-endpoint = <&vp1_out_dsi0>;
101			};
102		};
103
104		dsi0_out: port@1 {
105			reg = <1>;
106			mipi_out_panel: endpoint {
107				remote-endpoint = <&mipi_in_panel>;
108			};
109		};
110	};
111
112	panel: panel@0 {
113		compatible = "anbernic,rg353p-panel", "newvision,nv3051d";
114		reg = <0>;
115		backlight = <&backlight>;
116		pinctrl-names = "default";
117		pinctrl-0 = <&lcd_rst>;
118		reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
119		vdd-supply = <&vcc3v3_lcd0_n>;
120
121		port {
122			mipi_in_panel: endpoint {
123				remote-endpoint = <&mipi_out_panel>;
124			};
125		};
126	};
127};
128
129&gpio_keys_control {
130	button-a {
131		gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
132		label = "EAST";
133		linux,code = <BTN_EAST>;
134	};
135
136	button-left {
137		gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
138		label = "DPAD-LEFT";
139		linux,code = <BTN_DPAD_LEFT>;
140	};
141
142	button-right {
143		gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
144		label = "DPAD-RIGHT";
145		linux,code = <BTN_DPAD_RIGHT>;
146	};
147
148	button-thumbl {
149		gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
150		label = "THUMBL";
151		linux,code = <BTN_THUMBL>;
152	};
153
154	button-thumbr {
155		gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
156		label = "THUMBR";
157		linux,code = <BTN_THUMBR>;
158	};
159
160	button-y {
161		gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
162		label = "WEST";
163		linux,code = <BTN_WEST>;
164	};
165};
166
167&i2c0 {
168	/* This hardware is physically present but unused. */
169	power-monitor@62 {
170		compatible = "cellwise,cw2015";
171		reg = <0x62>;
172		status = "disabled";
173	};
174};
175
176&pinctrl {
177	gpio-lcd {
178		lcd_rst: lcd-rst {
179			rockchip,pins =
180				<4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
181		};
182	};
183};
184
185&pwm4 {
186	status = "okay";
187};
188
189&vp1 {
190	vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
191		reg = <ROCKCHIP_VOP2_EP_MIPI0>;
192		remote-endpoint = <&dsi0_in_vp1>;
193	};
194};
195