xref: /linux/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts (revision cf4cebcec619d963fa7496018f03cb0ff00dc257)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
5 */
6
7/*
8 * PinePhone Pro datasheet:
9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
10 */
11
12/dts-v1/;
13#include <dt-bindings/input/gpio-keys.h>
14#include <dt-bindings/input/linux-event-codes.h>
15#include <dt-bindings/leds/common.h>
16#include "rk3399.dtsi"
17#include "rk3399-opp.dtsi"
18
19/ {
20	model = "Pine64 PinePhone Pro";
21	compatible = "pine64,pinephone-pro", "rockchip,rk3399";
22	chassis-type = "handset";
23
24	aliases {
25		mmc0 = &sdio0;
26		mmc1 = &sdmmc;
27		mmc2 = &sdhci;
28	};
29
30	chosen {
31		stdout-path = "serial2:115200n8";
32	};
33
34	adc-keys {
35		compatible = "adc-keys";
36		io-channels = <&saradc 1>;
37		io-channel-names = "buttons";
38		keyup-threshold-microvolt = <1600000>;
39		poll-interval = <100>;
40
41		button-up {
42			label = "Volume Up";
43			linux,code = <KEY_VOLUMEUP>;
44			press-threshold-microvolt = <100000>;
45		};
46
47		button-down {
48			label = "Volume Down";
49			linux,code = <KEY_VOLUMEDOWN>;
50			press-threshold-microvolt = <600000>;
51		};
52	};
53
54	backlight: backlight {
55		compatible = "pwm-backlight";
56		pwms = <&pwm0 0 50000 0>;
57	};
58
59	gpio-keys {
60		compatible = "gpio-keys";
61		pinctrl-names = "default";
62		pinctrl-0 = <&pwrbtn_pin>;
63
64		key-power {
65			debounce-interval = <20>;
66			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
67			label = "Power";
68			linux,code = <KEY_POWER>;
69			wakeup-source;
70		};
71	};
72
73	leds {
74		compatible = "gpio-leds";
75		pinctrl-names = "default";
76		pinctrl-0 = <&red_led_pin &green_led_pin &blue_led_pin>;
77
78		led_red: led-0 {
79			color = <LED_COLOR_ID_RED>;
80			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
81		};
82
83		led_green: led-1 {
84			color = <LED_COLOR_ID_GREEN>;
85			gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
86		};
87
88		led_blue: led-2 {
89			color = <LED_COLOR_ID_BLUE>;
90			gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
91		};
92	};
93
94	multi-led {
95		compatible = "leds-group-multicolor";
96		color = <LED_COLOR_ID_RGB>;
97		function = LED_FUNCTION_INDICATOR;
98		leds = <&led_red>, <&led_green>, <&led_blue>;
99	};
100
101	vcc_sys: vcc-sys-regulator {
102		compatible = "regulator-fixed";
103		regulator-name = "vcc_sys";
104		regulator-always-on;
105		regulator-boot-on;
106	};
107
108	vcc3v3_sys: vcc3v3-sys-regulator {
109		compatible = "regulator-fixed";
110		regulator-name = "vcc3v3_sys";
111		regulator-always-on;
112		regulator-boot-on;
113		regulator-min-microvolt = <3300000>;
114		regulator-max-microvolt = <3300000>;
115		vin-supply = <&vcc_sys>;
116	};
117
118	vcca1v8_s3: vcc1v8-s3-regulator {
119		compatible = "regulator-fixed";
120		regulator-name = "vcca1v8_s3";
121		regulator-min-microvolt = <1800000>;
122		regulator-max-microvolt = <1800000>;
123		vin-supply = <&vcc3v3_sys>;
124		regulator-always-on;
125		regulator-boot-on;
126	};
127
128	vcc1v8_codec: vcc1v8-codec-regulator {
129		compatible = "regulator-fixed";
130		enable-active-high;
131		gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
132		pinctrl-names = "default";
133		pinctrl-0 = <&vcc1v8_codec_en>;
134		regulator-name = "vcc1v8_codec";
135		regulator-min-microvolt = <1800000>;
136		regulator-max-microvolt = <1800000>;
137		vin-supply = <&vcc3v3_sys>;
138	};
139
140	wifi_pwrseq: sdio-wifi-pwrseq {
141		compatible = "mmc-pwrseq-simple";
142		clocks = <&rk818 1>;
143		clock-names = "ext_clock";
144		pinctrl-names = "default";
145		pinctrl-0 = <&wifi_enable_h_pin>;
146		/*
147		 * Wait between power-on and SDIO access for CYP43455
148		 * POR circuit.
149		 */
150		post-power-on-delay-ms = <110>;
151		/*
152		 * Wait between consecutive toggles for CYP43455 CBUCK
153		 * regulator discharge.
154		 */
155		power-off-delay-us = <10000>;
156
157		/* WL_REG_ON on module */
158		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
159	};
160
161	/* MIPI DSI panel 1.8v supply */
162	vcc1v8_lcd: vcc1v8-lcd {
163		compatible = "regulator-fixed";
164		enable-active-high;
165		regulator-name = "vcc1v8_lcd";
166		regulator-min-microvolt = <1800000>;
167		regulator-max-microvolt = <1800000>;
168		vin-supply = <&vcc3v3_sys>;
169		gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
170		pinctrl-names = "default";
171	};
172
173	/* MIPI DSI panel 2.8v supply */
174	vcc2v8_lcd: vcc2v8-lcd {
175		compatible = "regulator-fixed";
176		enable-active-high;
177		regulator-name = "vcc2v8_lcd";
178		regulator-min-microvolt = <2800000>;
179		regulator-max-microvolt = <2800000>;
180		vin-supply = <&vcc3v3_sys>;
181		gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
182		pinctrl-names = "default";
183	};
184
185	vibrator {
186		compatible = "gpio-vibrator";
187		enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
188		vcc-supply = <&vcc3v3_sys>;
189	};
190};
191
192&cpu_alert0 {
193	temperature = <65000>;
194};
195&cpu_alert1 {
196	temperature = <68000>;
197};
198
199&cpu_l0 {
200	cpu-supply = <&vdd_cpu_l>;
201};
202
203&cpu_l1 {
204	cpu-supply = <&vdd_cpu_l>;
205};
206
207&cpu_l2 {
208	cpu-supply = <&vdd_cpu_l>;
209};
210
211&cpu_l3 {
212	cpu-supply = <&vdd_cpu_l>;
213};
214
215&cpu_b0 {
216	cpu-supply = <&vdd_cpu_b>;
217};
218
219&cpu_b1 {
220	cpu-supply = <&vdd_cpu_b>;
221};
222
223&emmc_phy {
224	status = "okay";
225};
226
227&gpu {
228	mali-supply = <&vdd_gpu>;
229	status = "okay";
230};
231
232&i2c0 {
233	clock-frequency = <400000>;
234	i2c-scl-rising-time-ns = <168>;
235	i2c-scl-falling-time-ns = <4>;
236	status = "okay";
237
238	rk818: pmic@1c {
239		compatible = "rockchip,rk818";
240		reg = <0x1c>;
241		interrupt-parent = <&gpio1>;
242		interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
243		#clock-cells = <1>;
244		clock-output-names = "xin32k", "rk808-clkout2";
245		pinctrl-names = "default";
246		pinctrl-0 = <&pmic_int_l>;
247		rockchip,system-power-controller;
248		wakeup-source;
249
250		vcc1-supply = <&vcc_sys>;
251		vcc2-supply = <&vcc_sys>;
252		vcc3-supply = <&vcc_sys>;
253		vcc4-supply = <&vcc_sys>;
254		vcc6-supply = <&vcc_sys>;
255		vcc7-supply = <&vcc3v3_sys>;
256		vcc8-supply = <&vcc_sys>;
257		vcc9-supply = <&vcc3v3_sys>;
258
259		regulators {
260			vdd_cpu_l: DCDC_REG1 {
261				regulator-name = "vdd_cpu_l";
262				regulator-always-on;
263				regulator-boot-on;
264				regulator-min-microvolt = <875000>;
265				regulator-max-microvolt = <975000>;
266				regulator-ramp-delay = <6001>;
267				regulator-state-mem {
268					regulator-off-in-suspend;
269				};
270			};
271
272			vdd_center: DCDC_REG2 {
273				regulator-name = "vdd_center";
274				regulator-always-on;
275				regulator-boot-on;
276				regulator-min-microvolt = <800000>;
277				regulator-max-microvolt = <1000000>;
278				regulator-ramp-delay = <6001>;
279				regulator-state-mem {
280					regulator-off-in-suspend;
281				};
282			};
283
284			vcc_ddr: DCDC_REG3 {
285				regulator-name = "vcc_ddr";
286				regulator-always-on;
287				regulator-boot-on;
288				regulator-state-mem {
289					regulator-on-in-suspend;
290				};
291			};
292
293			vcc_1v8: DCDC_REG4 {
294				regulator-name = "vcc_1v8";
295				regulator-always-on;
296				regulator-boot-on;
297				regulator-min-microvolt = <1800000>;
298				regulator-max-microvolt = <1800000>;
299				regulator-state-mem {
300					regulator-on-in-suspend;
301				};
302			};
303
304			vcca3v0_codec: LDO_REG1 {
305				regulator-name = "vcca3v0_codec";
306				regulator-min-microvolt = <3000000>;
307				regulator-max-microvolt = <3000000>;
308			};
309
310			vcc3v0_touch: LDO_REG2 {
311				regulator-name = "vcc3v0_touch";
312				regulator-min-microvolt = <3000000>;
313				regulator-max-microvolt = <3000000>;
314			};
315
316			vcca1v8_codec: LDO_REG3 {
317				regulator-name = "vcca1v8_codec";
318				regulator-min-microvolt = <1800000>;
319				regulator-max-microvolt = <1800000>;
320			};
321
322			rk818_pwr_on: LDO_REG4 {
323				regulator-name = "rk818_pwr_on";
324				regulator-always-on;
325				regulator-boot-on;
326				regulator-min-microvolt = <3300000>;
327				regulator-max-microvolt = <3300000>;
328				regulator-state-mem {
329					regulator-on-in-suspend;
330				};
331			};
332
333			vcc_3v0: LDO_REG5 {
334				regulator-name = "vcc_3v0";
335				regulator-always-on;
336				regulator-boot-on;
337				regulator-min-microvolt = <3000000>;
338				regulator-max-microvolt = <3000000>;
339				regulator-state-mem {
340					regulator-on-in-suspend;
341				};
342			};
343
344			vcc_1v5: LDO_REG6 {
345				regulator-name = "vcc_1v5";
346				regulator-always-on;
347				regulator-boot-on;
348				regulator-min-microvolt = <1500000>;
349				regulator-max-microvolt = <1500000>;
350				regulator-state-mem {
351					regulator-on-in-suspend;
352				};
353			};
354
355			vcc1v8_dvp: LDO_REG7 {
356				regulator-name = "vcc1v8_dvp";
357				regulator-min-microvolt = <1800000>;
358				regulator-max-microvolt = <1800000>;
359			};
360
361			vcc3v3_s3: LDO_REG8 {
362				regulator-name = "vcc3v3_s3";
363				regulator-always-on;
364				regulator-boot-on;
365				regulator-min-microvolt = <3300000>;
366				regulator-max-microvolt = <3300000>;
367				regulator-state-mem {
368					regulator-off-in-suspend;
369				};
370			};
371
372			vccio_sd: LDO_REG9 {
373				regulator-name = "vccio_sd";
374				regulator-min-microvolt = <1800000>;
375				regulator-max-microvolt = <3300000>;
376			};
377
378			vcc3v3_s0: SWITCH_REG {
379				regulator-name = "vcc3v3_s0";
380				regulator-always-on;
381				regulator-boot-on;
382				regulator-state-mem {
383					regulator-on-in-suspend;
384				};
385			};
386		};
387	};
388
389	vdd_cpu_b: regulator@40 {
390		compatible = "silergy,syr827";
391		reg = <0x40>;
392		fcs,suspend-voltage-selector = <1>;
393		pinctrl-names = "default";
394		pinctrl-0 = <&vsel1_pin>;
395		regulator-name = "vdd_cpu_b";
396		regulator-min-microvolt = <875000>;
397		regulator-max-microvolt = <1150000>;
398		regulator-ramp-delay = <1000>;
399		regulator-always-on;
400		regulator-boot-on;
401
402		regulator-state-mem {
403			regulator-off-in-suspend;
404		};
405	};
406
407	vdd_gpu: regulator@41 {
408		compatible = "silergy,syr828";
409		reg = <0x41>;
410		fcs,suspend-voltage-selector = <1>;
411		pinctrl-names = "default";
412		pinctrl-0 = <&vsel2_pin>;
413		regulator-name = "vdd_gpu";
414		regulator-min-microvolt = <875000>;
415		regulator-max-microvolt = <975000>;
416		regulator-ramp-delay = <1000>;
417		regulator-always-on;
418		regulator-boot-on;
419
420		regulator-state-mem {
421			regulator-off-in-suspend;
422		};
423	};
424};
425
426&i2c3 {
427	i2c-scl-rising-time-ns = <450>;
428	i2c-scl-falling-time-ns = <15>;
429	status = "okay";
430
431	touchscreen@14 {
432		compatible = "goodix,gt1158";
433		reg = <0x14>;
434		interrupt-parent = <&gpio3>;
435		interrupts = <RK_PB5 IRQ_TYPE_EDGE_RISING>;
436		irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
437		reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
438		AVDD28-supply = <&vcc3v0_touch>;
439		VDDIO-supply = <&vcc3v0_touch>;
440		touchscreen-size-x = <720>;
441		touchscreen-size-y = <1440>;
442	};
443};
444
445&i2c4 {
446	i2c-scl-rising-time-ns = <600>;
447	i2c-scl-falling-time-ns = <20>;
448	status = "okay";
449
450	/* Accelerometer/gyroscope */
451	mpu6500@68 {
452		compatible = "invensense,mpu6500";
453		reg = <0x68>;
454		interrupt-parent = <&gpio1>;
455		interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
456		vddio-supply = <&vcc_1v8>;
457	};
458};
459
460&cluster0_opp {
461	opp04 {
462		status = "disabled";
463	};
464
465	opp05 {
466		status = "disabled";
467	};
468};
469
470&cluster1_opp {
471	opp06 {
472		opp-hz = /bits/ 64 <1500000000>;
473		opp-microvolt = <1100000 1100000 1150000>;
474	};
475
476	opp07 {
477		status = "disabled";
478	};
479};
480
481&io_domains {
482	bt656-supply = <&vcc1v8_dvp>;
483	audio-supply = <&vcca1v8_codec>;
484	sdmmc-supply = <&vccio_sd>;
485	gpio1830-supply = <&vcc_3v0>;
486	status = "okay";
487};
488
489&mipi_dsi {
490	status = "okay";
491	clock-master;
492
493	ports {
494		mipi_out: port@1 {
495			#address-cells = <0>;
496			#size-cells = <0>;
497			reg = <1>;
498
499			mipi_out_panel: endpoint {
500				remote-endpoint = <&mipi_in_panel>;
501			};
502		};
503	};
504
505	panel@0 {
506		compatible = "hannstar,hsd060bhw4";
507		reg = <0>;
508		backlight = <&backlight>;
509		reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
510		vcc-supply = <&vcc2v8_lcd>;
511		iovcc-supply = <&vcc1v8_lcd>;
512		pinctrl-names = "default";
513
514		port {
515			mipi_in_panel: endpoint {
516				remote-endpoint = <&mipi_out_panel>;
517			};
518		};
519	};
520};
521
522&pmu_io_domains {
523	pmu1830-supply = <&vcc_1v8>;
524	status = "okay";
525};
526
527&pinctrl {
528	buttons {
529		pwrbtn_pin: pwrbtn-pin {
530			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
531		};
532	};
533
534	leds {
535		red_led_pin: red-led-pin {
536			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
537		};
538
539		green_led_pin: green-led-pin {
540			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
541		};
542
543		blue_led_pin: blue-led-pin {
544			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
545		};
546	};
547
548	pmic {
549		pmic_int_l: pmic-int-l {
550			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
551		};
552
553		vsel1_pin: vsel1-pin {
554			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
555		};
556
557		vsel2_pin: vsel2-pin {
558			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
559		};
560	};
561
562	sdio-pwrseq {
563		wifi_enable_h_pin: wifi-enable-h-pin {
564			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
565		};
566	};
567
568	sound {
569		vcc1v8_codec_en: vcc1v8-codec-en {
570			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
571		};
572	};
573
574	wireless-bluetooth {
575		bt_wake_pin: bt-wake-pin {
576			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
577		};
578
579		bt_host_wake_pin: bt-host-wake-pin {
580			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
581		};
582
583		bt_reset_pin: bt-reset-pin {
584			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
585		};
586	};
587};
588
589&sdio0 {
590	bus-width = <4>;
591	cap-sd-highspeed;
592	cap-sdio-irq;
593	disable-wp;
594	keep-power-in-suspend;
595	mmc-pwrseq = <&wifi_pwrseq>;
596	non-removable;
597	pinctrl-names = "default";
598	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
599	sd-uhs-sdr104;
600	status = "okay";
601};
602
603&pwm0 {
604	status = "okay";
605};
606
607&saradc {
608	vref-supply = <&vcca1v8_s3>;
609	status = "okay";
610};
611
612&sdmmc {
613	bus-width = <4>;
614	cap-sd-highspeed;
615	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
616	disable-wp;
617	max-frequency = <150000000>;
618	pinctrl-names = "default";
619	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
620	vmmc-supply = <&vcc3v3_sys>;
621	vqmmc-supply = <&vccio_sd>;
622	status = "okay";
623};
624
625&sdhci {
626	bus-width = <8>;
627	mmc-hs200-1_8v;
628	non-removable;
629	status = "okay";
630};
631
632&spi1 {
633	status = "okay";
634
635	flash@0 {
636		compatible = "jedec,spi-nor";
637		reg = <0>;
638		spi-max-frequency = <10000000>;
639	};
640};
641
642&tsadc {
643	rockchip,hw-tshut-mode = <1>;
644	rockchip,hw-tshut-polarity = <1>;
645	status = "okay";
646};
647
648&uart0 {
649	pinctrl-names = "default";
650	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
651	uart-has-rtscts;
652	status = "okay";
653
654	bluetooth {
655		compatible = "brcm,bcm4345c5";
656		clocks = <&rk818 1>;
657		clock-names = "lpo";
658		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
659		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
660		max-speed = <1500000>;
661		pinctrl-names = "default";
662		pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
663		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
664		vbat-supply = <&vcc3v3_sys>;
665		vddio-supply = <&vcc_1v8>;
666	};
667};
668
669&uart2 {
670	status = "okay";
671};
672
673&vopb {
674	status = "okay";
675	assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>,
676			  <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
677	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
678	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
679};
680
681&vopb_mmu {
682	status = "okay";
683};
684
685&vopl {
686	status = "okay";
687	assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>,
688			  <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
689	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
690	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
691};
692
693&vopl_mmu {
694	status = "okay";
695};
696