xref: /linux/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
5 */
6
7/*
8 * PinePhone Pro datasheet:
9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
10 */
11
12/dts-v1/;
13#include <dt-bindings/input/gpio-keys.h>
14#include <dt-bindings/input/linux-event-codes.h>
15#include <dt-bindings/leds/common.h>
16#include "rk3399.dtsi"
17
18/ {
19	model = "Pine64 PinePhone Pro";
20	compatible = "pine64,pinephone-pro", "rockchip,rk3399";
21	chassis-type = "handset";
22
23	aliases {
24		mmc0 = &sdio0;
25		mmc1 = &sdmmc;
26		mmc2 = &sdhci;
27	};
28
29	chosen {
30		stdout-path = "serial2:115200n8";
31	};
32
33	adc-keys {
34		compatible = "adc-keys";
35		io-channels = <&saradc 1>;
36		io-channel-names = "buttons";
37		keyup-threshold-microvolt = <1600000>;
38		poll-interval = <100>;
39
40		button-up {
41			label = "Volume Up";
42			linux,code = <KEY_VOLUMEUP>;
43			press-threshold-microvolt = <100000>;
44		};
45
46		button-down {
47			label = "Volume Down";
48			linux,code = <KEY_VOLUMEDOWN>;
49			press-threshold-microvolt = <600000>;
50		};
51	};
52
53	backlight: backlight {
54		compatible = "pwm-backlight";
55		pwms = <&pwm0 0 50000 0>;
56	};
57
58	gpio-keys {
59		compatible = "gpio-keys";
60		pinctrl-names = "default";
61		pinctrl-0 = <&pwrbtn_pin>;
62
63		key-power {
64			debounce-interval = <20>;
65			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
66			label = "Power";
67			linux,code = <KEY_POWER>;
68			wakeup-source;
69		};
70	};
71
72	leds {
73		compatible = "gpio-leds";
74		pinctrl-names = "default";
75		pinctrl-0 = <&red_led_pin &green_led_pin &blue_led_pin>;
76
77		led_red: led-0 {
78			color = <LED_COLOR_ID_RED>;
79			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
80		};
81
82		led_green: led-1 {
83			color = <LED_COLOR_ID_GREEN>;
84			gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
85		};
86
87		led_blue: led-2 {
88			color = <LED_COLOR_ID_BLUE>;
89			gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
90		};
91	};
92
93	multi-led {
94		compatible = "leds-group-multicolor";
95		color = <LED_COLOR_ID_RGB>;
96		function = LED_FUNCTION_INDICATOR;
97		leds = <&led_red>, <&led_green>, <&led_blue>;
98	};
99
100	vcc_sys: vcc-sys-regulator {
101		compatible = "regulator-fixed";
102		regulator-name = "vcc_sys";
103		regulator-always-on;
104		regulator-boot-on;
105	};
106
107	vcc3v3_sys: vcc3v3-sys-regulator {
108		compatible = "regulator-fixed";
109		regulator-name = "vcc3v3_sys";
110		regulator-always-on;
111		regulator-boot-on;
112		regulator-min-microvolt = <3300000>;
113		regulator-max-microvolt = <3300000>;
114		vin-supply = <&vcc_sys>;
115	};
116
117	vcca1v8_s3: vcc1v8-s3-regulator {
118		compatible = "regulator-fixed";
119		regulator-name = "vcca1v8_s3";
120		regulator-min-microvolt = <1800000>;
121		regulator-max-microvolt = <1800000>;
122		vin-supply = <&vcc3v3_sys>;
123		regulator-always-on;
124		regulator-boot-on;
125	};
126
127	vcc1v8_codec: vcc1v8-codec-regulator {
128		compatible = "regulator-fixed";
129		enable-active-high;
130		gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
131		pinctrl-names = "default";
132		pinctrl-0 = <&vcc1v8_codec_en>;
133		regulator-name = "vcc1v8_codec";
134		regulator-min-microvolt = <1800000>;
135		regulator-max-microvolt = <1800000>;
136		vin-supply = <&vcc3v3_sys>;
137	};
138
139	wifi_pwrseq: sdio-wifi-pwrseq {
140		compatible = "mmc-pwrseq-simple";
141		clocks = <&rk818 1>;
142		clock-names = "ext_clock";
143		pinctrl-names = "default";
144		pinctrl-0 = <&wifi_enable_h_pin>;
145		/*
146		 * Wait between power-on and SDIO access for CYP43455
147		 * POR circuit.
148		 */
149		post-power-on-delay-ms = <110>;
150		/*
151		 * Wait between consecutive toggles for CYP43455 CBUCK
152		 * regulator discharge.
153		 */
154		power-off-delay-us = <10000>;
155
156		/* WL_REG_ON on module */
157		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
158	};
159
160	/* MIPI DSI panel 1.8v supply */
161	vcc1v8_lcd: vcc1v8-lcd {
162		compatible = "regulator-fixed";
163		enable-active-high;
164		regulator-name = "vcc1v8_lcd";
165		regulator-min-microvolt = <1800000>;
166		regulator-max-microvolt = <1800000>;
167		vin-supply = <&vcc3v3_sys>;
168		gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
169	};
170
171	/* MIPI DSI panel 2.8v supply */
172	vcc2v8_lcd: vcc2v8-lcd {
173		compatible = "regulator-fixed";
174		enable-active-high;
175		regulator-name = "vcc2v8_lcd";
176		regulator-min-microvolt = <2800000>;
177		regulator-max-microvolt = <2800000>;
178		vin-supply = <&vcc3v3_sys>;
179		gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
180	};
181
182	vibrator {
183		compatible = "gpio-vibrator";
184		enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
185		vcc-supply = <&vcc3v3_sys>;
186	};
187};
188
189&cpu_alert0 {
190	temperature = <65000>;
191};
192&cpu_alert1 {
193	temperature = <68000>;
194};
195
196&cpu_l0 {
197	cpu-supply = <&vdd_cpu_l>;
198};
199
200&cpu_l1 {
201	cpu-supply = <&vdd_cpu_l>;
202};
203
204&cpu_l2 {
205	cpu-supply = <&vdd_cpu_l>;
206};
207
208&cpu_l3 {
209	cpu-supply = <&vdd_cpu_l>;
210};
211
212&cpu_b0 {
213	cpu-supply = <&vdd_cpu_b>;
214};
215
216&cpu_b1 {
217	cpu-supply = <&vdd_cpu_b>;
218};
219
220&emmc_phy {
221	status = "okay";
222};
223
224&gpu {
225	mali-supply = <&vdd_gpu>;
226	status = "okay";
227};
228
229&i2c0 {
230	clock-frequency = <400000>;
231	i2c-scl-rising-time-ns = <168>;
232	i2c-scl-falling-time-ns = <4>;
233	status = "okay";
234
235	rk818: pmic@1c {
236		compatible = "rockchip,rk818";
237		reg = <0x1c>;
238		interrupt-parent = <&gpio1>;
239		interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
240		#clock-cells = <1>;
241		clock-output-names = "xin32k", "rk808-clkout2";
242		pinctrl-names = "default";
243		pinctrl-0 = <&pmic_int_l>;
244		rockchip,system-power-controller;
245		wakeup-source;
246
247		vcc1-supply = <&vcc_sys>;
248		vcc2-supply = <&vcc_sys>;
249		vcc3-supply = <&vcc_sys>;
250		vcc4-supply = <&vcc_sys>;
251		vcc6-supply = <&vcc_sys>;
252		vcc7-supply = <&vcc3v3_sys>;
253		vcc8-supply = <&vcc_sys>;
254		vcc9-supply = <&vcc3v3_sys>;
255
256		regulators {
257			vdd_cpu_l: DCDC_REG1 {
258				regulator-name = "vdd_cpu_l";
259				regulator-always-on;
260				regulator-boot-on;
261				regulator-min-microvolt = <875000>;
262				regulator-max-microvolt = <975000>;
263				regulator-ramp-delay = <6001>;
264				regulator-state-mem {
265					regulator-off-in-suspend;
266				};
267			};
268
269			vdd_center: DCDC_REG2 {
270				regulator-name = "vdd_center";
271				regulator-always-on;
272				regulator-boot-on;
273				regulator-min-microvolt = <800000>;
274				regulator-max-microvolt = <1000000>;
275				regulator-ramp-delay = <6001>;
276				regulator-state-mem {
277					regulator-off-in-suspend;
278				};
279			};
280
281			vcc_ddr: DCDC_REG3 {
282				regulator-name = "vcc_ddr";
283				regulator-always-on;
284				regulator-boot-on;
285				regulator-state-mem {
286					regulator-on-in-suspend;
287				};
288			};
289
290			vcc_1v8: DCDC_REG4 {
291				regulator-name = "vcc_1v8";
292				regulator-always-on;
293				regulator-boot-on;
294				regulator-min-microvolt = <1800000>;
295				regulator-max-microvolt = <1800000>;
296				regulator-state-mem {
297					regulator-on-in-suspend;
298				};
299			};
300
301			vcca3v0_codec: LDO_REG1 {
302				regulator-name = "vcca3v0_codec";
303				regulator-min-microvolt = <3000000>;
304				regulator-max-microvolt = <3000000>;
305			};
306
307			vcc3v0_touch: LDO_REG2 {
308				regulator-name = "vcc3v0_touch";
309				regulator-min-microvolt = <3000000>;
310				regulator-max-microvolt = <3000000>;
311			};
312
313			vcca1v8_codec: LDO_REG3 {
314				regulator-name = "vcca1v8_codec";
315				regulator-min-microvolt = <1800000>;
316				regulator-max-microvolt = <1800000>;
317			};
318
319			rk818_pwr_on: LDO_REG4 {
320				regulator-name = "rk818_pwr_on";
321				regulator-always-on;
322				regulator-boot-on;
323				regulator-min-microvolt = <3300000>;
324				regulator-max-microvolt = <3300000>;
325				regulator-state-mem {
326					regulator-on-in-suspend;
327				};
328			};
329
330			vcc_3v0: LDO_REG5 {
331				regulator-name = "vcc_3v0";
332				regulator-always-on;
333				regulator-boot-on;
334				regulator-min-microvolt = <3000000>;
335				regulator-max-microvolt = <3000000>;
336				regulator-state-mem {
337					regulator-on-in-suspend;
338				};
339			};
340
341			vcc_1v5: LDO_REG6 {
342				regulator-name = "vcc_1v5";
343				regulator-always-on;
344				regulator-boot-on;
345				regulator-min-microvolt = <1500000>;
346				regulator-max-microvolt = <1500000>;
347				regulator-state-mem {
348					regulator-on-in-suspend;
349				};
350			};
351
352			vcc1v8_dvp: LDO_REG7 {
353				regulator-name = "vcc1v8_dvp";
354				regulator-min-microvolt = <1800000>;
355				regulator-max-microvolt = <1800000>;
356			};
357
358			vcc3v3_s3: LDO_REG8 {
359				regulator-name = "vcc3v3_s3";
360				regulator-always-on;
361				regulator-boot-on;
362				regulator-min-microvolt = <3300000>;
363				regulator-max-microvolt = <3300000>;
364				regulator-state-mem {
365					regulator-off-in-suspend;
366				};
367			};
368
369			vccio_sd: LDO_REG9 {
370				regulator-name = "vccio_sd";
371				regulator-min-microvolt = <1800000>;
372				regulator-max-microvolt = <3300000>;
373			};
374
375			vcc3v3_s0: SWITCH_REG {
376				regulator-name = "vcc3v3_s0";
377				regulator-always-on;
378				regulator-boot-on;
379				regulator-state-mem {
380					regulator-on-in-suspend;
381				};
382			};
383		};
384	};
385
386	vdd_cpu_b: regulator@40 {
387		compatible = "silergy,syr827";
388		reg = <0x40>;
389		fcs,suspend-voltage-selector = <1>;
390		pinctrl-names = "default";
391		pinctrl-0 = <&vsel1_pin>;
392		regulator-name = "vdd_cpu_b";
393		regulator-min-microvolt = <875000>;
394		regulator-max-microvolt = <1150000>;
395		regulator-ramp-delay = <1000>;
396		regulator-always-on;
397		regulator-boot-on;
398
399		regulator-state-mem {
400			regulator-off-in-suspend;
401		};
402	};
403
404	vdd_gpu: regulator@41 {
405		compatible = "silergy,syr828";
406		reg = <0x41>;
407		fcs,suspend-voltage-selector = <1>;
408		pinctrl-names = "default";
409		pinctrl-0 = <&vsel2_pin>;
410		regulator-name = "vdd_gpu";
411		regulator-min-microvolt = <875000>;
412		regulator-max-microvolt = <975000>;
413		regulator-ramp-delay = <1000>;
414		regulator-always-on;
415		regulator-boot-on;
416
417		regulator-state-mem {
418			regulator-off-in-suspend;
419		};
420	};
421};
422
423&i2c3 {
424	i2c-scl-rising-time-ns = <450>;
425	i2c-scl-falling-time-ns = <15>;
426	status = "okay";
427
428	touchscreen@14 {
429		compatible = "goodix,gt1158";
430		reg = <0x14>;
431		interrupt-parent = <&gpio3>;
432		interrupts = <RK_PB5 IRQ_TYPE_EDGE_RISING>;
433		irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
434		reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
435		AVDD28-supply = <&vcc3v0_touch>;
436		VDDIO-supply = <&vcc3v0_touch>;
437		touchscreen-size-x = <720>;
438		touchscreen-size-y = <1440>;
439	};
440};
441
442&i2c4 {
443	i2c-scl-rising-time-ns = <600>;
444	i2c-scl-falling-time-ns = <20>;
445	status = "okay";
446
447	/* Accelerometer/gyroscope */
448	mpu6500@68 {
449		compatible = "invensense,mpu6500";
450		reg = <0x68>;
451		interrupt-parent = <&gpio1>;
452		interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
453		vddio-supply = <&vcc_1v8>;
454	};
455};
456
457&cluster0_opp {
458	opp04 {
459		status = "disabled";
460	};
461
462	opp05 {
463		status = "disabled";
464	};
465};
466
467&cluster1_opp {
468	opp06 {
469		opp-hz = /bits/ 64 <1500000000>;
470		opp-microvolt = <1100000 1100000 1150000>;
471	};
472
473	opp07 {
474		status = "disabled";
475	};
476};
477
478&io_domains {
479	bt656-supply = <&vcc1v8_dvp>;
480	audio-supply = <&vcca1v8_codec>;
481	sdmmc-supply = <&vccio_sd>;
482	gpio1830-supply = <&vcc_3v0>;
483	status = "okay";
484};
485
486&mipi_dsi {
487	status = "okay";
488	clock-master;
489
490	ports {
491		mipi_out: port@1 {
492			#address-cells = <0>;
493			#size-cells = <0>;
494			reg = <1>;
495
496			mipi_out_panel: endpoint {
497				remote-endpoint = <&mipi_in_panel>;
498			};
499		};
500	};
501
502	panel@0 {
503		compatible = "hannstar,hsd060bhw4";
504		reg = <0>;
505		backlight = <&backlight>;
506		reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
507		vcc-supply = <&vcc2v8_lcd>;
508		iovcc-supply = <&vcc1v8_lcd>;
509		pinctrl-names = "default";
510
511		port {
512			mipi_in_panel: endpoint {
513				remote-endpoint = <&mipi_out_panel>;
514			};
515		};
516	};
517};
518
519&pmu_io_domains {
520	pmu1830-supply = <&vcc_1v8>;
521	status = "okay";
522};
523
524&pinctrl {
525	buttons {
526		pwrbtn_pin: pwrbtn-pin {
527			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
528		};
529	};
530
531	leds {
532		red_led_pin: red-led-pin {
533			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
534		};
535
536		green_led_pin: green-led-pin {
537			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
538		};
539
540		blue_led_pin: blue-led-pin {
541			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
542		};
543	};
544
545	pmic {
546		pmic_int_l: pmic-int-l {
547			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
548		};
549
550		vsel1_pin: vsel1-pin {
551			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
552		};
553
554		vsel2_pin: vsel2-pin {
555			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
556		};
557	};
558
559	sdio-pwrseq {
560		wifi_enable_h_pin: wifi-enable-h-pin {
561			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
562		};
563	};
564
565	sound {
566		vcc1v8_codec_en: vcc1v8-codec-en {
567			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
568		};
569	};
570
571	wireless-bluetooth {
572		bt_wake_pin: bt-wake-pin {
573			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
574		};
575
576		bt_host_wake_pin: bt-host-wake-pin {
577			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
578		};
579
580		bt_reset_pin: bt-reset-pin {
581			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
582		};
583	};
584};
585
586&sdio0 {
587	bus-width = <4>;
588	cap-sd-highspeed;
589	cap-sdio-irq;
590	disable-wp;
591	keep-power-in-suspend;
592	mmc-pwrseq = <&wifi_pwrseq>;
593	non-removable;
594	pinctrl-names = "default";
595	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
596	sd-uhs-sdr104;
597	status = "okay";
598};
599
600&pwm0 {
601	status = "okay";
602};
603
604&saradc {
605	vref-supply = <&vcca1v8_s3>;
606	status = "okay";
607};
608
609&sdmmc {
610	bus-width = <4>;
611	cap-sd-highspeed;
612	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
613	disable-wp;
614	max-frequency = <150000000>;
615	pinctrl-names = "default";
616	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
617	vmmc-supply = <&vcc3v3_sys>;
618	vqmmc-supply = <&vccio_sd>;
619	status = "okay";
620};
621
622&sdhci {
623	bus-width = <8>;
624	mmc-hs200-1_8v;
625	non-removable;
626	status = "okay";
627};
628
629&spi1 {
630	status = "okay";
631
632	flash@0 {
633		compatible = "jedec,spi-nor";
634		reg = <0>;
635		spi-max-frequency = <10000000>;
636	};
637};
638
639&tsadc {
640	rockchip,hw-tshut-mode = <1>;
641	rockchip,hw-tshut-polarity = <1>;
642	status = "okay";
643};
644
645&uart0 {
646	pinctrl-names = "default";
647	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
648	uart-has-rtscts;
649	status = "okay";
650
651	bluetooth {
652		compatible = "brcm,bcm4345c5";
653		clocks = <&rk818 1>;
654		clock-names = "lpo";
655		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
656		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
657		max-speed = <1500000>;
658		pinctrl-names = "default";
659		pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
660		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
661		vbat-supply = <&vcc3v3_sys>;
662		vddio-supply = <&vcc_1v8>;
663	};
664};
665
666&uart2 {
667	status = "okay";
668};
669
670&vopb {
671	status = "okay";
672	assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>,
673			  <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
674	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
675	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
676};
677
678&vopb_mmu {
679	status = "okay";
680};
681
682&vopl {
683	status = "okay";
684	assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>,
685			  <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
686	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
687	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
688};
689
690&vopl_mmu {
691	status = "okay";
692};
693