xref: /linux/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
5 */
6
7/*
8 * PinePhone Pro datasheet:
9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
10 */
11
12/dts-v1/;
13#include <dt-bindings/input/gpio-keys.h>
14#include <dt-bindings/input/linux-event-codes.h>
15#include <dt-bindings/leds/common.h>
16#include "rk3399.dtsi"
17
18/ {
19	model = "Pine64 PinePhone Pro";
20	compatible = "pine64,pinephone-pro", "rockchip,rk3399";
21	chassis-type = "handset";
22
23	aliases {
24		mmc0 = &sdio0;
25		mmc1 = &sdmmc;
26		mmc2 = &sdhci;
27	};
28
29	chosen {
30		stdout-path = "serial2:115200n8";
31	};
32
33	adc-keys {
34		compatible = "adc-keys";
35		io-channels = <&saradc 1>;
36		io-channel-names = "buttons";
37		keyup-threshold-microvolt = <1600000>;
38		poll-interval = <100>;
39
40		button-up {
41			label = "Volume Up";
42			linux,code = <KEY_VOLUMEUP>;
43			press-threshold-microvolt = <100000>;
44		};
45
46		button-down {
47			label = "Volume Down";
48			linux,code = <KEY_VOLUMEDOWN>;
49			press-threshold-microvolt = <600000>;
50		};
51	};
52
53	backlight: backlight {
54		compatible = "pwm-backlight";
55		pwms = <&pwm0 0 50000 0>;
56	};
57
58	gpio-keys {
59		compatible = "gpio-keys";
60		pinctrl-names = "default";
61		pinctrl-0 = <&pwrbtn_pin>;
62
63		key-power {
64			debounce-interval = <20>;
65			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
66			label = "Power";
67			linux,code = <KEY_POWER>;
68			wakeup-source;
69		};
70	};
71
72	leds {
73		compatible = "gpio-leds";
74		pinctrl-names = "default";
75		pinctrl-0 = <&red_led_pin &green_led_pin &blue_led_pin>;
76
77		led_red: led-0 {
78			color = <LED_COLOR_ID_RED>;
79			gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
80		};
81
82		led_green: led-1 {
83			color = <LED_COLOR_ID_GREEN>;
84			gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
85		};
86
87		led_blue: led-2 {
88			color = <LED_COLOR_ID_BLUE>;
89			gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
90		};
91	};
92
93	multi-led {
94		compatible = "leds-group-multicolor";
95		color = <LED_COLOR_ID_RGB>;
96		function = LED_FUNCTION_INDICATOR;
97		leds = <&led_red>, <&led_green>, <&led_blue>;
98	};
99
100	vcc_sys: vcc-sys-regulator {
101		compatible = "regulator-fixed";
102		regulator-name = "vcc_sys";
103		regulator-always-on;
104		regulator-boot-on;
105	};
106
107	vcc3v3_sys: vcc3v3-sys-regulator {
108		compatible = "regulator-fixed";
109		regulator-name = "vcc3v3_sys";
110		regulator-always-on;
111		regulator-boot-on;
112		regulator-min-microvolt = <3300000>;
113		regulator-max-microvolt = <3300000>;
114		vin-supply = <&vcc_sys>;
115	};
116
117	vcca1v8_s3: vcc1v8-s3-regulator {
118		compatible = "regulator-fixed";
119		regulator-name = "vcca1v8_s3";
120		regulator-min-microvolt = <1800000>;
121		regulator-max-microvolt = <1800000>;
122		vin-supply = <&vcc3v3_sys>;
123		regulator-always-on;
124		regulator-boot-on;
125	};
126
127	vcc1v8_codec: vcc1v8-codec-regulator {
128		compatible = "regulator-fixed";
129		enable-active-high;
130		gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
131		pinctrl-names = "default";
132		pinctrl-0 = <&vcc1v8_codec_en>;
133		regulator-name = "vcc1v8_codec";
134		regulator-min-microvolt = <1800000>;
135		regulator-max-microvolt = <1800000>;
136		vin-supply = <&vcc3v3_sys>;
137	};
138
139	wifi_pwrseq: sdio-wifi-pwrseq {
140		compatible = "mmc-pwrseq-simple";
141		clocks = <&rk818 1>;
142		clock-names = "ext_clock";
143		pinctrl-names = "default";
144		pinctrl-0 = <&wifi_enable_h_pin>;
145		/*
146		 * Wait between power-on and SDIO access for CYP43455
147		 * POR circuit.
148		 */
149		post-power-on-delay-ms = <110>;
150		/*
151		 * Wait between consecutive toggles for CYP43455 CBUCK
152		 * regulator discharge.
153		 */
154		power-off-delay-us = <10000>;
155
156		/* WL_REG_ON on module */
157		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
158	};
159
160	/* MIPI DSI panel 1.8v supply */
161	vcc1v8_lcd: vcc1v8-lcd {
162		compatible = "regulator-fixed";
163		enable-active-high;
164		regulator-name = "vcc1v8_lcd";
165		regulator-min-microvolt = <1800000>;
166		regulator-max-microvolt = <1800000>;
167		vin-supply = <&vcc3v3_sys>;
168		gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
169		pinctrl-names = "default";
170	};
171
172	/* MIPI DSI panel 2.8v supply */
173	vcc2v8_lcd: vcc2v8-lcd {
174		compatible = "regulator-fixed";
175		enable-active-high;
176		regulator-name = "vcc2v8_lcd";
177		regulator-min-microvolt = <2800000>;
178		regulator-max-microvolt = <2800000>;
179		vin-supply = <&vcc3v3_sys>;
180		gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
181		pinctrl-names = "default";
182	};
183
184	vibrator {
185		compatible = "gpio-vibrator";
186		enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
187		vcc-supply = <&vcc3v3_sys>;
188	};
189};
190
191&cpu_alert0 {
192	temperature = <65000>;
193};
194&cpu_alert1 {
195	temperature = <68000>;
196};
197
198&cpu_l0 {
199	cpu-supply = <&vdd_cpu_l>;
200};
201
202&cpu_l1 {
203	cpu-supply = <&vdd_cpu_l>;
204};
205
206&cpu_l2 {
207	cpu-supply = <&vdd_cpu_l>;
208};
209
210&cpu_l3 {
211	cpu-supply = <&vdd_cpu_l>;
212};
213
214&cpu_b0 {
215	cpu-supply = <&vdd_cpu_b>;
216};
217
218&cpu_b1 {
219	cpu-supply = <&vdd_cpu_b>;
220};
221
222&emmc_phy {
223	status = "okay";
224};
225
226&gpu {
227	mali-supply = <&vdd_gpu>;
228	status = "okay";
229};
230
231&i2c0 {
232	clock-frequency = <400000>;
233	i2c-scl-rising-time-ns = <168>;
234	i2c-scl-falling-time-ns = <4>;
235	status = "okay";
236
237	rk818: pmic@1c {
238		compatible = "rockchip,rk818";
239		reg = <0x1c>;
240		interrupt-parent = <&gpio1>;
241		interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
242		#clock-cells = <1>;
243		clock-output-names = "xin32k", "rk808-clkout2";
244		pinctrl-names = "default";
245		pinctrl-0 = <&pmic_int_l>;
246		rockchip,system-power-controller;
247		wakeup-source;
248
249		vcc1-supply = <&vcc_sys>;
250		vcc2-supply = <&vcc_sys>;
251		vcc3-supply = <&vcc_sys>;
252		vcc4-supply = <&vcc_sys>;
253		vcc6-supply = <&vcc_sys>;
254		vcc7-supply = <&vcc3v3_sys>;
255		vcc8-supply = <&vcc_sys>;
256		vcc9-supply = <&vcc3v3_sys>;
257
258		regulators {
259			vdd_cpu_l: DCDC_REG1 {
260				regulator-name = "vdd_cpu_l";
261				regulator-always-on;
262				regulator-boot-on;
263				regulator-min-microvolt = <875000>;
264				regulator-max-microvolt = <975000>;
265				regulator-ramp-delay = <6001>;
266				regulator-state-mem {
267					regulator-off-in-suspend;
268				};
269			};
270
271			vdd_center: DCDC_REG2 {
272				regulator-name = "vdd_center";
273				regulator-always-on;
274				regulator-boot-on;
275				regulator-min-microvolt = <800000>;
276				regulator-max-microvolt = <1000000>;
277				regulator-ramp-delay = <6001>;
278				regulator-state-mem {
279					regulator-off-in-suspend;
280				};
281			};
282
283			vcc_ddr: DCDC_REG3 {
284				regulator-name = "vcc_ddr";
285				regulator-always-on;
286				regulator-boot-on;
287				regulator-state-mem {
288					regulator-on-in-suspend;
289				};
290			};
291
292			vcc_1v8: DCDC_REG4 {
293				regulator-name = "vcc_1v8";
294				regulator-always-on;
295				regulator-boot-on;
296				regulator-min-microvolt = <1800000>;
297				regulator-max-microvolt = <1800000>;
298				regulator-state-mem {
299					regulator-on-in-suspend;
300				};
301			};
302
303			vcca3v0_codec: LDO_REG1 {
304				regulator-name = "vcca3v0_codec";
305				regulator-min-microvolt = <3000000>;
306				regulator-max-microvolt = <3000000>;
307			};
308
309			vcc3v0_touch: LDO_REG2 {
310				regulator-name = "vcc3v0_touch";
311				regulator-min-microvolt = <3000000>;
312				regulator-max-microvolt = <3000000>;
313			};
314
315			vcca1v8_codec: LDO_REG3 {
316				regulator-name = "vcca1v8_codec";
317				regulator-min-microvolt = <1800000>;
318				regulator-max-microvolt = <1800000>;
319			};
320
321			rk818_pwr_on: LDO_REG4 {
322				regulator-name = "rk818_pwr_on";
323				regulator-always-on;
324				regulator-boot-on;
325				regulator-min-microvolt = <3300000>;
326				regulator-max-microvolt = <3300000>;
327				regulator-state-mem {
328					regulator-on-in-suspend;
329				};
330			};
331
332			vcc_3v0: LDO_REG5 {
333				regulator-name = "vcc_3v0";
334				regulator-always-on;
335				regulator-boot-on;
336				regulator-min-microvolt = <3000000>;
337				regulator-max-microvolt = <3000000>;
338				regulator-state-mem {
339					regulator-on-in-suspend;
340				};
341			};
342
343			vcc_1v5: LDO_REG6 {
344				regulator-name = "vcc_1v5";
345				regulator-always-on;
346				regulator-boot-on;
347				regulator-min-microvolt = <1500000>;
348				regulator-max-microvolt = <1500000>;
349				regulator-state-mem {
350					regulator-on-in-suspend;
351				};
352			};
353
354			vcc1v8_dvp: LDO_REG7 {
355				regulator-name = "vcc1v8_dvp";
356				regulator-min-microvolt = <1800000>;
357				regulator-max-microvolt = <1800000>;
358			};
359
360			vcc3v3_s3: LDO_REG8 {
361				regulator-name = "vcc3v3_s3";
362				regulator-always-on;
363				regulator-boot-on;
364				regulator-min-microvolt = <3300000>;
365				regulator-max-microvolt = <3300000>;
366				regulator-state-mem {
367					regulator-off-in-suspend;
368				};
369			};
370
371			vccio_sd: LDO_REG9 {
372				regulator-name = "vccio_sd";
373				regulator-min-microvolt = <1800000>;
374				regulator-max-microvolt = <3300000>;
375			};
376
377			vcc3v3_s0: SWITCH_REG {
378				regulator-name = "vcc3v3_s0";
379				regulator-always-on;
380				regulator-boot-on;
381				regulator-state-mem {
382					regulator-on-in-suspend;
383				};
384			};
385		};
386	};
387
388	vdd_cpu_b: regulator@40 {
389		compatible = "silergy,syr827";
390		reg = <0x40>;
391		fcs,suspend-voltage-selector = <1>;
392		pinctrl-names = "default";
393		pinctrl-0 = <&vsel1_pin>;
394		regulator-name = "vdd_cpu_b";
395		regulator-min-microvolt = <875000>;
396		regulator-max-microvolt = <1150000>;
397		regulator-ramp-delay = <1000>;
398		regulator-always-on;
399		regulator-boot-on;
400
401		regulator-state-mem {
402			regulator-off-in-suspend;
403		};
404	};
405
406	vdd_gpu: regulator@41 {
407		compatible = "silergy,syr828";
408		reg = <0x41>;
409		fcs,suspend-voltage-selector = <1>;
410		pinctrl-names = "default";
411		pinctrl-0 = <&vsel2_pin>;
412		regulator-name = "vdd_gpu";
413		regulator-min-microvolt = <875000>;
414		regulator-max-microvolt = <975000>;
415		regulator-ramp-delay = <1000>;
416		regulator-always-on;
417		regulator-boot-on;
418
419		regulator-state-mem {
420			regulator-off-in-suspend;
421		};
422	};
423};
424
425&i2c3 {
426	i2c-scl-rising-time-ns = <450>;
427	i2c-scl-falling-time-ns = <15>;
428	status = "okay";
429
430	touchscreen@14 {
431		compatible = "goodix,gt1158";
432		reg = <0x14>;
433		interrupt-parent = <&gpio3>;
434		interrupts = <RK_PB5 IRQ_TYPE_EDGE_RISING>;
435		irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
436		reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
437		AVDD28-supply = <&vcc3v0_touch>;
438		VDDIO-supply = <&vcc3v0_touch>;
439		touchscreen-size-x = <720>;
440		touchscreen-size-y = <1440>;
441	};
442};
443
444&i2c4 {
445	i2c-scl-rising-time-ns = <600>;
446	i2c-scl-falling-time-ns = <20>;
447	status = "okay";
448
449	/* Accelerometer/gyroscope */
450	mpu6500@68 {
451		compatible = "invensense,mpu6500";
452		reg = <0x68>;
453		interrupt-parent = <&gpio1>;
454		interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
455		vddio-supply = <&vcc_1v8>;
456	};
457};
458
459&cluster0_opp {
460	opp04 {
461		status = "disabled";
462	};
463
464	opp05 {
465		status = "disabled";
466	};
467};
468
469&cluster1_opp {
470	opp06 {
471		opp-hz = /bits/ 64 <1500000000>;
472		opp-microvolt = <1100000 1100000 1150000>;
473	};
474
475	opp07 {
476		status = "disabled";
477	};
478};
479
480&io_domains {
481	bt656-supply = <&vcc1v8_dvp>;
482	audio-supply = <&vcca1v8_codec>;
483	sdmmc-supply = <&vccio_sd>;
484	gpio1830-supply = <&vcc_3v0>;
485	status = "okay";
486};
487
488&mipi_dsi {
489	status = "okay";
490	clock-master;
491
492	ports {
493		mipi_out: port@1 {
494			#address-cells = <0>;
495			#size-cells = <0>;
496			reg = <1>;
497
498			mipi_out_panel: endpoint {
499				remote-endpoint = <&mipi_in_panel>;
500			};
501		};
502	};
503
504	panel@0 {
505		compatible = "hannstar,hsd060bhw4";
506		reg = <0>;
507		backlight = <&backlight>;
508		reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
509		vcc-supply = <&vcc2v8_lcd>;
510		iovcc-supply = <&vcc1v8_lcd>;
511		pinctrl-names = "default";
512
513		port {
514			mipi_in_panel: endpoint {
515				remote-endpoint = <&mipi_out_panel>;
516			};
517		};
518	};
519};
520
521&pmu_io_domains {
522	pmu1830-supply = <&vcc_1v8>;
523	status = "okay";
524};
525
526&pinctrl {
527	buttons {
528		pwrbtn_pin: pwrbtn-pin {
529			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
530		};
531	};
532
533	leds {
534		red_led_pin: red-led-pin {
535			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
536		};
537
538		green_led_pin: green-led-pin {
539			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
540		};
541
542		blue_led_pin: blue-led-pin {
543			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
544		};
545	};
546
547	pmic {
548		pmic_int_l: pmic-int-l {
549			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
550		};
551
552		vsel1_pin: vsel1-pin {
553			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
554		};
555
556		vsel2_pin: vsel2-pin {
557			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
558		};
559	};
560
561	sdio-pwrseq {
562		wifi_enable_h_pin: wifi-enable-h-pin {
563			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
564		};
565	};
566
567	sound {
568		vcc1v8_codec_en: vcc1v8-codec-en {
569			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
570		};
571	};
572
573	wireless-bluetooth {
574		bt_wake_pin: bt-wake-pin {
575			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
576		};
577
578		bt_host_wake_pin: bt-host-wake-pin {
579			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
580		};
581
582		bt_reset_pin: bt-reset-pin {
583			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
584		};
585	};
586};
587
588&sdio0 {
589	bus-width = <4>;
590	cap-sd-highspeed;
591	cap-sdio-irq;
592	disable-wp;
593	keep-power-in-suspend;
594	mmc-pwrseq = <&wifi_pwrseq>;
595	non-removable;
596	pinctrl-names = "default";
597	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
598	sd-uhs-sdr104;
599	status = "okay";
600};
601
602&pwm0 {
603	status = "okay";
604};
605
606&saradc {
607	vref-supply = <&vcca1v8_s3>;
608	status = "okay";
609};
610
611&sdmmc {
612	bus-width = <4>;
613	cap-sd-highspeed;
614	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
615	disable-wp;
616	max-frequency = <150000000>;
617	pinctrl-names = "default";
618	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
619	vmmc-supply = <&vcc3v3_sys>;
620	vqmmc-supply = <&vccio_sd>;
621	status = "okay";
622};
623
624&sdhci {
625	bus-width = <8>;
626	mmc-hs200-1_8v;
627	non-removable;
628	status = "okay";
629};
630
631&spi1 {
632	status = "okay";
633
634	flash@0 {
635		compatible = "jedec,spi-nor";
636		reg = <0>;
637		spi-max-frequency = <10000000>;
638	};
639};
640
641&tsadc {
642	rockchip,hw-tshut-mode = <1>;
643	rockchip,hw-tshut-polarity = <1>;
644	status = "okay";
645};
646
647&uart0 {
648	pinctrl-names = "default";
649	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
650	uart-has-rtscts;
651	status = "okay";
652
653	bluetooth {
654		compatible = "brcm,bcm4345c5";
655		clocks = <&rk818 1>;
656		clock-names = "lpo";
657		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
658		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
659		max-speed = <1500000>;
660		pinctrl-names = "default";
661		pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
662		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
663		vbat-supply = <&vcc3v3_sys>;
664		vddio-supply = <&vcc_1v8>;
665	};
666};
667
668&uart2 {
669	status = "okay";
670};
671
672&vopb {
673	status = "okay";
674	assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>,
675			  <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
676	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
677	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
678};
679
680&vopb_mmu {
681	status = "okay";
682};
683
684&vopl {
685	status = "okay";
686	assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>,
687			  <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
688	assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
689	assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
690};
691
692&vopl_mmu {
693	status = "okay";
694};
695