xref: /linux/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi (revision b8d312aa075f33282565467662c4628dae0a2aff)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * RK3399-based FriendlyElec boards device tree source
4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
9 *
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
12 */
13
14/dts-v1/;
15#include <dt-bindings/input/linux-event-codes.h>
16#include "rk3399.dtsi"
17#include "rk3399-opp.dtsi"
18
19/ {
20	chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	clkin_gmac: external-gmac-clock {
25		compatible = "fixed-clock";
26		clock-frequency = <125000000>;
27		clock-output-names = "clkin_gmac";
28		#clock-cells = <0>;
29	};
30
31	vcc3v3_sys: vcc3v3-sys {
32		compatible = "regulator-fixed";
33		regulator-always-on;
34		regulator-boot-on;
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-name = "vcc3v3_sys";
38	};
39
40	vcc5v0_sys: vcc5v0-sys {
41		compatible = "regulator-fixed";
42		regulator-always-on;
43		regulator-boot-on;
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		regulator-name = "vcc5v0_sys";
47		vin-supply = <&vdd_5v>;
48	};
49
50	/* switched by pmic_sleep */
51	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
52		compatible = "regulator-fixed";
53		regulator-always-on;
54		regulator-boot-on;
55		regulator-min-microvolt = <1800000>;
56		regulator-max-microvolt = <1800000>;
57		regulator-name = "vcc1v8_s3";
58		vin-supply = <&vcc_1v8>;
59	};
60
61	vcc3v0_sd: vcc3v0-sd {
62		compatible = "regulator-fixed";
63		enable-active-high;
64		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
65		pinctrl-names = "default";
66		pinctrl-0 = <&sdmmc0_pwr_h>;
67		regulator-always-on;
68		regulator-min-microvolt = <3000000>;
69		regulator-max-microvolt = <3000000>;
70		regulator-name = "vcc3v0_sd";
71		vin-supply = <&vcc3v3_sys>;
72	};
73
74	vbus_typec: vbus-typec {
75		compatible = "regulator-fixed";
76		regulator-min-microvolt = <5000000>;
77		regulator-max-microvolt = <5000000>;
78		regulator-name = "vbus_typec";
79	};
80
81	gpio-keys {
82		compatible = "gpio-keys";
83		autorepeat;
84		pinctrl-names = "default";
85		pinctrl-0 = <&power_key>;
86
87		power {
88			debounce-interval = <100>;
89			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
90			label = "GPIO Key Power";
91			linux,code = <KEY_POWER>;
92			wakeup-source;
93		};
94	};
95
96	leds: gpio-leds {
97		compatible = "gpio-leds";
98		pinctrl-names = "default";
99		pinctrl-0 = <&leds_gpio>;
100
101		status {
102			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
103			label = "status_led";
104			linux,default-trigger = "heartbeat";
105		};
106	};
107
108	sdio_pwrseq: sdio-pwrseq {
109		compatible = "mmc-pwrseq-simple";
110		clocks = <&rk808 1>;
111		clock-names = "ext_clock";
112		pinctrl-names = "default";
113		pinctrl-0 = <&wifi_reg_on_h>;
114		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
115	};
116};
117
118&cpu_b0 {
119	cpu-supply = <&vdd_cpu_b>;
120};
121
122&cpu_b1 {
123	cpu-supply = <&vdd_cpu_b>;
124};
125
126&cpu_l0 {
127	cpu-supply = <&vdd_cpu_l>;
128};
129
130&cpu_l1 {
131	cpu-supply = <&vdd_cpu_l>;
132};
133
134&cpu_l2 {
135	cpu-supply = <&vdd_cpu_l>;
136};
137
138&cpu_l3 {
139	cpu-supply = <&vdd_cpu_l>;
140};
141
142&emmc_phy {
143	status = "okay";
144};
145
146&gmac {
147	assigned-clock-parents = <&clkin_gmac>;
148	assigned-clocks = <&cru SCLK_RMII_SRC>;
149	clock_in_out = "input";
150	pinctrl-names = "default";
151	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
152	phy-handle = <&rtl8211e>;
153	phy-mode = "rgmii";
154	phy-supply = <&vcc3v3_s3>;
155	snps,reset-active-low;
156	snps,reset-delays-us = <0 10000 30000>;
157	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
158	tx_delay = <0x28>;
159	rx_delay = <0x11>;
160	status = "okay";
161
162	mdio {
163		compatible = "snps,dwmac-mdio";
164		#address-cells = <1>;
165		#size-cells = <0>;
166
167		rtl8211e: phy@1 {
168			reg = <1>;
169			interrupt-parent = <&gpio3>;
170			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
171		};
172	};
173};
174
175&gpu {
176	mali-supply = <&vdd_gpu>;
177	status = "okay";
178};
179
180&hdmi {
181	ddc-i2c-bus = <&i2c7>;
182	pinctrl-names = "default";
183	pinctrl-0 = <&hdmi_cec>;
184	status = "okay";
185};
186
187&i2c0 {
188	clock-frequency = <400000>;
189	i2c-scl-rising-time-ns = <160>;
190	i2c-scl-falling-time-ns = <30>;
191	status = "okay";
192
193	vdd_cpu_b: regulator@40 {
194		compatible = "silergy,syr827";
195		reg = <0x40>;
196		fcs,suspend-voltage-selector = <1>;
197		pinctrl-names = "default";
198		pinctrl-0 = <&cpu_b_sleep>;
199		regulator-always-on;
200		regulator-boot-on;
201		regulator-min-microvolt = <712500>;
202		regulator-max-microvolt = <1500000>;
203		regulator-name = "vdd_cpu_b";
204		regulator-ramp-delay = <1000>;
205		vin-supply = <&vcc3v3_sys>;
206
207		regulator-state-mem {
208			regulator-off-in-suspend;
209		};
210	};
211
212	vdd_gpu: regulator@41 {
213		compatible = "silergy,syr828";
214		reg = <0x41>;
215		fcs,suspend-voltage-selector = <1>;
216		pinctrl-names = "default";
217		pinctrl-0 = <&gpu_sleep>;
218		regulator-always-on;
219		regulator-boot-on;
220		regulator-min-microvolt = <712500>;
221		regulator-max-microvolt = <1500000>;
222		regulator-name = "vdd_gpu";
223		regulator-ramp-delay = <1000>;
224		vin-supply = <&vcc3v3_sys>;
225
226		regulator-state-mem {
227			regulator-off-in-suspend;
228		};
229	};
230
231	rk808: pmic@1b {
232		compatible = "rockchip,rk808";
233		reg = <0x1b>;
234		clock-output-names = "xin32k", "rtc_clko_wifi";
235		#clock-cells = <1>;
236		interrupt-parent = <&gpio1>;
237		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
238		pinctrl-names = "default";
239		pinctrl-0 = <&pmic_int_l>;
240		rockchip,system-power-controller;
241		wakeup-source;
242
243		vcc1-supply = <&vcc3v3_sys>;
244		vcc2-supply = <&vcc3v3_sys>;
245		vcc3-supply = <&vcc3v3_sys>;
246		vcc4-supply = <&vcc3v3_sys>;
247		vcc6-supply = <&vcc3v3_sys>;
248		vcc7-supply = <&vcc3v3_sys>;
249		vcc8-supply = <&vcc3v3_sys>;
250		vcc9-supply = <&vcc3v3_sys>;
251		vcc10-supply = <&vcc3v3_sys>;
252		vcc11-supply = <&vcc3v3_sys>;
253		vcc12-supply = <&vcc3v3_sys>;
254		vddio-supply = <&vcc_3v0>;
255
256		regulators {
257			vdd_center: DCDC_REG1 {
258				regulator-always-on;
259				regulator-boot-on;
260				regulator-min-microvolt = <750000>;
261				regulator-max-microvolt = <1350000>;
262				regulator-name = "vdd_center";
263				regulator-ramp-delay = <6001>;
264
265				regulator-state-mem {
266					regulator-off-in-suspend;
267				};
268			};
269
270			vdd_cpu_l: DCDC_REG2 {
271				regulator-always-on;
272				regulator-boot-on;
273				regulator-min-microvolt = <750000>;
274				regulator-max-microvolt = <1350000>;
275				regulator-name = "vdd_cpu_l";
276				regulator-ramp-delay = <6001>;
277
278				regulator-state-mem {
279					regulator-off-in-suspend;
280				};
281			};
282
283			vcc_ddr: DCDC_REG3 {
284				regulator-always-on;
285				regulator-boot-on;
286				regulator-name = "vcc_ddr";
287
288				regulator-state-mem {
289					regulator-on-in-suspend;
290				};
291			};
292
293			vcc_1v8: DCDC_REG4 {
294				regulator-always-on;
295				regulator-boot-on;
296				regulator-min-microvolt = <1800000>;
297				regulator-max-microvolt = <1800000>;
298				regulator-name = "vcc_1v8";
299
300				regulator-state-mem {
301					regulator-on-in-suspend;
302					regulator-suspend-microvolt = <1800000>;
303				};
304			};
305
306			vcc1v8_cam: LDO_REG1 {
307				regulator-always-on;
308				regulator-boot-on;
309				regulator-min-microvolt = <1800000>;
310				regulator-max-microvolt = <1800000>;
311				regulator-name = "vcc1v8_cam";
312
313				regulator-state-mem {
314					regulator-off-in-suspend;
315				};
316			};
317
318			vcc3v0_touch: LDO_REG2 {
319				regulator-always-on;
320				regulator-boot-on;
321				regulator-min-microvolt = <3000000>;
322				regulator-max-microvolt = <3000000>;
323				regulator-name = "vcc3v0_touch";
324
325				regulator-state-mem {
326					regulator-off-in-suspend;
327				};
328			};
329
330			vcc1v8_pmupll: LDO_REG3 {
331				regulator-always-on;
332				regulator-boot-on;
333				regulator-min-microvolt = <1800000>;
334				regulator-max-microvolt = <1800000>;
335				regulator-name = "vcc1v8_pmupll";
336
337				regulator-state-mem {
338					regulator-on-in-suspend;
339					regulator-suspend-microvolt = <1800000>;
340				};
341			};
342
343			vcc_sdio: LDO_REG4 {
344				regulator-always-on;
345				regulator-boot-on;
346				regulator-init-microvolt = <3000000>;
347				regulator-min-microvolt = <1800000>;
348				regulator-max-microvolt = <3300000>;
349				regulator-name = "vcc_sdio";
350
351				regulator-state-mem {
352					regulator-on-in-suspend;
353					regulator-suspend-microvolt = <3000000>;
354				};
355			};
356
357			vcca3v0_codec: LDO_REG5 {
358				regulator-always-on;
359				regulator-boot-on;
360				regulator-min-microvolt = <3000000>;
361				regulator-max-microvolt = <3000000>;
362				regulator-name = "vcca3v0_codec";
363
364				regulator-state-mem {
365					regulator-off-in-suspend;
366				};
367			};
368
369			vcc_1v5: LDO_REG6 {
370				regulator-always-on;
371				regulator-boot-on;
372				regulator-min-microvolt = <1500000>;
373				regulator-max-microvolt = <1500000>;
374				regulator-name = "vcc_1v5";
375
376				regulator-state-mem {
377					regulator-on-in-suspend;
378					regulator-suspend-microvolt = <1500000>;
379				};
380			};
381
382			vcca1v8_codec: LDO_REG7 {
383				regulator-always-on;
384				regulator-boot-on;
385				regulator-min-microvolt = <1800000>;
386				regulator-max-microvolt = <1800000>;
387				regulator-name = "vcca1v8_codec";
388
389				regulator-state-mem {
390					regulator-off-in-suspend;
391				};
392			};
393
394			vcc_3v0: LDO_REG8 {
395				regulator-always-on;
396				regulator-boot-on;
397				regulator-min-microvolt = <3000000>;
398				regulator-max-microvolt = <3000000>;
399				regulator-name = "vcc_3v0";
400
401				regulator-state-mem {
402					regulator-on-in-suspend;
403					regulator-suspend-microvolt = <3000000>;
404				};
405			};
406
407			vcc3v3_s3: SWITCH_REG1 {
408				regulator-always-on;
409				regulator-boot-on;
410				regulator-name = "vcc3v3_s3";
411
412				regulator-state-mem {
413					regulator-off-in-suspend;
414				};
415			};
416
417			vcc3v3_s0: SWITCH_REG2 {
418				regulator-always-on;
419				regulator-boot-on;
420				regulator-name = "vcc3v3_s0";
421
422				regulator-state-mem {
423					regulator-off-in-suspend;
424				};
425			};
426		};
427	};
428};
429
430&i2c1 {
431	clock-frequency = <200000>;
432	i2c-scl-rising-time-ns = <150>;
433	i2c-scl-falling-time-ns = <30>;
434	status = "okay";
435};
436
437&i2c2 {
438	status = "okay";
439};
440
441&i2c4 {
442	clock-frequency = <400000>;
443	i2c-scl-rising-time-ns = <160>;
444	i2c-scl-falling-time-ns = <30>;
445	status = "okay";
446
447	fusb0: typec-portc@22 {
448		compatible = "fcs,fusb302";
449		reg = <0x22>;
450		interrupt-parent = <&gpio1>;
451		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
452		pinctrl-names = "default";
453		pinctrl-0 = <&fusb0_int>;
454		vbus-supply = <&vbus_typec>;
455	};
456};
457
458&i2c7 {
459	status = "okay";
460};
461
462&io_domains {
463	bt656-supply = <&vcc_1v8>;
464	audio-supply = <&vcca1v8_codec>;
465	sdmmc-supply = <&vcc_sdio>;
466	gpio1830-supply = <&vcc_3v0>;
467	status = "okay";
468};
469
470&pcie_phy {
471	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
472	assigned-clock-rates = <100000000>;
473	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
474	status = "okay";
475};
476
477&pcie0 {
478	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
479	max-link-speed = <2>;
480	num-lanes = <4>;
481	status = "okay";
482};
483
484&pinctrl {
485	fusb30x {
486		fusb0_int: fusb0-int {
487			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
488		};
489	};
490
491	gpio-leds {
492		leds_gpio: leds-gpio {
493			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
494		};
495	};
496
497	phy {
498		phy_intb: phy-intb {
499			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
500		};
501
502		phy_rstb: phy-rstb {
503			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
504		};
505	};
506
507	pmic {
508		cpu_b_sleep: cpu-b-sleep {
509			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
510		};
511
512		gpu_sleep: gpu-sleep {
513			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
514		};
515
516		pmic_int_l: pmic-int-l {
517			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
518		};
519	};
520
521	rockchip-key {
522		power_key: power-key {
523			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
524		};
525	};
526
527	sdio {
528		bt_host_wake_l: bt-host-wake-l {
529			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
530		};
531
532		bt_reg_on_h: bt-reg-on-h {
533			/* external pullup to VCC1V8_PMUPLL */
534			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
535		};
536
537		bt_wake_l: bt-wake-l {
538			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
539		};
540
541		wifi_reg_on_h: wifi-reg_on-h {
542			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
543		};
544	};
545
546	sdmmc {
547		sdmmc0_det_l: sdmmc0-det-l {
548			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
549		};
550
551		sdmmc0_pwr_h: sdmmc0-pwr-h {
552			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
553		};
554	};
555};
556
557&pmu_io_domains {
558	pmu1830-supply = <&vcc_3v0>;
559	status = "okay";
560};
561
562&pwm0 {
563	status = "okay";
564};
565
566&pwm1 {
567	status = "okay";
568};
569
570&pwm2 {
571	pinctrl-names = "active";
572	pinctrl-0 = <&pwm2_pin_pull_down>;
573	status = "okay";
574};
575
576&saradc {
577	vref-supply = <&vcca1v8_s3>;
578	status = "okay";
579};
580
581&sdhci {
582	bus-width = <8>;
583	mmc-hs200-1_8v;
584	non-removable;
585	status = "okay";
586};
587
588&sdio0 {
589	bus-width = <4>;
590	cap-sd-highspeed;
591	cap-sdio-irq;
592	keep-power-in-suspend;
593	mmc-pwrseq = <&sdio_pwrseq>;
594	non-removable;
595	pinctrl-names = "default";
596	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
597	sd-uhs-sdr104;
598	status = "okay";
599};
600
601&sdmmc {
602	bus-width = <4>;
603	cap-sd-highspeed;
604	cap-mmc-highspeed;
605	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
606	disable-wp;
607	pinctrl-names = "default";
608	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
609	sd-uhs-sdr104;
610	vmmc-supply = <&vcc3v0_sd>;
611	vqmmc-supply = <&vcc_sdio>;
612	status = "okay";
613};
614
615&tcphy0 {
616	status = "okay";
617};
618
619&tcphy1 {
620	status = "okay";
621};
622
623&tsadc {
624	/* tshut mode 0:CRU 1:GPIO */
625	rockchip,hw-tshut-mode = <1>;
626	/* tshut polarity 0:LOW 1:HIGH */
627	rockchip,hw-tshut-polarity = <1>;
628	status = "okay";
629};
630
631&u2phy0 {
632	status = "okay";
633};
634
635&u2phy0_host {
636	status = "okay";
637};
638
639&u2phy0_otg {
640	status = "okay";
641};
642
643&u2phy1 {
644	status = "okay";
645};
646
647&u2phy1_host {
648	status = "okay";
649};
650
651&u2phy1_otg {
652	status = "okay";
653};
654
655&uart0 {
656	pinctrl-names = "default";
657	pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
658	status = "okay";
659
660	bluetooth {
661		compatible = "brcm,bcm43438-bt";
662		clocks = <&rk808 1>;
663		clock-names = "lpo";
664		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
665		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
666		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
667		max-speed = <4000000>;
668		pinctrl-names = "default";
669		pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
670		vbat-supply = <&vcc3v3_sys>;
671		vddio-supply = <&vcc_1v8>;
672	};
673};
674
675&uart2 {
676	status = "okay";
677};
678
679&usbdrd3_0 {
680	status = "okay";
681};
682
683&usbdrd3_1 {
684	status = "okay";
685};
686
687&usbdrd_dwc3_0 {
688	status = "okay";
689};
690
691&usbdrd_dwc3_1 {
692	dr_mode = "host";
693	status = "okay";
694};
695
696&usb_host0_ehci {
697	status = "okay";
698};
699
700&usb_host0_ohci {
701	status = "okay";
702};
703
704&usb_host1_ehci {
705	status = "okay";
706};
707
708&usb_host1_ohci {
709	status = "okay";
710};
711
712&vopb {
713	status = "okay";
714};
715
716&vopb_mmu {
717	status = "okay";
718};
719
720&vopl {
721	status = "okay";
722};
723
724&vopl_mmu {
725	status = "okay";
726};
727