xref: /linux/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi (revision 82851fce6107d5a3e66d95aee2ae68860a732703)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * RK3399-based FriendlyElec boards device tree source
4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
9 *
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
12 */
13
14/dts-v1/;
15#include <dt-bindings/input/linux-event-codes.h>
16#include "rk3399.dtsi"
17#include "rk3399-opp.dtsi"
18
19/ {
20	chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	clkin_gmac: external-gmac-clock {
25		compatible = "fixed-clock";
26		clock-frequency = <125000000>;
27		clock-output-names = "clkin_gmac";
28		#clock-cells = <0>;
29	};
30
31	vcc3v3_sys: vcc3v3-sys {
32		compatible = "regulator-fixed";
33		regulator-always-on;
34		regulator-boot-on;
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-name = "vcc3v3_sys";
38	};
39
40	vcc5v0_sys: vcc5v0-sys {
41		compatible = "regulator-fixed";
42		regulator-always-on;
43		regulator-boot-on;
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		regulator-name = "vcc5v0_sys";
47		vin-supply = <&vdd_5v>;
48	};
49
50	/* switched by pmic_sleep */
51	vcc1v8_s3: vcc1v8-s3 {
52		compatible = "regulator-fixed";
53		regulator-always-on;
54		regulator-boot-on;
55		regulator-min-microvolt = <1800000>;
56		regulator-max-microvolt = <1800000>;
57		regulator-name = "vcc1v8_s3";
58		vin-supply = <&vcc_1v8>;
59	};
60
61	vcc3v0_sd: vcc3v0-sd {
62		compatible = "regulator-fixed";
63		enable-active-high;
64		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
65		pinctrl-names = "default";
66		pinctrl-0 = <&sdmmc0_pwr_h>;
67		regulator-always-on;
68		regulator-min-microvolt = <3000000>;
69		regulator-max-microvolt = <3000000>;
70		regulator-name = "vcc3v0_sd";
71		vin-supply = <&vcc3v3_sys>;
72	};
73
74	/*
75	 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
76	 * drives the enable pin, but we can't quite model that.
77	 */
78	vcca0v9_s3: vcca0v9-s3 {
79		compatible = "regulator-fixed";
80		regulator-min-microvolt = <900000>;
81		regulator-max-microvolt = <900000>;
82		regulator-name = "vcca0v9_s3";
83		vin-supply = <&vcc1v8_s3>;
84	};
85
86	/* As above, actually supplied by vcc3v3_sys */
87	vcca1v8_s3: vcca1v8-s3 {
88		compatible = "regulator-fixed";
89		regulator-min-microvolt = <1800000>;
90		regulator-max-microvolt = <1800000>;
91		regulator-name = "vcca1v8_s3";
92		vin-supply = <&vcc1v8_s3>;
93	};
94
95	vbus_typec: vbus-typec {
96		compatible = "regulator-fixed";
97		regulator-min-microvolt = <5000000>;
98		regulator-max-microvolt = <5000000>;
99		regulator-name = "vbus_typec";
100	};
101
102	gpio-keys {
103		compatible = "gpio-keys";
104		autorepeat;
105		pinctrl-names = "default";
106		pinctrl-0 = <&power_key>;
107
108		power {
109			debounce-interval = <100>;
110			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
111			label = "GPIO Key Power";
112			linux,code = <KEY_POWER>;
113			wakeup-source;
114		};
115	};
116
117	leds: gpio-leds {
118		compatible = "gpio-leds";
119		pinctrl-names = "default";
120		pinctrl-0 = <&status_led_pin>;
121
122		status_led: led-0 {
123			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
124			label = "status_led";
125			linux,default-trigger = "heartbeat";
126		};
127	};
128
129	sdio_pwrseq: sdio-pwrseq {
130		compatible = "mmc-pwrseq-simple";
131		clocks = <&rk808 1>;
132		clock-names = "ext_clock";
133		pinctrl-names = "default";
134		pinctrl-0 = <&wifi_reg_on_h>;
135		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
136	};
137};
138
139&cpu_b0 {
140	cpu-supply = <&vdd_cpu_b>;
141};
142
143&cpu_b1 {
144	cpu-supply = <&vdd_cpu_b>;
145};
146
147&cpu_l0 {
148	cpu-supply = <&vdd_cpu_l>;
149};
150
151&cpu_l1 {
152	cpu-supply = <&vdd_cpu_l>;
153};
154
155&cpu_l2 {
156	cpu-supply = <&vdd_cpu_l>;
157};
158
159&cpu_l3 {
160	cpu-supply = <&vdd_cpu_l>;
161};
162
163&emmc_phy {
164	status = "okay";
165};
166
167&gmac {
168	assigned-clock-parents = <&clkin_gmac>;
169	assigned-clocks = <&cru SCLK_RMII_SRC>;
170	clock_in_out = "input";
171	pinctrl-names = "default";
172	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
173	phy-handle = <&rtl8211e>;
174	phy-mode = "rgmii";
175	phy-supply = <&vcc3v3_s3>;
176	tx_delay = <0x28>;
177	rx_delay = <0x11>;
178	status = "okay";
179
180	mdio {
181		compatible = "snps,dwmac-mdio";
182		#address-cells = <1>;
183		#size-cells = <0>;
184
185		rtl8211e: ethernet-phy@1 {
186			reg = <1>;
187			interrupt-parent = <&gpio3>;
188			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
189			reset-assert-us = <10000>;
190			reset-deassert-us = <30000>;
191			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
192		};
193	};
194};
195
196&gpu {
197	mali-supply = <&vdd_gpu>;
198	status = "okay";
199};
200
201&hdmi {
202	ddc-i2c-bus = <&i2c7>;
203	pinctrl-names = "default";
204	pinctrl-0 = <&hdmi_cec>;
205	status = "okay";
206};
207
208&hdmi_sound {
209	status = "okay";
210};
211
212&i2c0 {
213	clock-frequency = <400000>;
214	i2c-scl-rising-time-ns = <160>;
215	i2c-scl-falling-time-ns = <30>;
216	status = "okay";
217
218	vdd_cpu_b: regulator@40 {
219		compatible = "silergy,syr827";
220		reg = <0x40>;
221		fcs,suspend-voltage-selector = <1>;
222		pinctrl-names = "default";
223		pinctrl-0 = <&cpu_b_sleep>;
224		regulator-always-on;
225		regulator-boot-on;
226		regulator-min-microvolt = <712500>;
227		regulator-max-microvolt = <1500000>;
228		regulator-name = "vdd_cpu_b";
229		regulator-ramp-delay = <1000>;
230		vin-supply = <&vcc3v3_sys>;
231
232		regulator-state-mem {
233			regulator-off-in-suspend;
234		};
235	};
236
237	vdd_gpu: regulator@41 {
238		compatible = "silergy,syr828";
239		reg = <0x41>;
240		fcs,suspend-voltage-selector = <1>;
241		pinctrl-names = "default";
242		pinctrl-0 = <&gpu_sleep>;
243		regulator-always-on;
244		regulator-boot-on;
245		regulator-min-microvolt = <712500>;
246		regulator-max-microvolt = <1500000>;
247		regulator-name = "vdd_gpu";
248		regulator-ramp-delay = <1000>;
249		vin-supply = <&vcc3v3_sys>;
250
251		regulator-state-mem {
252			regulator-off-in-suspend;
253		};
254	};
255
256	rk808: pmic@1b {
257		compatible = "rockchip,rk808";
258		reg = <0x1b>;
259		clock-output-names = "xin32k", "rtc_clko_wifi";
260		#clock-cells = <1>;
261		interrupt-parent = <&gpio1>;
262		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
263		pinctrl-names = "default";
264		pinctrl-0 = <&pmic_int_l>;
265		rockchip,system-power-controller;
266		wakeup-source;
267
268		vcc1-supply = <&vcc3v3_sys>;
269		vcc2-supply = <&vcc3v3_sys>;
270		vcc3-supply = <&vcc3v3_sys>;
271		vcc4-supply = <&vcc3v3_sys>;
272		vcc6-supply = <&vcc3v3_sys>;
273		vcc7-supply = <&vcc3v3_sys>;
274		vcc8-supply = <&vcc3v3_sys>;
275		vcc9-supply = <&vcc3v3_sys>;
276		vcc10-supply = <&vcc3v3_sys>;
277		vcc11-supply = <&vcc3v3_sys>;
278		vcc12-supply = <&vcc3v3_sys>;
279		vddio-supply = <&vcc_3v0>;
280
281		regulators {
282			vdd_center: DCDC_REG1 {
283				regulator-always-on;
284				regulator-boot-on;
285				regulator-min-microvolt = <750000>;
286				regulator-max-microvolt = <1350000>;
287				regulator-name = "vdd_center";
288				regulator-ramp-delay = <6001>;
289
290				regulator-state-mem {
291					regulator-off-in-suspend;
292				};
293			};
294
295			vdd_cpu_l: DCDC_REG2 {
296				regulator-always-on;
297				regulator-boot-on;
298				regulator-min-microvolt = <750000>;
299				regulator-max-microvolt = <1350000>;
300				regulator-name = "vdd_cpu_l";
301				regulator-ramp-delay = <6001>;
302
303				regulator-state-mem {
304					regulator-off-in-suspend;
305				};
306			};
307
308			vcc_ddr: DCDC_REG3 {
309				regulator-always-on;
310				regulator-boot-on;
311				regulator-name = "vcc_ddr";
312
313				regulator-state-mem {
314					regulator-on-in-suspend;
315				};
316			};
317
318			vcc_1v8: DCDC_REG4 {
319				regulator-always-on;
320				regulator-boot-on;
321				regulator-min-microvolt = <1800000>;
322				regulator-max-microvolt = <1800000>;
323				regulator-name = "vcc_1v8";
324
325				regulator-state-mem {
326					regulator-on-in-suspend;
327					regulator-suspend-microvolt = <1800000>;
328				};
329			};
330
331			vcc1v8_cam: LDO_REG1 {
332				regulator-always-on;
333				regulator-boot-on;
334				regulator-min-microvolt = <1800000>;
335				regulator-max-microvolt = <1800000>;
336				regulator-name = "vcc1v8_cam";
337
338				regulator-state-mem {
339					regulator-off-in-suspend;
340				};
341			};
342
343			vcc3v0_touch: LDO_REG2 {
344				regulator-always-on;
345				regulator-boot-on;
346				regulator-min-microvolt = <3000000>;
347				regulator-max-microvolt = <3000000>;
348				regulator-name = "vcc3v0_touch";
349
350				regulator-state-mem {
351					regulator-off-in-suspend;
352				};
353			};
354
355			vcc1v8_pmupll: LDO_REG3 {
356				regulator-always-on;
357				regulator-boot-on;
358				regulator-min-microvolt = <1800000>;
359				regulator-max-microvolt = <1800000>;
360				regulator-name = "vcc1v8_pmupll";
361
362				regulator-state-mem {
363					regulator-on-in-suspend;
364					regulator-suspend-microvolt = <1800000>;
365				};
366			};
367
368			vcc_sdio: LDO_REG4 {
369				regulator-always-on;
370				regulator-boot-on;
371				regulator-init-microvolt = <3000000>;
372				regulator-min-microvolt = <1800000>;
373				regulator-max-microvolt = <3300000>;
374				regulator-name = "vcc_sdio";
375
376				regulator-state-mem {
377					regulator-on-in-suspend;
378					regulator-suspend-microvolt = <3000000>;
379				};
380			};
381
382			vcca3v0_codec: LDO_REG5 {
383				regulator-always-on;
384				regulator-boot-on;
385				regulator-min-microvolt = <3000000>;
386				regulator-max-microvolt = <3000000>;
387				regulator-name = "vcca3v0_codec";
388
389				regulator-state-mem {
390					regulator-off-in-suspend;
391				};
392			};
393
394			vcc_1v5: LDO_REG6 {
395				regulator-always-on;
396				regulator-boot-on;
397				regulator-min-microvolt = <1500000>;
398				regulator-max-microvolt = <1500000>;
399				regulator-name = "vcc_1v5";
400
401				regulator-state-mem {
402					regulator-on-in-suspend;
403					regulator-suspend-microvolt = <1500000>;
404				};
405			};
406
407			vcca1v8_codec: LDO_REG7 {
408				regulator-always-on;
409				regulator-boot-on;
410				regulator-min-microvolt = <1800000>;
411				regulator-max-microvolt = <1800000>;
412				regulator-name = "vcca1v8_codec";
413
414				regulator-state-mem {
415					regulator-off-in-suspend;
416				};
417			};
418
419			vcc_3v0: LDO_REG8 {
420				regulator-always-on;
421				regulator-boot-on;
422				regulator-min-microvolt = <3000000>;
423				regulator-max-microvolt = <3000000>;
424				regulator-name = "vcc_3v0";
425
426				regulator-state-mem {
427					regulator-on-in-suspend;
428					regulator-suspend-microvolt = <3000000>;
429				};
430			};
431
432			vcc3v3_s3: SWITCH_REG1 {
433				regulator-always-on;
434				regulator-boot-on;
435				regulator-name = "vcc3v3_s3";
436
437				regulator-state-mem {
438					regulator-off-in-suspend;
439				};
440			};
441
442			vcc3v3_s0: SWITCH_REG2 {
443				regulator-always-on;
444				regulator-boot-on;
445				regulator-name = "vcc3v3_s0";
446
447				regulator-state-mem {
448					regulator-off-in-suspend;
449				};
450			};
451		};
452	};
453};
454
455&i2c1 {
456	clock-frequency = <200000>;
457	i2c-scl-rising-time-ns = <150>;
458	i2c-scl-falling-time-ns = <30>;
459	status = "okay";
460};
461
462&i2c2 {
463	status = "okay";
464};
465
466&i2c4 {
467	clock-frequency = <400000>;
468	i2c-scl-rising-time-ns = <160>;
469	i2c-scl-falling-time-ns = <30>;
470	status = "okay";
471
472	fusb0: typec-portc@22 {
473		compatible = "fcs,fusb302";
474		reg = <0x22>;
475		interrupt-parent = <&gpio1>;
476		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
477		pinctrl-names = "default";
478		pinctrl-0 = <&fusb0_int>;
479		vbus-supply = <&vbus_typec>;
480	};
481};
482
483&i2c7 {
484	status = "okay";
485};
486
487&i2s2 {
488	status = "okay";
489};
490
491&io_domains {
492	bt656-supply = <&vcc_1v8>;
493	audio-supply = <&vcca1v8_codec>;
494	sdmmc-supply = <&vcc_sdio>;
495	gpio1830-supply = <&vcc_3v0>;
496	status = "okay";
497};
498
499&pcie_phy {
500	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
501	assigned-clock-rates = <100000000>;
502	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
503	status = "okay";
504};
505
506&pcie0 {
507	max-link-speed = <2>;
508	num-lanes = <2>;
509	vpcie0v9-supply = <&vcca0v9_s3>;
510	vpcie1v8-supply = <&vcca1v8_s3>;
511	status = "okay";
512};
513
514&pinctrl {
515	fusb30x {
516		fusb0_int: fusb0-int {
517			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
518		};
519	};
520
521	gpio-leds {
522		status_led_pin: status-led-pin {
523			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
524		};
525	};
526
527	gmac {
528		phy_intb: phy-intb {
529			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
530		};
531
532		phy_rstb: phy-rstb {
533			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
534		};
535	};
536
537	pmic {
538		cpu_b_sleep: cpu-b-sleep {
539			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
540		};
541
542		gpu_sleep: gpu-sleep {
543			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
544		};
545
546		pmic_int_l: pmic-int-l {
547			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
548		};
549	};
550
551	rockchip-key {
552		power_key: power-key {
553			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
554		};
555	};
556
557	sdio {
558		bt_host_wake_l: bt-host-wake-l {
559			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
560		};
561
562		bt_reg_on_h: bt-reg-on-h {
563			/* external pullup to VCC1V8_PMUPLL */
564			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
565		};
566
567		bt_wake_l: bt-wake-l {
568			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
569		};
570
571		wifi_reg_on_h: wifi-reg_on-h {
572			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
573		};
574	};
575
576	sdmmc {
577		sdmmc0_det_l: sdmmc0-det-l {
578			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
579		};
580
581		sdmmc0_pwr_h: sdmmc0-pwr-h {
582			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
583		};
584	};
585};
586
587&pmu_io_domains {
588	pmu1830-supply = <&vcc_3v0>;
589	status = "okay";
590};
591
592&pwm0 {
593	status = "okay";
594};
595
596&pwm1 {
597	status = "okay";
598};
599
600&pwm2 {
601	pinctrl-names = "active";
602	pinctrl-0 = <&pwm2_pin_pull_down>;
603	status = "okay";
604};
605
606&saradc {
607	vref-supply = <&vcca1v8_s3>;
608	status = "okay";
609};
610
611&sdhci {
612	bus-width = <8>;
613	mmc-hs200-1_8v;
614	non-removable;
615	status = "okay";
616};
617
618&sdio0 {
619	bus-width = <4>;
620	cap-sd-highspeed;
621	cap-sdio-irq;
622	keep-power-in-suspend;
623	mmc-pwrseq = <&sdio_pwrseq>;
624	non-removable;
625	pinctrl-names = "default";
626	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
627	sd-uhs-sdr104;
628	status = "okay";
629};
630
631&sdmmc {
632	bus-width = <4>;
633	cap-sd-highspeed;
634	cap-mmc-highspeed;
635	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
636	disable-wp;
637	pinctrl-names = "default";
638	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
639	sd-uhs-sdr104;
640	vmmc-supply = <&vcc3v0_sd>;
641	vqmmc-supply = <&vcc_sdio>;
642	status = "okay";
643};
644
645&tcphy0 {
646	status = "okay";
647};
648
649&tcphy1 {
650	status = "okay";
651};
652
653&tsadc {
654	/* tshut mode 0:CRU 1:GPIO */
655	rockchip,hw-tshut-mode = <1>;
656	/* tshut polarity 0:LOW 1:HIGH */
657	rockchip,hw-tshut-polarity = <1>;
658	status = "okay";
659};
660
661&u2phy0 {
662	status = "okay";
663};
664
665&u2phy0_host {
666	status = "okay";
667};
668
669&u2phy0_otg {
670	status = "okay";
671};
672
673&u2phy1 {
674	status = "okay";
675};
676
677&u2phy1_host {
678	status = "okay";
679};
680
681&u2phy1_otg {
682	status = "okay";
683};
684
685&uart0 {
686	pinctrl-names = "default";
687	pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
688	status = "okay";
689
690	bluetooth {
691		compatible = "brcm,bcm43438-bt";
692		clocks = <&rk808 1>;
693		clock-names = "lpo";
694		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
695		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
696		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
697		max-speed = <4000000>;
698		pinctrl-names = "default";
699		pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
700		vbat-supply = <&vcc3v3_sys>;
701		vddio-supply = <&vcc_1v8>;
702	};
703};
704
705&uart2 {
706	status = "okay";
707};
708
709&usbdrd3_0 {
710	status = "okay";
711};
712
713&usbdrd3_1 {
714	status = "okay";
715};
716
717&usbdrd_dwc3_0 {
718	status = "okay";
719};
720
721&usbdrd_dwc3_1 {
722	dr_mode = "host";
723	status = "okay";
724};
725
726&usb_host0_ehci {
727	status = "okay";
728};
729
730&usb_host0_ohci {
731	status = "okay";
732};
733
734&usb_host1_ehci {
735	status = "okay";
736};
737
738&usb_host1_ohci {
739	status = "okay";
740};
741
742&vopb {
743	status = "okay";
744};
745
746&vopb_mmu {
747	status = "okay";
748};
749
750&vopl {
751	status = "okay";
752};
753
754&vopl_mmu {
755	status = "okay";
756};
757