1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Collabora Ltd. 4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. 5 * 6 * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw 7 */ 8 9/dts-v1/; 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 model = "96boards RK3399 Ficus"; 15 compatible = "vamrs,ficus", "rockchip,rk3399"; 16 17 chosen { 18 stdout-path = "serial2:1500000n8"; 19 }; 20 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; 23 clock-frequency = <125000000>; 24 clock-output-names = "clkin_gmac"; 25 #clock-cells = <0>; 26 }; 27 28 vcc1v8_s0: vcc1v8-s0 { 29 compatible = "regulator-fixed"; 30 regulator-name = "vcc1v8_s0"; 31 regulator-min-microvolt = <1800000>; 32 regulator-max-microvolt = <1800000>; 33 regulator-always-on; 34 }; 35 36 vcc_sys: vcc-sys { 37 compatible = "regulator-fixed"; 38 regulator-name = "vcc_sys"; 39 regulator-min-microvolt = <5000000>; 40 regulator-max-microvolt = <5000000>; 41 regulator-always-on; 42 }; 43 44 vcc3v3_sys: vcc3v3-sys { 45 compatible = "regulator-fixed"; 46 regulator-name = "vcc3v3_sys"; 47 regulator-min-microvolt = <3300000>; 48 regulator-max-microvolt = <3300000>; 49 regulator-always-on; 50 vin-supply = <&vcc_sys>; 51 }; 52 53 vcc3v3_pcie: vcc3v3-pcie-regulator { 54 compatible = "regulator-fixed"; 55 enable-active-high; 56 gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&pcie_drv>; 59 regulator-boot-on; 60 regulator-name = "vcc3v3_pcie"; 61 vin-supply = <&vcc3v3_sys>; 62 }; 63 64 vdd_log: vdd-log { 65 compatible = "pwm-regulator"; 66 pwms = <&pwm2 0 25000 0>; 67 regulator-name = "vdd_log"; 68 regulator-min-microvolt = <800000>; 69 regulator-max-microvolt = <1400000>; 70 regulator-always-on; 71 regulator-boot-on; 72 73 /* for rockchip boot on */ 74 rockchip,pwm_id= <2>; 75 rockchip,pwm_voltage = <900000>; 76 77 vin-supply = <&vcc_sys>; 78 }; 79 80}; 81 82&cpu_l0 { 83 cpu-supply = <&vdd_cpu_l>; 84}; 85 86&cpu_l1 { 87 cpu-supply = <&vdd_cpu_l>; 88}; 89 90&cpu_l2 { 91 cpu-supply = <&vdd_cpu_l>; 92}; 93 94&cpu_l3 { 95 cpu-supply = <&vdd_cpu_l>; 96}; 97 98&cpu_b0 { 99 cpu-supply = <&vdd_cpu_b>; 100}; 101 102&cpu_b1 { 103 cpu-supply = <&vdd_cpu_b>; 104}; 105 106&emmc_phy { 107 status = "okay"; 108}; 109 110&gmac { 111 assigned-clocks = <&cru SCLK_RMII_SRC>; 112 assigned-clock-parents = <&clkin_gmac>; 113 clock_in_out = "input"; 114 phy-supply = <&vcc3v3_sys>; 115 phy-mode = "rgmii"; 116 pinctrl-names = "default"; 117 pinctrl-0 = <&rgmii_pins>; 118 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 119 snps,reset-active-low; 120 snps,reset-delays-us = <0 10000 50000>; 121 tx_delay = <0x28>; 122 rx_delay = <0x11>; 123 status = "okay"; 124}; 125 126&hdmi { 127 ddc-i2c-bus = <&i2c3>; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&hdmi_cec>; 130 status = "okay"; 131}; 132 133&i2c0 { 134 clock-frequency = <400000>; 135 i2c-scl-rising-time-ns = <168>; 136 i2c-scl-falling-time-ns = <4>; 137 status = "okay"; 138 139 vdd_cpu_b: regulator@40 { 140 compatible = "silergy,syr827"; 141 reg = <0x40>; 142 fcs,suspend-voltage-selector = <1>; 143 regulator-name = "vdd_cpu_b"; 144 regulator-min-microvolt = <712500>; 145 regulator-max-microvolt = <1500000>; 146 regulator-ramp-delay = <1000>; 147 regulator-always-on; 148 regulator-boot-on; 149 vin-supply = <&vcc_sys>; 150 status = "okay"; 151 152 regulator-state-mem { 153 regulator-off-in-suspend; 154 }; 155 }; 156 157 vdd_gpu: regulator@41 { 158 compatible = "silergy,syr828"; 159 reg = <0x41>; 160 fcs,suspend-voltage-selector = <1>; 161 regulator-name = "vdd_gpu"; 162 regulator-min-microvolt = <712500>; 163 regulator-max-microvolt = <1500000>; 164 regulator-ramp-delay = <1000>; 165 regulator-always-on; 166 regulator-boot-on; 167 vin-supply = <&vcc_sys>; 168 regulator-state-mem { 169 regulator-off-in-suspend; 170 }; 171 }; 172 173 rk808: pmic@1b { 174 compatible = "rockchip,rk808"; 175 reg = <0x1b>; 176 interrupt-parent = <&gpio1>; 177 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 178 pinctrl-names = "default"; 179 pinctrl-0 = <&pmic_int_l>; 180 rockchip,system-power-controller; 181 wakeup-source; 182 #clock-cells = <1>; 183 clock-output-names = "xin32k", "rk808-clkout2"; 184 185 vcc1-supply = <&vcc_sys>; 186 vcc2-supply = <&vcc_sys>; 187 vcc3-supply = <&vcc_sys>; 188 vcc4-supply = <&vcc_sys>; 189 vcc6-supply = <&vcc_sys>; 190 vcc7-supply = <&vcc_sys>; 191 vcc8-supply = <&vcc3v3_sys>; 192 vcc9-supply = <&vcc_sys>; 193 vcc10-supply = <&vcc_sys>; 194 vcc11-supply = <&vcc_sys>; 195 vcc12-supply = <&vcc3v3_sys>; 196 vddio-supply = <&vcc_1v8>; 197 198 regulators { 199 vdd_center: DCDC_REG1 { 200 regulator-name = "vdd_center"; 201 regulator-min-microvolt = <750000>; 202 regulator-max-microvolt = <1350000>; 203 regulator-always-on; 204 regulator-boot-on; 205 regulator-state-mem { 206 regulator-off-in-suspend; 207 }; 208 }; 209 210 vdd_cpu_l: DCDC_REG2 { 211 regulator-name = "vdd_cpu_l"; 212 regulator-min-microvolt = <750000>; 213 regulator-max-microvolt = <1350000>; 214 regulator-always-on; 215 regulator-boot-on; 216 regulator-state-mem { 217 regulator-off-in-suspend; 218 }; 219 }; 220 221 vcc_ddr: DCDC_REG3 { 222 regulator-name = "vcc_ddr"; 223 regulator-always-on; 224 regulator-boot-on; 225 regulator-state-mem { 226 regulator-on-in-suspend; 227 }; 228 }; 229 230 vcc_1v8: DCDC_REG4 { 231 regulator-name = "vcc_1v8"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <1800000>; 239 }; 240 }; 241 242 vcc1v8_dvp: LDO_REG1 { 243 regulator-name = "vcc1v8_dvp"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <1800000>; 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-state-mem { 249 regulator-on-in-suspend; 250 regulator-suspend-microvolt = <1800000>; 251 }; 252 }; 253 254 vcca1v8_hdmi: LDO_REG2 { 255 regulator-name = "vcca1v8_hdmi"; 256 regulator-min-microvolt = <1800000>; 257 regulator-max-microvolt = <1800000>; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-state-mem { 261 regulator-on-in-suspend; 262 regulator-suspend-microvolt = <1800000>; 263 }; 264 }; 265 266 vcca_1v8: LDO_REG3 { 267 regulator-name = "vcca_1v8"; 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-always-on; 271 regulator-boot-on; 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <1800000>; 275 }; 276 }; 277 278 vcc_sd: LDO_REG4 { 279 regulator-name = "vcc_sd"; 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <3300000>; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-state-mem { 285 regulator-on-in-suspend; 286 regulator-suspend-microvolt = <3300000>; 287 }; 288 }; 289 290 vcc3v0_sd: LDO_REG5 { 291 regulator-name = "vcc3v0_sd"; 292 regulator-min-microvolt = <3000000>; 293 regulator-max-microvolt = <3000000>; 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-state-mem { 297 regulator-on-in-suspend; 298 regulator-suspend-microvolt = <3000000>; 299 }; 300 }; 301 302 vcc_1v5: LDO_REG6 { 303 regulator-name = "vcc_1v5"; 304 regulator-min-microvolt = <1500000>; 305 regulator-max-microvolt = <1500000>; 306 regulator-always-on; 307 regulator-boot-on; 308 regulator-state-mem { 309 regulator-on-in-suspend; 310 regulator-suspend-microvolt = <1500000>; 311 }; 312 }; 313 314 vcca0v9_hdmi: LDO_REG7 { 315 regulator-name = "vcca0v9_hdmi"; 316 regulator-min-microvolt = <900000>; 317 regulator-max-microvolt = <900000>; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-state-mem { 321 regulator-on-in-suspend; 322 regulator-suspend-microvolt = <900000>; 323 }; 324 }; 325 326 vcc_3v0: LDO_REG8 { 327 regulator-name = "vcc_3v0"; 328 regulator-min-microvolt = <3000000>; 329 regulator-max-microvolt = <3000000>; 330 regulator-always-on; 331 regulator-boot-on; 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <3000000>; 335 }; 336 }; 337 338 vcc3v3_s3: SWITCH_REG1 { 339 regulator-name = "vcc3v3_s3"; 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-state-mem { 343 regulator-on-in-suspend; 344 }; 345 }; 346 347 vcc3v3_s0: SWITCH_REG2 { 348 regulator-name = "vcc3v3_s0"; 349 regulator-always-on; 350 regulator-boot-on; 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 }; 354 }; 355 }; 356 }; 357}; 358 359&i2c1 { 360 status = "okay"; 361}; 362 363&i2c2 { 364 status = "okay"; 365}; 366 367&i2c3 { 368 status = "okay"; 369}; 370 371&i2c4 { 372 status = "okay"; 373}; 374 375&io_domains { 376 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 377 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 378 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 379 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 380 status = "okay"; 381}; 382 383&pcie_phy { 384 status = "okay"; 385}; 386 387&pcie0 { 388 ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; 389 num-lanes = <4>; 390 pinctrl-names = "default"; 391 pinctrl-0 = <&pcie_clkreqn_cpm>; 392 vpcie3v3-supply = <&vcc3v3_pcie>; 393 status = "okay"; 394}; 395 396&pmu_io_domains { 397 pmu1830-supply = <&vcc_1v8>; 398 status = "okay"; 399}; 400 401&pinctrl { 402 gmac { 403 rgmii_sleep_pins: rgmii-sleep-pins { 404 rockchip,pins = 405 <3 15 RK_FUNC_GPIO &pcfg_output_low>; 406 }; 407 }; 408 409 sdmmc { 410 sdmmc_bus1: sdmmc-bus1 { 411 rockchip,pins = 412 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; 413 }; 414 415 sdmmc_bus4: sdmmc-bus4 { 416 rockchip,pins = 417 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, 418 <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, 419 <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, 420 <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; 421 }; 422 423 sdmmc_clk: sdmmc-clk { 424 rockchip,pins = 425 <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; 426 }; 427 428 sdmmc_cmd: sdmmc-cmd { 429 rockchip,pins = 430 <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; 431 }; 432 }; 433 434 pcie { 435 pcie_drv: pcie-drv { 436 rockchip,pins = 437 <1 24 RK_FUNC_GPIO &pcfg_pull_none>; 438 }; 439 }; 440 441 pmic { 442 pmic_int_l: pmic-int-l { 443 rockchip,pins = 444 <1 21 RK_FUNC_GPIO &pcfg_pull_up>; 445 }; 446 447 vsel1_gpio: vsel1-gpio { 448 rockchip,pins = 449 <1 17 RK_FUNC_GPIO &pcfg_pull_down>; 450 }; 451 452 vsel2_gpio: vsel2-gpio { 453 rockchip,pins = 454 <1 14 RK_FUNC_GPIO &pcfg_pull_down>; 455 }; 456 }; 457}; 458 459&pwm2 { 460 status = "okay"; 461}; 462 463&pwm3 { 464 status = "okay"; 465}; 466 467&sdhci { 468 bus-width = <8>; 469 mmc-hs400-1_8v; 470 mmc-hs400-enhanced-strobe; 471 non-removable; 472 status = "okay"; 473}; 474 475&sdmmc { 476 bus-width = <4>; 477 cap-mmc-highspeed; 478 cap-sd-highspeed; 479 clock-frequency = <100000000>; 480 clock-freq-min-max = <100000 100000000>; 481 disable-wp; 482 sd-uhs-sdr104; 483 vqmmc-supply = <&vcc_sd>; 484 card-detect-delay = <800>; 485 pinctrl-names = "default"; 486 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 487 status = "okay"; 488}; 489 490&uart0 { 491 pinctrl-names = "default"; 492 pinctrl-0 = <&uart0_xfer &uart0_cts>; 493 status = "okay"; 494}; 495 496&uart2 { 497 status = "okay"; 498}; 499 500&vopb { 501 status = "okay"; 502}; 503 504&vopb_mmu { 505 status = "okay"; 506}; 507 508&vopl { 509 status = "okay"; 510}; 511 512&vopl_mmu { 513 status = "okay"; 514}; 515