1874846f1SEzequiel Garcia// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2874846f1SEzequiel Garcia/* 3874846f1SEzequiel Garcia * Copyright (c) 2018 Collabora Ltd. 4874846f1SEzequiel Garcia * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. 5874846f1SEzequiel Garcia * 6874846f1SEzequiel Garcia * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw 7874846f1SEzequiel Garcia */ 8874846f1SEzequiel Garcia 9874846f1SEzequiel Garcia/dts-v1/; 10ffb7b25eSManivannan Sadhasivam#include "rk3399-rock960.dtsi" 11874846f1SEzequiel Garcia 12874846f1SEzequiel Garcia/ { 13874846f1SEzequiel Garcia model = "96boards RK3399 Ficus"; 14874846f1SEzequiel Garcia compatible = "vamrs,ficus", "rockchip,rk3399"; 15874846f1SEzequiel Garcia 16874846f1SEzequiel Garcia chosen { 17874846f1SEzequiel Garcia stdout-path = "serial2:1500000n8"; 18874846f1SEzequiel Garcia }; 19874846f1SEzequiel Garcia 20874846f1SEzequiel Garcia clkin_gmac: external-gmac-clock { 21874846f1SEzequiel Garcia compatible = "fixed-clock"; 22874846f1SEzequiel Garcia clock-frequency = <125000000>; 23874846f1SEzequiel Garcia clock-output-names = "clkin_gmac"; 24874846f1SEzequiel Garcia #clock-cells = <0>; 25874846f1SEzequiel Garcia }; 26*ba0abee7SManivannan Sadhasivam 27*ba0abee7SManivannan Sadhasivam leds { 28*ba0abee7SManivannan Sadhasivam compatible = "gpio-leds"; 29*ba0abee7SManivannan Sadhasivam pinctrl-names = "default"; 30*ba0abee7SManivannan Sadhasivam pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, 31*ba0abee7SManivannan Sadhasivam <&user_led4>, <&wlan_led>, <&bt_led>; 32*ba0abee7SManivannan Sadhasivam 33*ba0abee7SManivannan Sadhasivam user_led1 { 34*ba0abee7SManivannan Sadhasivam label = "red:user1"; 35*ba0abee7SManivannan Sadhasivam gpios = <&gpio4 25 0>; 36*ba0abee7SManivannan Sadhasivam linux,default-trigger = "heartbeat"; 37*ba0abee7SManivannan Sadhasivam }; 38*ba0abee7SManivannan Sadhasivam 39*ba0abee7SManivannan Sadhasivam user_led2 { 40*ba0abee7SManivannan Sadhasivam label = "red:user2"; 41*ba0abee7SManivannan Sadhasivam gpios = <&gpio4 26 0>; 42*ba0abee7SManivannan Sadhasivam linux,default-trigger = "mmc0"; 43*ba0abee7SManivannan Sadhasivam }; 44*ba0abee7SManivannan Sadhasivam 45*ba0abee7SManivannan Sadhasivam user_led3 { 46*ba0abee7SManivannan Sadhasivam label = "red:user3"; 47*ba0abee7SManivannan Sadhasivam gpios = <&gpio4 30 0>; 48*ba0abee7SManivannan Sadhasivam linux,default-trigger = "mmc1"; 49*ba0abee7SManivannan Sadhasivam }; 50*ba0abee7SManivannan Sadhasivam 51*ba0abee7SManivannan Sadhasivam user_led4 { 52*ba0abee7SManivannan Sadhasivam label = "red:user4"; 53*ba0abee7SManivannan Sadhasivam gpios = <&gpio1 0 0>; 54*ba0abee7SManivannan Sadhasivam panic-indicator; 55*ba0abee7SManivannan Sadhasivam linux,default-trigger = "none"; 56*ba0abee7SManivannan Sadhasivam }; 57*ba0abee7SManivannan Sadhasivam 58*ba0abee7SManivannan Sadhasivam wlan_active_led { 59*ba0abee7SManivannan Sadhasivam label = "red:wlan"; 60*ba0abee7SManivannan Sadhasivam gpios = <&gpio1 1 0>; 61*ba0abee7SManivannan Sadhasivam linux,default-trigger = "phy0tx"; 62*ba0abee7SManivannan Sadhasivam default-state = "off"; 63*ba0abee7SManivannan Sadhasivam }; 64*ba0abee7SManivannan Sadhasivam 65*ba0abee7SManivannan Sadhasivam bt_active_led { 66*ba0abee7SManivannan Sadhasivam label = "red:bt"; 67*ba0abee7SManivannan Sadhasivam gpios = <&gpio1 4 0>; 68*ba0abee7SManivannan Sadhasivam linux,default-trigger = "hci0-power"; 69*ba0abee7SManivannan Sadhasivam default-state = "off"; 70*ba0abee7SManivannan Sadhasivam }; 71*ba0abee7SManivannan Sadhasivam }; 72874846f1SEzequiel Garcia}; 73874846f1SEzequiel Garcia 74874846f1SEzequiel Garcia&gmac { 75874846f1SEzequiel Garcia assigned-clocks = <&cru SCLK_RMII_SRC>; 76874846f1SEzequiel Garcia assigned-clock-parents = <&clkin_gmac>; 77874846f1SEzequiel Garcia clock_in_out = "input"; 78874846f1SEzequiel Garcia phy-supply = <&vcc3v3_sys>; 79874846f1SEzequiel Garcia phy-mode = "rgmii"; 80874846f1SEzequiel Garcia pinctrl-names = "default"; 81874846f1SEzequiel Garcia pinctrl-0 = <&rgmii_pins>; 82874846f1SEzequiel Garcia snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 83874846f1SEzequiel Garcia snps,reset-active-low; 84874846f1SEzequiel Garcia snps,reset-delays-us = <0 10000 50000>; 85874846f1SEzequiel Garcia tx_delay = <0x28>; 86874846f1SEzequiel Garcia rx_delay = <0x11>; 87874846f1SEzequiel Garcia status = "okay"; 88874846f1SEzequiel Garcia}; 89874846f1SEzequiel Garcia 90874846f1SEzequiel Garcia&pcie0 { 91874846f1SEzequiel Garcia ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; 92874846f1SEzequiel Garcia}; 93874846f1SEzequiel Garcia 94874846f1SEzequiel Garcia&pinctrl { 95874846f1SEzequiel Garcia gmac { 96874846f1SEzequiel Garcia rgmii_sleep_pins: rgmii-sleep-pins { 97874846f1SEzequiel Garcia rockchip,pins = 98874846f1SEzequiel Garcia <3 15 RK_FUNC_GPIO &pcfg_output_low>; 99874846f1SEzequiel Garcia }; 100874846f1SEzequiel Garcia }; 101874846f1SEzequiel Garcia 102874846f1SEzequiel Garcia pcie { 103874846f1SEzequiel Garcia pcie_drv: pcie-drv { 104874846f1SEzequiel Garcia rockchip,pins = 105874846f1SEzequiel Garcia <1 24 RK_FUNC_GPIO &pcfg_pull_none>; 106874846f1SEzequiel Garcia }; 107874846f1SEzequiel Garcia }; 108874846f1SEzequiel Garcia 10965abc845SEnric Balletbo i Serra usb2 { 11065abc845SEnric Balletbo i Serra host_vbus_drv: host-vbus-drv { 11165abc845SEnric Balletbo i Serra rockchip,pins = 11265abc845SEnric Balletbo i Serra <4 27 RK_FUNC_GPIO &pcfg_pull_none>; 11365abc845SEnric Balletbo i Serra }; 11465abc845SEnric Balletbo i Serra }; 115*ba0abee7SManivannan Sadhasivam 116*ba0abee7SManivannan Sadhasivam leds { 117*ba0abee7SManivannan Sadhasivam user_led1: user_led1 { 118*ba0abee7SManivannan Sadhasivam rockchip,pins = 119*ba0abee7SManivannan Sadhasivam <4 25 RK_FUNC_GPIO &pcfg_pull_none>; 120*ba0abee7SManivannan Sadhasivam }; 121*ba0abee7SManivannan Sadhasivam 122*ba0abee7SManivannan Sadhasivam user_led2: user_led2 { 123*ba0abee7SManivannan Sadhasivam rockchip,pins = 124*ba0abee7SManivannan Sadhasivam <4 26 RK_FUNC_GPIO &pcfg_pull_none>; 125*ba0abee7SManivannan Sadhasivam }; 126*ba0abee7SManivannan Sadhasivam 127*ba0abee7SManivannan Sadhasivam user_led3: user_led3 { 128*ba0abee7SManivannan Sadhasivam rockchip,pins = 129*ba0abee7SManivannan Sadhasivam <4 30 RK_FUNC_GPIO &pcfg_pull_none>; 130*ba0abee7SManivannan Sadhasivam }; 131*ba0abee7SManivannan Sadhasivam 132*ba0abee7SManivannan Sadhasivam user_led4: user_led4 { 133*ba0abee7SManivannan Sadhasivam rockchip,pins = 134*ba0abee7SManivannan Sadhasivam <1 0 RK_FUNC_GPIO &pcfg_pull_none>; 135*ba0abee7SManivannan Sadhasivam }; 136*ba0abee7SManivannan Sadhasivam 137*ba0abee7SManivannan Sadhasivam wlan_led: wlan_led { 138*ba0abee7SManivannan Sadhasivam rockchip,pins = 139*ba0abee7SManivannan Sadhasivam <1 1 RK_FUNC_GPIO &pcfg_pull_none>; 140*ba0abee7SManivannan Sadhasivam }; 141*ba0abee7SManivannan Sadhasivam 142*ba0abee7SManivannan Sadhasivam bt_led: bt_led { 143*ba0abee7SManivannan Sadhasivam rockchip,pins = 144*ba0abee7SManivannan Sadhasivam <1 4 RK_FUNC_GPIO &pcfg_pull_none>; 145*ba0abee7SManivannan Sadhasivam }; 146*ba0abee7SManivannan Sadhasivam }; 147874846f1SEzequiel Garcia}; 148874846f1SEzequiel Garcia 14965abc845SEnric Balletbo i Serra&usbdrd_dwc3_0 { 15065abc845SEnric Balletbo i Serra dr_mode = "host"; 15165abc845SEnric Balletbo i Serra}; 15265abc845SEnric Balletbo i Serra 15365abc845SEnric Balletbo i Serra&usbdrd_dwc3_1 { 15465abc845SEnric Balletbo i Serra dr_mode = "host"; 15565abc845SEnric Balletbo i Serra}; 15665abc845SEnric Balletbo i Serra 157ffb7b25eSManivannan Sadhasivam&vcc3v3_pcie { 158ffb7b25eSManivannan Sadhasivam gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; 159874846f1SEzequiel Garcia}; 160874846f1SEzequiel Garcia 161ffb7b25eSManivannan Sadhasivam&vcc5v0_host { 162ffb7b25eSManivannan Sadhasivam gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; 163874846f1SEzequiel Garcia}; 164